Fast optical recording media based on semiconductor nanostructures for image recording and processing

Fast optical recording media based on semiconductor nanostructures (CdTe, GaAs) for image recording and processing with a speed to 10⁶ cycle/s (which exceeds the speed of known recording media based on metal-insulator-semiconductor-(liquid crystal) (MIS-LC) structures by two to three orders of magnitude), a photosensitivity of 10^?2V/cm², and a spatial resolution of 5–10 (line pairs)/mm are developed. Operating principles of nanostructures as fast optical recording media and methods for reading images recorded in such media are described. Fast optical processors for recording images in incoherent light based on CdTe crystal nanostructures are implemented. The possibility of their application to fabricate image correlators is shown.     

金属-铁电体-GaN结构研究

以铁电体Pb(Zr0.53Ti0.47)O3取代传统绝缘栅氧化物制备了GaN基金属-绝缘层-半导体(MIS)结构.由于铁电体具有较强的极化电场和高介电常数,GaN基金属-铁电体-半导体(MFS)结构的电容-电压特性与其他GaN基MIS结构相比较得到了显著的提高.GaN基MFS结构中GaN激活层达到反型时的偏压小于5V,这和硅基电子器件和集成电路的工作电压一致,而且结果表明GaN层的载流子浓度比其背景载流子浓度减小了一个数量级.因此,GaN基MFS结构对于GaN基场效应晶体管的实际应用具有重要的意义.     

Charge Storage in Pentacene/Polymethylmethacrylate Memory Devices

The electrical behavior of organic metal–insulator–semiconductor (MIS) structures incorporating a layer of self-assembled metallic nanoparticles is described. These have been based on thermally evaporated pentacene (semiconductor) and spin-coated polymethylmethacrylate (insulator). The MIS devices containing the nanoparticles exhibited significant hysteresis in their capacitance-versus-voltage and conductance-versus-voltage characteristics, which was attributed to the charging and discharging of the nanoparticles. The memory structure reported here offers a useful advance in the development of flexible organic memory structures.      

Modulation of the Charge of Germanium MIS Structures with Fluorine-Containing Insulators

Semiconductors - An insulator layer of ErF3, YF3, NdF3, and TmF3 was formed in n-type Ge-based MIS (metal–insulator–semiconductor) structures. It is shown that no negative effective...     

Physical properties of metal–insulator–semiconductor structures based on <Emphasis Type="Italic">n</Emphasis>-GaAs with InAs quantum dots deposited onto the surface of an <Emphasis Type="Italic">n</Emphasis>-GaAs layer

The properties of metal–insulator–semiconductor (MIS) structures based on n-GaAs in which silicon oxide and yttria-stabilized zirconia and hafnia are used as the insulator containing InAs quantum dots, which are embedded at the insulator/n-GaAs interface, are investigated. The structures manifest the resistive switching and synaptic behavior.     

Analytical investigation of surface potential and related properties of metal/insulator/III–V semiconductor capacitors

An analytical study of the effect of an applied gate bias on the potential and electron density in the semiconductor of metal/insulator/III–V semiconductor (III–V MIS) capacitors is carried out. For this, Poisson's equation is rewritten to a form amenable to analytical study. Si₃N₄ is used as an insulator layer for the MIS capacitors. In order to highlight the advantages of III–V MIS capacitors over metal-SiO₂---Si (MOS) capacitors, the ideal case free from interface traps is considered and theoretical results are obtained also for MOS capacitors. The calculated results strongly demonstrate the superiority of InGaAs MIS and GaAs MIS capacitors to Si MOS capacitors and pinpoint the situation in which the interface states are present.     

Metal–Insulator–Semiconductor Coaxial Microfibers Based on Self‐Organization of Organic Semiconductor:Polymer Blend for Weavable,Fibriform Organic Field‐Effect Transistors

With the increasing importance of electronic textiles as an ideal platform for wearable electronic devices, requirements for the development of functional electronic fibers with multilayered structures are increasing. In this paper, metal–polymer insulator–organic semiconductor (MIS) coaxial microfibers using the self‐organization of organic semiconductor:insulating polymer blends for weavable, fibriform organic field‐effect transistors (FETs) are demonstrated. A holistic process for MIS coaxial microfiber fabrication, including surface modification of gold microfiber thin‐film coating on the microfiber using a die‐coating system, and the self‐organization of organic semiconductor–insulator polymer blend is presented. Vertical phase‐separation of the organic semiconductor:insulating polymer blend film wrapping the metal microfibers provides a coaxial bilayer structure of gate dielectric (inside) and organic semiconductor (outside) with intimate interfacial contact. It is determined that the fibriform FETs based on MIS coaxial microfiber exhibit good charge carrier mobilities that approach the values of typical devices with planar substrate. It additionally exhibits electrical property uniformity over the entire fiber surface and improved bending durability. Fibriform organic FET embedded in a textile is demonstrated by weaving MIS coaxial microfibers with cotton and conducting threads, which verifies the feasibility of MIS coaxial microfiber for use in electronic textile applications.     

Controlling the electrical characteristics of Au/n-Si structures by interfacial insulator layer

Admittance (C–V and G/ω–V) measurements of Au/n-Si (metal–semiconductor, MS) and Au/SnO₂/n-Si (metal–insulator–semiconductor, MIS) structures were carried out between 1 kHz and 1 MHz at room temperature to investigate the interfacial insulator layer effect on the electrical characteristics of Au/n-Si structures. Experimental results showed that MIS structure's capacitance (C) values, unlike those of MS structure, became stable especially at high frequencies in the accumulation region. Also, the insulator layer caused structure's shunt resistance (R_sh) to increase. It was found that series resistance (R_s) is more effective in the accumulation region at high frequencies after the correction was applied to C and G/ω data to eliminate the R_s effect. The density of interface states (D_is) was obtained using Hill–Coleman method, D_is values MIS structure was obtained smaller than those of MS structure. Results indicate that interfacial insulator layer brings about some improvements in electrical characteristics of Au/n-Si structures.     

GaP electroluminescent memory switch

M.I.S. structures in which the semiconductor is GaP and the insulator a native oxide of GaP exhibit switchtng and non volatile memory properties as well as electroluminescence that is green under forward bias and orange under reverse bias. The switching and memory properties are thought to be due to a forming process in the oxide layer.     

Electroluminescence from MIS silicon-based light emitters with arrays of self-assembled Ge(Si) nanoislands

We report on the electroluminescence from silicon-based metal–insulator–semiconductor (MIS) diodes with arrays of self-assembled Ge(Si) nanoislands. Aluminum oxide (Al₂O₃) is used as an insulator material in the MIS contact. Variations in the electroluminescence spectra caused by changing the metal work function are examined. The intense electroluminescence from Ge(Si) nanoislands localized at a distance of 50 nm from the insulator–semiconductor interface is observed at room temperature. The emission spectrum is found to be controlled by choosing the design of the semiconductor structure and the barrier height for injected carriers.     

Determination of carrier mobility of semiconductor layer in organic metal-insulator-semiconductor diodes by displacement current and electric-field-induced optical second-harmonic generation measurements

A novel method for determining carrier mobility of semiconductor layer in thin-film organic metal-insulator-semiconductor (MIS) diodes is proposed, where displacement current measurement (DCM) is used in combination with electric-field-induced optical second-harmonic generation (EFISHG) measurement. EFISHG signals generated from the semiconductor layer probe the electric field caused by carriers moving in the semiconductor layer of MIS diodes. On the other hand, DCM signals generated in accordance with the time derivative of induced charge on metal electrode well identify the transit time of carriers across the semiconductor layer. By using Au/pentacene/polyimide (PI)/indium-tin-oxide (ITO) diodes, we experimentally determined the carrier mobility of the pentacene layer. Results and analysis showed that step-voltage application to MIS diodes is suitable for the use of this proposed method.     

Top‐Down Fabrication of High Quality III–V Nanostructures by Monolayer Controlled Sculpting and Simultaneous Passivation

In the fabrication of III–V semiconductor nanostructures for electronic and optoelectronic devices, techniques that are capable of removing material with monolayer precision are as important as material growth to achieve best device performances. A robust chemical treatment is demonstrated using sulfur (S)‐oleylamine (OA) solution, which etches layer by layer in an inverse epitaxial fashion and simultaneously passivates the surface. The application of this process to push the limits of top‐down nanofabrication is demonstrated by the realization of InP‐based high optical quality nanowire arrays, with aspect ratios more than 50, and nanostructures with new topologies. The findings are relevant for other III–V semiconductors and have potential applications in III–V device technologies.     

Interfaces analysis by impedance spectroscopy and transient current spectroscopy on semiconducting polymers based metal–insulator–semiconductor capacitors

Impedance and transient current measurements on metal–insulator–semiconductor (MIS) capacitors are used as tools to thoroughly investigate the bulk and interface electronic transport properties of semiconducting polymers, i.e. poly(3-hexylthiophene) (P3HT). Distinct features were observed at both interfaces, i.e. metal–semiconductor and semiconductor–insulator. The results revealed a dispersive transport in the bulk due to the band tail of the localized states, presence of interface states at the interface between the insulator and the semiconductor and formation of a less conductive small layer at the interface semiconductor–metal contact due to intrusions of sputtered Au particles. Effects of self-assembled monolayers (SAMs) treatments of the gate insulating dielectric were investigated showing that treating the gate dielectric with either ozone or hexamethyldisilazane (HMDS) or octyltrichlorosilane (OTS) alter not only the interface semiconductor–insulator but the bulk properties as well. An exponential density of states with a width parameter of 38–58 meV depending on the surface treatment was found to be representative of the band tail of P3HT. Though both OTS and HMDS treatments slightly increase the density of interface states, only OTS treated samples showed a decrease in disorder parameter of the bulk. The latter fact can be attributed to an increase of the grain size due to a favored π-π stacking film growth. An outcome explaining the already reported increase of the lateral mobility and decrease of the vertical mobility observed upon OTS treatment of the gate insulating dielectric in poly(3-hexylthiophene) based devices.     

Electronic Contact Deposition onto Organic Molecular Monolayers: Can We Detect Metal Penetration?

Using a semiconductor as the substrate to a molecular organic layer, penetration of metal contacts can be clearly identified by the study of electronic charge transport through the layer. A series of monolayers of saturated hydrocarbon molecules with varying lengths is assembled on Si or GaAs and the junctions resulting after further electronic contact is made by liquid Hg, indirect metal evaporation, and a “ready‐made” metal pad are measured. In contrast to tunneling characteristics, which are ambiguous regarding contact penetration, the semiconductor surface barrier is very sensitive to any direct contact with a metal. With the organic monolayer intact, a metal–insulator–semiconductor (MIS) structure results. If metal penetrated the monolayer, the junction behaves as a metal–semiconductor (MS) structure. By comparing a molecule‐free interface (MS junction) with a molecularly modified one (presumably MIS), possible metal penetration is identified. The major indicators are the semiconductor electronic transport barrier height, extracted from the junction transport characteristics, and the photovoltage. The approach does not require a series of different monolayers and data analysis is quite straightforward, helping to identify non‐invasive ways to make electronic contact to soft matter.     

Properties of spin-on glass as an insulator for InP metal-insulator-semiconductor structures

The application of Futurrex IC1-200 spin-on glass as an insulator for InP metal-insu-lator-semiconductor (MIS) structures including InP MIS capacitors and InP MIS field-effect transistors (MISFET’s) was investigated. Preliminary measurements of the elec-trical properties of the spin-on glass were performed using Si MIS structures with the spin-on glass insulator layer. It was found that the spin-on glass which is subjected to a final curing treatment utilizing a rapid-thermal annealing at 600° C for 5 sec in a O₂ ambient exhibits the best electrical properties. However, it was demonstrated by sec-ondary ion mass spectroscopy that when done on InP, the 600° C rapid-thermal an-nealing resulted in the outdiffusion of indium and phosphorus into the spin-on glass. The change in the spin-on glass electrical characteristics due to this outdiffusion re-sulted in an instability in the InP MISFET operation.     

Capacitive Properties of Metal–Insulator–Semiconductor Systems Based on an HgCdTe nBn Structure Grown by Molecular Beam Epitaxy

Journal of Communications Technology and Electronics - The capacitance–voltage (CV) curves of metal–insulator–semiconductor (MIS) systems based on an HgCdTe nBn structure grown by...     

Investigation of both interface states spectrum and deep oxide states from differential isothermal transient spectroscopy

Metal/insulator/Si (MIS) structures using a high-permittivity (high-k) dielectric layer, here the perovskite compound SrTiO₃, are investigated by differential isothermal transient spectroscopy in order to study electronic states at interface and inside the oxide. The isothermal transient capacitance responses of these MIS capacitors, obtained at varying depletion bias voltages and recording times, are analysed by fast Fourier transform (FFT). Different values of the accumulation pulse duration may induce changes in the trapped charge, allowing identification of the various mechanisms for restoring thermodynamical equilibrium in the interface states. Thus, discrimination between the proper contribution of interfaces states and that of oxide deep states is evidenced. The effects of several post-annealing of the oxide layer onto the energy spectra are also described.     

Current multiplication in metal-insulator-semiconductor (MIS) tunnel diodes

In contrast to thick insulator structures, metal-insulator-semiconductor (MIS) diodes with very thin insulating layers (< 30 Å for the silicon-silicon dioxide system) allow appreciable tunnel current flow between the metal and the semiconductor causing the semiconductor to depart significantly from thermal equilibrium conditions when the diode is biased. Under such conditions, recent experiments have demonstrated that multiplication of minority carrier current can occur in the contact region. This multiplication process is described in detail by deriving analytical expressions characterizing this process and its dependence upon the metal, insulator, and semiconductor parameters for one specific class of diode. Numerical methods are used to investigate the multiplication properties under more general conditions. Solutions obtained by this method indicate that values of the small signal multiplication factor, M, in the range of 10²–10³ can be obtained with appropriately designed diodes. The applications of the multiplication process to a transistor structure and to a photodiode with internal multiplication properties are described briefly.     

Semiconductor-insulator structures in the phototargets of vidicons sensitive in the middle infrared region of the spectrum

The kinetics of electronic processes in vidicon phototargets based on semiconductor-insulator structures with a narrow-gap semiconductor is considered taking into account charge drain in the insulator layer and relaxation of the nonequilibrium depletion region in the semiconductor layer. The integration time, threshold sensitivity, and resolution at various intensities of incident radiation are estimated.     

MIS solar cells: A review

The metal-thin-film insulator-semiconductor (MIS) structure is currently receiving much attention in solar-cell studies. Both theoretical and practical investigations indicate that this structure offers a means of overcoming the principal deficiency of Schottky barrier solar cells, namely low open-circuit photovoltage, while maintaining the attractive features that have led the metal-semiconductor junction to be considered as a possible alternative to the p-n junction for large-area, terrestrial, solar-cell applications. The thin insulating layer allows control over not only the magnitude of the dark current flowing through the diode, but also the dominant type (majority or minority carrier) of this current. Desirably low values of dark current have been postulated for majority carrier devices incorporating suitable charge-trapping centres, located either within the insulator or at the semiconductor-insulator interface, and for minority carrier devices employing suitable insulator thicknesses, metal work functions, and semiconductor resistivities. Theories based on these models are reviewed in this paper and their relevance to explaining photovoltage enhancement in practical Si and GaAs MIS cells is examined. The factors affecting other salient solar-cell properties (photocurrent, fill factor, conversion efficiency) are also considered and suggestions as to the parameters limiting present device performance are given.