Inkjet‐Printed Single‐Droplet Organic Transistors Based on Semiconductor Nanowires Embedded in Insulating Polymers

Fabrication of organic field‐effect transistors (OFETs) using a high‐throughput printing process has garnered tremendous interest for realizing low‐cost and large‐area flexible electronic devices. Printing of organic semiconductors for active layer of transistor is one of the most critical steps for achieving this goal. The charge carrier transport behavior in this layer, dictated by the crystalline microstructure and molecular orientations of the organic semiconductor, determines the transistor performance. Here, it is demonstrated that an inkjet‐printed single‐droplet of a semiconducting/insulating polymer blend holds substantial promise as a means for implementing direct‐write fabrication of organic transistors. Control of the solubility of the semiconducting component in a blend solution can yield an inkjet‐printed single‐droplet blend film characterized by a semiconductor nanowire network embedded in an insulating polymer matrix. The inkjet‐printed blend films having this unique structure provide effective pathways for charge carrier transport through semiconductor nanowires, as well as significantly improve the on‐off current ratio and the environmental stability of the printed transistors.     

Tailoring Morphology and Structure of Inkjet‐Printed Liquid‐Crystalline Semiconductor/Insulating Polymer Blends for High‐Stability Organic Transistors

Inkjet printing of semiconducting polymers is desirable for realizing low‐cost, large‐area printed electronics. However, sequential inkjet printing methods often suffer from nozzle clogging because the solubility of semiconducting polymers in organic solvents is limited. Here, it is demonstrated that the addition of an insulating polymer to a semiconducting polymer ink greatly enhances the solubility and stability of the ink, leading to the stable ejection of ink droplets. This bicomponent blend comprising a liquid‐crystalline semiconducting copolymer, poly(didodecylquaterthiophene‐alt‐didodecylbithiazole) (PQTBTz‐C12), and an insulating commodity polymer, polystyrene, is extremely useful as a semiconducting layer in organic field‐effect transistors (OFETs), providing fine control over the phase‐separated morphology and structure of the inkjet‐printed film. Tailoring the solubility‐induced phase separation of the two components leads to a bilayer structure consisting of a polystyrene layer on the top and a highly crystalline PQTBTz‐C12 layer on the bottom. The blend film is used as the semiconducting layer in OFETs, reducing the semiconductor content to several tens of pictograms in a single device without degrading the device performance. Furthermore, OFETs based on the PQTBTz‐C12/polystyrene film exhibit much greater environmental and electrical stabilities compared to the films prepared from homo PQTBTz‐C12, mainly due to the self‐encapsulated structure of the blend film.     

A High‐Capacitance Salt‐Free Dielectric for Self‐Healable,Printable, and Flexible Organic Field Effect Transistors and Chemical Sensor

Printable and flexible electronics attract sustained attention for their low cost, easy scale up, and potential application in wearable and implantable sensors. However, they are susceptible to scratching, rupture, or other damage from bending or stretching due to their “soft” nature compared to their rigid counterparts (Si‐based electronics), leading to loss of functionality. Self‐healing capability is highly desirable for these “soft” electronic devices. Here, a versatile self‐healing polymer blend dielectric is developed with no added salts and it is integrated into organic field transistors (OFETs) as a gate insulator material. This polymer blend exhibits an unusually high thin film capacitance (1400 nF cm^?2 at 120 nm thickness and 20–100 Hz). Furthermore, it shows pronounced electrical and mechanical self‐healing behavior, can serve as the gate dielectric for organic semiconductors, and can even induce healing of the conductivity of a layer coated above it together with the process of healing itself. Based on these attractive properties, we developed a self‐healable, low‐voltage operable, printed, and flexible OFET for the first time, showing promise for vapor sensing as well as conventional OFET applications.     

Self‐Assembled,Millimeter‐Sized TIPS‐Pentacene Spherulites Grown on Partially Crosslinked Polymer Gate Dielectric

Here, a highly crystalline and self‐assembled 6,13‐bis(triisopropylsilylethynyl) pentacene (TIPS‐Pentacene) thin films formed by simple spin‐coating for the fabrication of high‐performance solution‐processed organic field‐effect transistors (OFETs) are reported. Rather than using semiconducting organic small‐molecule–insulating polymer blends for an active layer of an organic transistor, TIPS‐Pentacene organic semiconductor is separately self‐assembled on partially crosslinked poly‐4‐vinylphenol:poly(melamine‐co‐formaldehyde) (PVP:PMF) gate dielectric, which results in a vertically segregated semiconductor‐dielectric film with millimeter‐sized spherulite‐crystalline morphology of TIPS‐Pentacene. The structural and electrical properties of TIPS‐Pentacene/PVP:PMF films have been studied using a combination of polarized optical microscopy, atomic force microscopy, 2D‐grazing incidence wide‐angle X‐ray scattering, and secondary ion mass spectrometry. It is finally demonstrated a high‐performance OFETs with a maximum hole mobility of 3.40 cm² V^?1 s^?1 which is, to the best of our knowledge, one of the highest mobility values for TIPS‐Pentacene OFETs fabricated using a conventional solution process. It is expected that this new deposition method would be applicable to other small molecular semiconductor–curable polymer gate dielectric systems for high‐performance organic electronic applications.     

Vertically Segregated Structure and Properties of Small Molecule–Polymer Blend Semiconductors for Organic Thin‐Film Transistors

A comprehensive structure and performance study of thin blend films of the small‐molecule semiconductor, 2,8‐difluoro‐5,11‐bis(triethylsilylethynyl)anthradithiophene (diF‐TESADT), with various insulating binder polymers in organic thin‐film transistors is reported. The vertically segregated composition profile and nanostructure in the blend films are characterized by a combination of complementary experimental methods including grazing incidence X‐ray diffraction, neutron reflectivity, variable angle spectroscopic ellipsometry, and near edge X‐ray absorption fine structure spectroscopy. Three polymer binders are considered: atactic poly(α‐methylstyrene), atactic poly(methylmethacrylate), and syndiotactic polystyrene. The choice of polymer can strongly affect the vertical composition profile and the extent of crystalline order in blend films due to the competing effects of confinement entropy, interaction energy with substrate surfaces, and solidification kinetics. The variations in the vertically segregated composition profile and crystalline order in thin blend films explain the significant impacts of binder polymer choice on the charge carrier mobility of these films in the solution‐processed bottom‐gate/bottom‐contact thin‐film transistors.     

Ultrathin,Organic, Semiconductor/Polymer Blends by Scanning Corona‐Discharge Coating for High‐Performance Organic Thin‐Film Transistors

A new thin‐film coating process, scanning corona‐discharge coating (SCDC), to fabricate ultrathin tri‐isopropylsilylethynyl pentacene (TIPS‐PEN)/amorphous‐polymer blend layers suitable for high‐performance, bottom‐gate, organic thin‐film transistors (OTFTs) is described. The method is based on utilizing the electrodynamic flow of gas molecules that are corona‐discharged at a sharp metallic tip under a high voltage and subsequently directed towards a bottom electrode. With the static movement of the bottom electrode, on which a blend solution of TIPS‐PEN and an amorphous polymer is deposited, SCDC provides an efficient route to produce uniform blend films with thicknesses of less than one hundred nanometers, in which the TIPS‐PEN and the amorphous polymer are vertically phase‐separated into a bilayered structure with a single‐crystalline nature of the TIPS‐PEN. A bottom‐gate field‐effect transistor with a blend layer of TIPS‐PEN/polystyrene (PS) (90/10 wt%) operated at ambient conditions, for example, indeed exhibits a highly reliable device performance with a field‐effect mobility of approximately 0.23 cm² V^?1 s^?1: two orders of magnitude greater than that of a spin‐coated blend film. SCDC also turns out to be applicable to other amorphous polymers, such as poly(α‐methyl styrene) and poly(methyl methacrylate) and, readily combined with the conventional transfer‐printing technique, gives rise to micropatterned arrays of TIPS‐PEN/polymer films.     

Self‐Organization of Inkjet‐Printed Organic Semiconductor Films Prepared in Inkjet‐Etched Microwells

The high‐precision deposition of highly crystalline organic semiconductors by inkjet printing is important for the production of printed organic transistors. Herein, a facile nonconventional lithographic patterning technique is developed for fabricating banks with microwell structures by inkjet printing solvent droplets onto a polymer layer, thereby locally dissolving the polymer to form microwells. The semiconductor ink is then inkjet‐printed into the microwells. In addition to confining the inkjet‐printed organic semiconductor droplets, the microwells provide a platform onto which organic semiconductor molecules crystallize during solvent evaporation. When printed onto the hydrophilic microwells, the inkjet‐printed 6,13‐bis(triisopropylsilylethynyl) pentacene (TIPS_PEN) molecules undergo self‐organization to form highly ordered crystalline structures as a result of contact line pinning at the top corner of the bank and the outward hydrodynamic flow within the drying droplet. By contrast, small crystallites form with relatively poor molecular ordering in the hydrophobic microwells as a result of depinning of the contact line along the walls of the microwells. Because pinning in the hydrophilic microwells occurred at the top corner of the bank, treating the surfaces of the dielectric layer with a hydrophobic organic layer does not disturb the formation of the highly ordered TIPS_PEN crystals. Transistors fabricated on the hydrophilic microwells and the hydrophobic dielectric layer exhibit the best electrical properties, which is explained by the solvent evaporation and crystallization characteristics of the organic semiconductor droplets in the microwell. These results indicate that this technique is suitable for patterning organic semiconductor deposits on large‐area flexible substrates for the direct‐write fabrication of high‐performance organic transistors.     

Ambient Processable and Stable All‐Polymer Organic Solar Cells

In this work, the way in which ambient moisture impacts the photovoltaic performance of conventional PCBM and emerging polymer acceptor–based organic solar cells is examined. The device performance of two representative p‐type polymers, PBDB‐T and PTzBI, blended with either PCBM or polymeric acceptor N2200, is systemically investigated. In both cases, all‐polymer photovoltaic devices processed from high‐humidity ambient conditions exhibit significantly enhanced moisture‐tolerance compared to their polymer–PCBM counterparts. The impact of moisture on the blend film morphology and electronic properties of the electron acceptor (N2200 vs PCBM), which results in different recombination kinetics and electron transporting properties, are further compared. The impact of more comprehensive ambient conditions (moisture, oxygen, and thermal stress) on the long‐term stability of the unencapsulated devices is also investigated. All‐polymer solar cells show stable performance for long periods of storage time under ambient conditions. The authors believe that these findings demonstrate that all‐polymer solar cells can achieve high device performance with ambient processing and show excellent long‐term stability against oxygen and moisture, which situate them in an advantageous position for practical large‐scale production of organic solar cells.     

“Layer‐Filter Threshold” Technique for Near‐Infrared Laser Ablation in Organic Semiconductor Device Processing

Although conventional laser ablation (CLA) method has widely been used in patterning of organic semiconductor thin films, its quality control still remains unsatisfied due to the ambiguous photochemical and photothermal processes. Based on industrial available near‐infrared laser source, herein, a novel “layer‐filter threshold” (LFT) technique is proposed, which involves the decomposition of targeted “layer‐filter” and subsequent explosive evaporation process to purge away the upper layers instead of layer‐by‐layer ablation. For photovoltaic device with structure of metal/blend/PEDOT:PSS/ITO/glass, the PEDOT:PSS layer as the “layer‐filter” is first demonstrated to be effective, and then the merged P1–P2 line and metal electrode layer are readily patterned through the “self‐aligned” effect and regulation of ablation direction, respectively. The correlation between laser fluence and explosive ablation efficacy is also investigated. Finally, photovoltaic modules based on classical P3HT:PC₆₁BM and low‐bandgap PBDT‐TFQ:PC₇₁BM systems are separately fabricated following the LFT technique. It is found that over 90% of geometric fill factor is achieved while device performances maintain in a limited change with increased number of series cells. In comparison to conventional laser ablation methods, the LFT technique does not require sophisticated instruments but reaches comparable processing accuracy, which shows promising potential in the fabrication and commercialization of organic semiconductor thin‐film devices.     

Room‐Temperature Self‐Organizing Characteristics of Soluble Acene Field‐Effect Transistors

We report on the room‐temperature self‐organizing characteristics of thin films of the organic small‐molecule semiconductor triethylsilylethynyl‐anthradithiophene (TES‐ADT) and its effect on the electrical properties of TES‐ADT‐based field‐effect transistors (FETs). The morphology of TES‐ADT films changed dramatically with time, and the field‐effect mobility of FETs based on these films increased about 100‐fold after seven days as a result of the change in molecular orientation from a tilted structure in the as‐prepared film to a well‐oriented structure in the final film. We found that the molecular movement is large enough to induce a conformational change to an energetically stable state in spin‐coated TES‐ADT films, because TES‐ADT has a low glass‐transition temperature (around room temperature). Our findings demonstrate that organic small‐molecule semiconductors that exhibit a low crystallinity immediately after spin‐coating can be changed into highly crystalline structures by spontaneous self‐organization of the molecules at room temperature, which results in improved electrical properties of FETs based on these semiconductors.     

Polymer Field‐Effect Transistors Fabricated by the Sequential Gravure Printing of Polythiophene,Two Insulator Layers,and a Metal Ink Gate

The mass production technique of gravure contact printing is used to fabricate state‐of‐the art polymer field‐effect transistors (FETs). Using plastic substrates with prepatterned indium tin oxide source and drain contacts as required for display applications, four different layers are sequentially gravure‐printed: the semiconductor poly(3‐hexylthiophene‐2,5‐diyl) (P3HT), two insulator layers, and an Ag gate. A crosslinkable insulator and an Ag ink are developed which are both printable and highly robust. Printing in ambient and using this bottom‐contact/top‐gate geometry, an on/off ratio of >10⁴ and a mobility of 0.04 cm² V^?1 s^?1 are achieved. This rivals the best top‐gate polymer FETs fabricated with these materials. Printing using low concentration, low viscosity ink formulations, and different P3HT molecular weights is demonstrated. The printing speed of 40 m min^?1 on a flexible polymer substrate demonstrates that very high‐volume, reel‐to‐reel production of organic electronic devices is possible.     

Single‐Electron Tunneling through Molecular Quantum Dots in a Metal‐Insulator‐Semiconductor Structure

A sigle‐electron tunneling (SET) in a metal‐insulator‐semiconductor (MIS) structure is demonstrated, in which C₆₀ and copper phthalocyanine (CuPc) molecules are embedded as quantum dots in the insulator layer. The SET is found to originate from resonant tunneling via the energy levels of the embedded molecules, (e.g., the highest occupied molecular orbital (HOMO) and the lowest unoccupied molecular orbital (LUMO)). These findings show that the threshold voltages for SET are tunable according to the energy levels of the molecules. Furthermore, SET is observable even near room temperature. The results suggest, together with the fact that these properties are demonstrated in a practical device configuration, that the integration of molecular dots into the Si‐MIS structure has considerable potential for achieving novel SET devices. Moreover, the attempt allows large‐scale integration of individual molecular functionalities.     

Room‐Temperature Printing of Organic Thin‐Film Transistors with π‐Junction Gold Nanoparticles

Printing semiconductor devices under ambient atmospheric conditions is a promising method for the large‐area, low‐cost fabrication of flexible electronic products. However, processes conducted at temperatures greater than 150 °C are typically used for printed electronics, which prevents the use of common flexible substrates because of the distortion caused by heat. The present report describes a method for the room‐temperature printing of electronics, which allows thin‐film electronic devices to be printed at room temperature without the application of heat. The development of π‐junction gold nanoparticles as the electrode material permits the room‐temperature deposition of a conductive metal layer. Room‐temperature patterning methods are also developed for the Au ink electrodes and an active organic semiconductor layer, which enables the fabrication of organic thin‐film transistors through room‐temperature printing. The transistor devices printed at room temperature exhibit average field‐effect mobilities of 7.9 and 2.5 cm² V^?1 s^?1 on plastic and paper substrates, respectively. These results suggest that this fabrication method is very promising as a core technology for low‐cost and high‐performance printed electronics.     

Mercury‐Mediated Organic Semiconductor Surface Doping Monitored by Electrolyte‐Gated Field‐Effect Transistors

Surface doping allows tuning the electronic structure of semiconductors at near‐surface regime and is normally accomplished through the deposition of an ultrathin layer on top or below the host material. Surface doping is particularly appealing in organic field‐effect transistors (OFETs) where charge transport takes place at the first monolayers close to the dielectric surface. However, due to fabrication restrictions that OFET architecture imparts, this is extremely challenging. Here, it is demonstrated that mercury cations, Hg²⁺, can be exploited to control doping levels at the top surface of a thin film of a p‐type organic semiconductor blended with polystyrene. Electrolyte‐ or water‐gated field‐effect transistors, which have its conductive channel at the top surface of the organic thin film, turn out to be a powerful tool for monitoring the process. A positive shift of the threshold voltage is observed in the devices upon Hg²⁺ exposure. Remarkably, this interaction has been proved to be specific to Hg²⁺ with respect to other divalent cations and sensitive down to nanomolar concentrations. Hence, this work also opens new perspectives for employing organic electronic transducers in portable sensors for the detection of an extremely harmful water pollutant without the need of using specific receptors.     

Dielectric–Semiconductor Interface Limits Charge Carrier Motion at Elevated Temperatures and Large Carrier Densities in a High‐Mobility Organic Semiconductor

The fundamental nature of charge transport in highly ordered organic semiconductors is under constant debate. At cryogenic temperatures, effects within the semiconductor such as traps or the interaction of charge carriers with the insulating substrate (dipolar disorder or Fröhlich polarons) are known to limit carrier motion. In comparison, at elevated temperatures, where charge carrier mobility often also decreases as function of temperature, phonon scattering or dynamic disorder are frequently discussed mechanisms, but the exact microscopic cause that limits carrier motion is debated. Here, the mobility in the temperature range between 200 and 420 K as function of carrier density is explored in highly ordered perylene‐diimide from 3 to 9 nm thin films. It is observed that above room temperature increasing the gate electric field or decreasing the semiconducting film thickness leads to a suppression of the charge carrier mobility. Via X‐ray diffraction measurements at various temperatures and electric fields, changes of the thin film structure are excluded as cause for the observed mobility decrease. The experimental findings point toward scattering sites or traps at the semiconductor–dielectric interface, or in the dielectric as limiting factor for carrier mobility, whose role is usually neglected at elevated temperatures.     

Highly Crystalline Soluble Acene Crystal Arrays for Organic Transistors: Mechanism of Crystal Growth During Dip‐Coating

The preparation of uniform large‐area highly crystalline organic semiconductor thin films that show outstanding carrier mobilities remains a challenge in the field of organic electronics, including organic field‐effect transistors. Quantitative control over the drying speed during dip‐coating permits optimization of the organic semiconductor film formation, although the kinetics of crystallization at the air–solution–substrate contact line are still not well understood. Here, we report the facile one‐step growth of self‐aligning, highly crystalline soluble acene crystal arrays that exhibit excellent field‐effect mobilities (up to 1.5 cm V^?1 s^?1) via an optimized dip‐coating process. We discover that optimized acene crystals grew at a particular substrate lifting‐rate in the presence of low boiling point solvents, such as dichloromethane (b.p. of 40.0 °C) or chloroform (b.p. of 60.4 °C). Variable‐temperature dip‐coating experiments using various solvents and lift rates are performed to elucidate the crystallization behavior. This bottom‐up study of soluble acene crystal growth during dip‐coating provides conditions under which one may obtain uniform organic semiconductor crystal arrays with high crystallinity and mobilities over large substrate areas, regardless of the substrate geometry (wafer substrates or cylinder‐shaped substrates).     

Star‐Shaped Oligothiophenes for Solution‐Processible Organic Field‐Effect Transistors

We have designed and successfully synthesized star‐shaped oligothiophenes, which could be used as semiconducting materials for solution‐processible organic field‐effect transistors (FETs). By systematically changing the chemical structure of the star‐shaped oligothiophenes we obtained the structural requirements needed for making working FETs from them. UV‐vis fluorescence measurements showed that a molecule of the star‐shaped compounds under consideration is not a fully conjugated molecule, but it has three independently conjugated oligothienyl‐phenylene blocks. A possible scheme of molecular packing of the star‐shaped oligothiophenes in a lamellar structure was proposed and confirmed by atomic force microscopy (AFM) and X‐ray diffraction (XRD) measurements. Although the star‐shaped semiconductors show a somewhat lower mobility than their linear analogs, they possess better solubility and film‐forming properties, leading to improved spin‐coating processing. The best FETs were made by spin‐coating 1,3,5‐tris(5″‐decyl‐2,2′:5′,2″‐terthien‐5‐yl)benzene from a chloroform solution, which resulted in a mobility of 2 × 10^–4 cm² V ^–1s^–1, a 10² on/off ratio at gate voltages of 0 V and –20 V, and a threshold voltage close to 0 V.     

High Performance Multi‐Level Non‐Volatile Polymer Memory with Solution‐Blended Ferroelectric Polymer/High‐k Insulators for Low Voltage Operation

Polymer ferroelectric‐gate field effect transistors (Fe‐FETs) employing ferroelectric polymer thin films as gate insulators are highly attractive as a next‐generation non‐volatile memory. Furthermore, polymer Fe‐FETs have been recently of interest owing to their capability of storing data in more than 2 states in a single device, that is, they have multi‐level cell (MLC) operation potential for high density data storage. However, among a variety of technological issues of MLC polymer Fe‐FETs, the requirement of high voltage for cell operation is one of the most urgent problems. Here, a low voltage operating MLC polymer Fe‐FET memory with a high dielectric constant (k) ferroelectric polymer insulator is presented. Effective enhancement of capacitance of the ferroelectric gate insulator layer is achieved by a simple binary solution‐blend of a ferroelectric poly(vinylidene fluoride‐co‐trifluoroethylene) (PVDF‐TrFE) (k ≈ 8) with a relaxer high‐k poly(vinylidene‐fluoride–trifluoroethylene–chlorotrifluoroethylene) (PVDF‐TrFE‐CTFE) (k ≈ 18). At optimized conditions, a ferroelectric insulator with a PVDF‐TrFE/PVDF‐TrFE‐CTFE (10/5) blend composition enables the discrete six‐level multi‐state operation of a MLC Fe‐FET at a gate voltage sweep of ±18 V with excellent data retention and endurance of each state of more than 10⁴ s and 120 cycles, respectively.     

Interface Modification to Improve Hole‐Injection Properties in Organic Electronic Devices

The performance of organic electronic devices is often limited by injection. In this paper, improvement of hole injection in organic electronic devices by conditioning of the interface between the hole‐conducting layer (buffer layer) and the active organic semiconductor layer is demonstrated. The conditioning is performed by spin‐coating poly(9,9‐dioctyl‐fluorene‐co‐N‐ (4‐butylphenyl)‐diphenylamine) (TFB) on top of the poly(3,4‐ethylene dioxythiophene): poly(styrene sulfonate) (PEDOT:PSS) buffer layer, followed by an organic solvent wash, which results in a TFB residue on the surface of the PEDOT:PSS. Changes in the hole‐injection energy barriers, bulk charge‐transport properties, and current–voltage characteristics observed in a representative PFO‐based (PFO: poly(9,9‐dioctylfluorene)) diode suggest that conditioning of PEDOT:PSS surface with TFB creates a stepped electronic profile that dramatically improves the hole‐injection properties of organic electronic devices.     

Electroless‐Plated Gold Contacts for High‐Performance,Low Contact Resistance Organic Thin Film Transistors

Deposition of metallic electrodes on a semiconductor medium is an indispensable factor in governing carrier injection, and a metal/semiconductor contact that can be formed via solution process is highly desired in printed electronics. However, fine‐patterning the solution processes of metallic electrodes without damaging the excellent electronic properties of organic semiconductors (OSCs) is still a challenge. In this work, electroless plating, a metal coating technique that involves auto‐catalytic reaction in an aqueous solution, is used to fabricate top‐contact organic thin‐film transistors (OTFTs). An electroless‐plated gold pattern with a spatial resolution of 10 micrometers is transferred and laminated on a monolayer of OSCs to serve as a hole‐injection electrode. The fabricated OTFTs exhibit reasonably high field‐effect mobility of up to 13 cm² V^?1 s^?1 and decent contact resistance as low as 120 Ω · cm, which implies that an ideal metal/semiconductor contact can be realized. This electroless plating technique can provide possibilities for practical mass production of organic integrated circuits because it is in principle cost‐effective, capable of covering large areas, high‐vacuum free, and environmentally friendly.