A simple yet comprehensive unified physical model of the 2Delectron gas in delta-doped and uniformly doped high electron mobilitytransistors

This paper presents a new approach to model the 2DEG concentration (n_s) versus gate voltage (V_G) behavior and the equilibrium 2DEG concentration (n_s0) in a HEMT. The approach results in a model which is “comprehensive” in the following sense. It is valid for both delta-doped and uniformly doped HEMTs. It captures all the three n_s-V_G nonlinearities (subthreshold, gradual pinchoff, and gradual saturation), and the effects of all the device parameters including temperature, in relation expressing n_s as an explicit closed-form integrable function of V_G having continuous first derivatives; thus, the function readily yields a device current-voltage/capacitance-voltage (I-V/C-V) model which can be incorporated in software meant for simulation of circuits, particularly of the analog variety. The simple model is shown to predict the results of complex numerical calculations and experiments. The closed-form n_s0 expression of the model is the first of its kind reported for delta-doped HEMT's, and reveals an interesting feature unexposed by earlier n_s0 models: the reciprocal of n_s0 in both delta-doped and uniformly doped devices decreases linearly with reduction in spacer width, and saturates at low spacer widths in some delta-doped devices. It is shown that the measured n_s0 in delta-doped devices is predicted correctly if the electrons in the V-shaped well are assumed to be trapped at the donor sites rather than to be filling the conduction subbands     

Extraction of high-frequency equivalent circuit parameters ofsubmicron gate-length MOSFET's

As the effective gate-length of a MOSFET reduces, its high-frequency characteristics improve. However, they become more difficult to model. Current SPICE models are based on DC measurement data and simplistic capacitance models which can only approximate the high-frequency device characteristics up to a fraction of the device unity current gain frequency (f_τ). Thus, it is important to investigate the high-frequency characteristics and then incorporate the small-signal equivalent circuit parameters in SPICE. In this, work we report a simple nonquasi static model, which offers good accuracy needed for circuit simulation, and a new curve fitting method for the extraction of the network model elements. The current work is part of a study aimed at improving the existing scalable model for MOSFET's, and it focuses on extracting the elements of an equivalent circuit which describes the state-of-the-art device     

高压MOSFET直流特性宏模型的建立与参数优化

分析了SPICE BSIM3模型对高压双扩散漏MOSFET(HV double diffuse drain MOSFET)模拟过程中产牛的较大偏差,有针对性地提出一种由nMOSFET,MESFET,二极管等常规SPICE器件组成的高压晶体管宏模型.该宏模型结构简单、使用方便,能准确描述HVMOS的I-V特性.为了提高该模型的尺寸可缩放性(scalability),将MESFET阈值电压对体电压的敏感因子K1进行优化,提取了不同沟道尺寸(W/L)下K1取值的半经验公式,使该宏模型能够适用于不同尺寸的晶体管,大大提高了它的实用价值.该尺寸可缩放宏模型(scalable macromodel)能应用于基于SPICE模型的各种通用EDA软件.     

Measurements and modeling of MOSFET I-V characteristics withpolysilicon depletion effect

The authors study the degradation of MOSFET current-voltage (V-I) characteristics as a function of polysilicon gate concentration (N_p ), oxide thickness (t_ox) and substrate impurity concentration (N_D) using measured and modeled results. Experimentally it is found that for MOSFETs with thin gate oxide (t_ox≈70 Å) and high substrate concentration (N_D ≈1.6×10¹⁷ cm^-3) the reduction in the drain current I_DS can be as large as 10% to 20% for devices with insufficiently doped polysilicon gate (5×10¹⁸ ⩽N_p⩽1.6×10¹⁹ cm^-3). Theoretically it is shown that the drain current degradation becomes more pronounced as N_p decreases, t_ox decreases, or N_D, increases. A modified Pao-Sah model that takes into account the polysilicon depletion effect and an accurate gate-field-dependent mobility model are used to compute I-V characteristics for various values of N_p, t_ox, and N_D. Good agreement between experimental and modeled results is observed over a wide range of devices     

适于器件及电路分析的全耗尽短沟道LDD／LDSSOI MOSFET器件模型

本文系统描述了全耗尽短沟道ＬＤＤ／ＬＤＳＳＯＩＭＯＳＦＥＴ器件模型的电压电压特性。该模型扩展了我们原有的薄膜全耗尽ＳＯＩＭＯＳＦＥＴ模型，文中着重分析了器件进入饱和区后出现的沟道长度调制效应，及由于ＬＤＤ／ＬＤＳ区的存在对本征ＭＯＳ器件电流特性的影响。     

Semi-numerical modelling of an n-channel irradiated MOSFET

A semi-numerical model of a metal-oxide-semiconductor field effect transistor (MOSFET) has been developed for theoretical examination of the effect of ionizing radiation on the characteristics of the device. The present model utilizes the radiation-induced changes in the flat-band voltage to estimate the change in the surface charge carrier concentration which in turn changes the mobility of the surface channel and affects the source-to-drain current. For the first time a model of an irradiated MOSFET has been presented that incorporates the effect of both transverse and longitudinal electric fields in the transport of the carriers in the surface channel. The present model can also be used to determine the characteristics of the device in the pre-irradiated condition. The validity of the model has been established by comparing and contrasting the results in the preirradiated condition with those obtained using other models, including twodimensional models. The results obtained on the basis of our model are compared with reported experimental results and also a SPICE (Level 3) model in the post-irradiated condition. It is found that our model gives a better fit to the reported experimental results as compared with SPICE models.-The present model is expected to yield fairly accurate results for estimation of I _D V _D characteristics and the transfer characteristics, even for a short channel device.     

A physical and scalable I-V model in BSIM3v3 for analog/digitalcircuit simulation

A new physical and continuous BSIM (Berkeley Short-Channel IGFET Model) I-V model in BSIM3v3 is presented for circuit simulation. Including the major physical effects in state-of-the art MOS devices, the model describes current characteristics from subthreshold to strong inversion as well as from the linear to the saturation operating regions with a single I-V expression, and guarantees the continuities of I_ds, conductances and their derivatives throughout all V_gs, V_ds, and T_bs, bias conditions. Compared with the previous BSIM models, the improved model continuity enhances the convergence property of the circuit simulators. Furthermore, the model accuracy has also been enhanced by including the dependencies of geometry and bias of parasitic series resistances, narrow width, bulk charge, and DIBL effects. The new model has the extensive built-in dependencies of important dimensional and processing parameters (e.g., channel length, width, gate oxide thickness, junction depth, substrate doping concentration, etc.). It allows users to accurately describe the MOSFET characteristics over a wide range of channel lengths and widths for various technologies, and is attractive for statistical modeling. The model has been implemented in the circuit simulators such as Spectre, Hspice, SmartSpice, Spice3e2, and so on     

A macroscopic model of nonlinear constitutive relations insuperconductors

A macroscopic model is proposed for nonlinear electromagnetic phenomena in superconductors. Nonlinear constitutive relations are derived by modifying the linear London's equations. The superelectron number density as a function of applied macroscopic current density, n _s(J), is derived from a distribution of electron velocities at a certain temperature T. At temperature T≠0 K, the function n_s(J) has a smooth variation near the macroscopic critical current density J_c. Agreement has been found between this n _s(J,T) model and the temperature dependence of n_s in the two-fluid model. The nonlinear conductivities σ_s(J) and σ_n(J) are obtained from the London's equation with the modified n_s(J) function. Nonlinear resistance R(I), kinetic inductance L_k(I) and surface impedance Z_s(I) in thin wire, slab, and strip geometries are calculated     

A new Z11 impedance technique to extract mobility andsheet carrier concentration in HFETs and MESFETs

Conventional techniques to extract channel mobility, μ, and sheet carrier concentration, n_s, in heterostructure field-effect transistors (HFETs) do not account for the distributed nature of the device. This can result in substantial errors. To address this, we have developed a new technique that consists of measuring the gate-to-source impedance with the drain floating (Z₁₁) over a broad frequency range. A transmission line model (TL model) is fitted to Re[Z₁₁], thus obtaining the gate capacitance and channel resistance (and consequently μ(V_GS) and n_s(V _GS)) in a single measurement. We demonstrate this technique in InAlAs-InGaAs on InP HFET's. The TL model faithfully represents Z₁₁ from 100 Hz to 15 MHz. Our technique can easily be automated and thus is a good tool for accurate charge control in an industrial environment     

A new approach to determine the effective channel length and thedrain-and-source series resistance of miniaturized MOSFET's

A new decoupled C-V method is proposed to determine the intrinsic (effective) channel region and extrinsic overlap region for miniaturized MOSFET's. In this approach, a unique channel-length-independent extrinsic overlap region is extracted at a critical gate bias, so bias-independent effective channel lengths (L_eff) are achieved. Furthermore, the two-dimensional (2D) charge sharing effect is separated from the effective channel region. Based on this L_eff and the associated bias-dependent channel mobility, μ_eff , the drain-and-source series resistance (R_DS) can be derived from the I-V characteristics for each device individually. For the first time, the assumption or approximation for R_DS and μ_eff can be avoided, thus the difficulties and controversy encountered in the conventional I-V method can be solved. The 2D charge sharing effect is incorporated into the bias-dependent R_DS. This bias dependence is closely related to the drain/source doping profile and the channel dopant concentration. The proposed L_eff and R_DS extraction method has been verified by an analytical I-V model which shows excellent agreements with the measured I-V characteristics     

A robust and physical BSIM3 non-quasi-static transient and ACsmall-signal model for circuit simulation

A new non-quasi-static (NQS) MOSFET model, which is applicable for both large-signal transient and small-signal ac analysis, has been developed. It employs a physical relaxation time approach to take care of the finite channel charging time to reach equilibrium and the effect of instantaneous channel charge re-distribution. The NQS model is formulated independently from the dc I-V and the charge-capacitor model, thus can be easily applied to any existing simulators. The model has been implemented in the newly released BSIM3 version 3, and comparison has been made among this model, common quasi-static (QS) SPICE models and PISCES two-dimensional (2-D) numerical device simulator. While predicting accurate NQS behavior, the time penalty for using the new model is only about 20-30% more than the common QS models. It is much less than the time required by other NQS models reported. Limitations and compromises between simplicity, efficiency and accuracy are also discussed     

A Comparative Study of Various MOSFET Models at Radio Frequencies

We have compared and systematically evaluated four mainstream MOSFET models (EKV, SPICE Level 3, Bsim3v3 and Philips MOS Model 9) at radio frequencies. Furthermore, we have tested some improvements proposed for the models in the GHz region. In the first phase complete scalable DC models were determined, and the high frequency model parameters were then extracted from properly designed RF test transistors by using S-parameter fitting and capacitance measurements. The inaccuracies in the AC results were found to be mainly a consequence of the problems in the modelling of the DC conductances. The Bsim3v3 and MOS9 models seem to yield the most realistic AC characteristics of the models. The accuracy of the MOS9 model is slightly inferior to that of the Bsim3v3 model, but it may be improved to the same level or even beyond, simply by adding a gate-bulk zero-bias capacitance to the MOSFET equivalent circuit, which has been done in many commercial circuit simulators. The best models give accurate results up to 4 GHz, and after a careful parameter extraction even at 10 GHz. We also have demonstrated the applicability of the improved models in the design of a LNA CMOS circuit.     

A continuous, analytic drain-current model for DG MOSFETs

This letter presents a continuous analytic current-voltage (I-V) model for double-gate (DG) MOSFETs. It is derived from closed-form solutions of Poisson's equation, and current continuity equation without the charge-sheet approximation. The entire I/sub ds/(V/sub g/,V/sub ds/) characteristics for all regions of MOSFET operation: linear, saturation, and subthreshold, are covered under one continuous function, making it ideally suited for compact modeling. By preserving the proper physics, this model readily depicts "volume inversion" in symmetric DG MOSFETs-a distinctively noncharge-sheet phenomenon that cannot be reproduced by standard charge-sheet based I-V models. It is shown that the I-V curves generated by the analytic model are in complete agreement with two-dimensional numerical simulation results for all ranges of gate and drain voltages.     

Time-Domain Modeling of Low-Frequency Noise in Deep-Submicrometer MOSFET

$1/f$ noise and random telegraph signal (RTS) noise are increasingly dominant sources of low-frequency noise as the MOSFET enters the nanoscale regime. In this study, $1/f$ noise and RTS noise in the n-channel MOSFET are modelled in the time domain for efficient implementation in transient circuit simulation. A technique based on sum-of-sinusoids models $1/f$ noise while a Monte Carlo based technique is used to generate RTS noise. Low-frequency noise generated using these models exhibits the correct form of noise characteristics as predicted by theory, with noise parameters from standard 0.35-$mu$m and 35-nm CMOS technology. Implementation of the time-domain model in SPICE shows the utility of the noisy MOSFET model in simulating the effect of low-frequency noise on the operation of deep-submicrometer analog integrated circuits.      

Dynamic SPICE-simulation of the electrothermal behavior of SOIMOSFET's

A nonlinear dynamic electrothermal model of the SOI MOSFET is implemented and used in SPICE3. This model is formulated as a set of algebraic and (partial) differential equations which is converted into a SPICE3 netlist automatically by a model translator. Neither is the simulator rewritten nor are SPICE device models implemented or changed. In this way, the presented approach supports effective model development. To show the electrothermal interaction, the SOI MOSFET model is applied to several static and dynamic simulations. The SPICE-simulation results of the thermal model are verified with the commercial finite-element simulator ANSYS     

一种新的SPICE BSIM3v3 HCI可靠性模型的建立及参数优化

研究中提出了用于描述HCI(热载流子注入)效应的MOSFET可靠性模型及其建模方法,在原BSIM3模型源代码中针对7个主要参数,增加了其时间调制因子,优化并拟合其与HCI加压时间(Stress time)的关系式,以宽长比为10μm/0.5μm5 V的MOSFET为研究对象,在开放的SPICE和BSIM3源代码对模型库文件进行修改,实现了该可靠性模型。实验表明,该模型的测量曲线与参数提取后的I-V仿真曲线十分吻合,因而适用于预测标准工艺MOS器件在一定工作电压及时间下性能参数的变化,进而评估标准工艺器件的寿命。     

p-MOSFET parameters at cryogenic temperatures

p-channel MOSFET parameters measured at 300 K, 77 K, and 4.2 K are discussed; these include I-V characteristic curves, channel conductance, transconductance, threshold voltage, field effect mobility, and forward and reverse p⁺n junction characteristics. Some qualitative explanations of the dependence of the data on temperature and substrate doping concentration are given. Interesting LHe phenomena are highlighted and discussed in terms of accepted solid state models.     

N-channel enhancement-mode MOSFET characteristics from 10 to 300 K

Operation of MOSFET circuits at the liquid nitrogen temperature (77 K) has been suggested as a means of improving circuit and system performance. Previously reported work emphasizes mobility and threshold voltage at 77 K. However, small MOSFET's require several (≳10) parameters for circuit design. Since a full set of MOSFET model parameters have not been previously reported, it has not been established whether conventional models can be applied for MOSFET circuit design at 77 K. We present here the temperature dependence of a full set of MOSFET circuit model parameters for channel lengths from 2.5 to 8.5 µm and for temperatures ranging from 10 to 300 K. Temperatures below 77 K are of interest in evaluating effects of impurity freezeout and temperatures above 77 K are important since actual device temperatures will be above the ambient. Overall, we find that the mobility and the threshold voltage are the dominant temperature dependent parameters and that conventional I-V characteristics persist down to 77 K. Below 77 K, some new features appear in the I-V characteristics. However, the conventional behavior down to 77 K suggests that standard (circuit models can be used for circuits operating at 77 K. Such circuits would be about four times faster than at room temperature and, with liquid nitrogen cooling, would provide an order of magnitude higher power density for VLSI.     

A GaAs MOSFET with a liquid phase oxidized gate

Low leakage current density (as low as 10^-8 A/cm² at an applied voltage of 5 V) and high breakdown electrical field (larger than 4.5 MV/cm) of the liquid phase chemical-enhanced oxidized GaAs insulating layer enable application to the GaAs MOSFET. The oxide layer is found to be a composite of Ga₂O₃, As, and As₂O₃. The n-channel depletion mode GaAs MOSFET's are demonstrated and the I-V curves with complete pinch-off and saturation characteristics can be seen. A transconductance larger than 30 mS/mm can be achieved which is even better than that of MESFET's fabricated on the same wafer structure     

Effect of forward and reverse substrate biasing on low-frequencynoise in silicon PMOSFETs

Forward body biasing improves the low-frequency noise performance of p-channel metal-oxide semiconductor (PMOS) transistors by about 8 dB/V. Therefore, for analog design, forward body biasing may be preferred if noise is a concern. This is in agreement with the improvement of other MOSFET parameters such as the decrease of the threshold voltage (V_T) or the increase of unity current-gain frequency (f_T) on forward substrate- (or body)-source biasing (V_BS). Also, forward V_BS is very attractive for low voltage supply (V_DD<0.6 V) and low-power, low-noise circuits. A detailed analysis of the dependence of the noise level on VBS and on the gate-source (V_GS) biasing showed that the dependence on V_BS seems to be smaller in weak inversion, and it increases in strong inversion. The dependence on V_GS has a turning point at V_GS≈0.8 V, independent of body bias, which it seems is due to the activation of oxide traps, as the noise waveform showed a random telegraph signal (RTS) component at V_GS >0.8 V. Generally, it is confirmed that the spectral density S _I of the total low-frequency noise of the drain current I_D is proportional to the square of I_D, i.e., S _I∝I_D², but it cannot be clearly ascribed to either number fluctuation or mobility fluctuation models. In addition, both models cannot accurately describe the dependence of the noise level on the body bias