一种用于数字控制DC-DC转换器的近似时间最优轨迹预测法

The purpose of this paper is to present a novel trajectory prediction method for proximate time-optimal digital control DC-DC converters. The control method provides pre-estimations of the duty ratio in the next several switching cycles, so as to compensate the computational time delay of the control loop and increase the control loop bandwidth, thereby improving the response speed. The experiment results show that the fastest transient response time of the digital DC-DC with the proposed prediction is about 8/μs when the load current changes from 0.6 to 0.1A.     

Improving Security and Sharing in Online Social Efficiency for Encrypted Data Networks

Despite that existing data sharing systems in online social networks （OSNs） propose to encrypt data before sharing, the multiparty access control of encrypted data has become a challenging issue. In this paper, we propose a secure data sharing scheme in 0SNs based on ciphertext-policy attribute- based proxy re-encryption and secret sharing. In order to protect users＇ sensitive data, our scheme allows users to customize access policies of their data and then outsource encrypted data to the OSNs service provider. Our scheme presents a multiparty access control model, which enables the disseminator to update the access policy of ciphertext if their attributes satisfy the existing access policy. Further, we present a partial decryption construction in which the computation overhead of user is largely reduced by delegating most of the decryption operations to the OSNs service provider. We also provide checkability on the results returned from the OSNs service provider to guarantee the correctness of partial decrypted ciphertext. Moreover, our scheme presents an efficient attribute revocation method that achieves both forward and backward secrecy. The security and performance analysis results indicate that the proposed scheme is secure and efficient in OSNs.     

A Retrievable Data Perturbation Method Used in Privacy-Preserving in Cloud Computing

With the increasing popularity of cloud computing,privacy has become one of the key problem in cloud security.When data is outsourced to the cloud,for data owners,they need to ensure the security of their privacy;for cloud service providers,they need some information of the data to provide high QoS services;and for authorized users,they need to access to the true value of data.The existing privacy-preserving methods can＇t meet all the needs of the three parties at the same time.To address this issue,we propose a retrievable data perturbation method and use it in the privacy-preserving in data outsourcing in cloud computing.Our scheme comes in four steps.Firstly,an improved random generator is proposed to generate an accurate ＂noise＂.Next,a perturbation algorithm is introduced to add noise to the original data.By doing this,the privacy information is hidden,but the mean and covariance of data which the service providers may need remain unchanged.Then,a retrieval algorithm is proposed to get the original data back from the perturbed data.Finally,we combine the retrievable perturbation with the access control process to ensure only the authorized users can retrieve the original data.The experiments show that our scheme perturbs date correctly,efficiently,and securely.     

Quality of Service Improvement for High-Speed Railway Communications

With the fast development of highspeed railways, a call for fulfilling the notion of communication at ＂anytime, anywhere＂ for high-speed train passengers in the Train Operating Control System is on the way. In order to make a realization of that, new railway wireless communication networks are needed. The most promising one is the Long Term Evolution for Railway which will provide broadband access, fast handover, and reliable communication for high mobility users. However, with the increase of speed, the system is subjected to high bit error rate, Doppler frequency shift and handover failure just like other system does. This paper is trying to solve these problems by employing MIMO technique. Specifically, the goal is to provide higher data rate, higher reliability, less delay, and other relative quality of services for passengers. MIMO performance analysis, resource allocation, and access control for handover and various services in a two-hop model are proposed in this paper. Analytical results and simulation results show that the proposed model and schemes perform well in improving the system performances.     

一种新型指数增益控制60dB可变增益放大器

A CMOS variable gain amplifier（VGA） that adopts a novel exponential gain approximation is presented.No additional exponential gain control circuit is required in the proposed VGA used in a direct conversion receiver.A wide gain control voltage from 0.4 to 1.8 V and a high linearity performance are achieved.The three-stage VGA with automatic gain control（AGC） and DC offset cancellation（DCOC） is fabricated in a 0.18-μm CMOS technology and shows a linear gain range of more than 58-dB with a linearity error less than ±1 dB.The 3-dB bandwidth is over 8 MHz at all gain settings.The measured input-referred third intercept point（IIP3） of the proposed VGA varies from-18.1 to 13.5 dBm,and the measured noise figure varies from 27 to 65 dB at a frequency of 1 MHz.The dynamic range of the closed-loop AGC exceeds 56 dB,where the output signal-to-noise-and-distortion ratio（SNDR） reaches 20 dB.The whole circuit,occupying 0.3 mm^2 of chip area,dissipates less than 3.7 mA from a 1.8-V supply.     

Attribute Based DRM Scheme with Dynamic Usage Control in Cloud Computing

In order to achieve fine-grained access control in cloud computing, existing digital rights management （DRM） schemes adopt attribute-based encryption as the main encryption primitive. However, these schemes suffer from inefficiency and cannot support dynamic updating of usage rights stored in the cloud. In this paper, we propose a novel DRM scheme with secure key management and dynamic usage control in cloud computing. We present a secure key management mechanism based on attribute-based encryption and proxy re-encryption. Only the users whose attributes satisfy the access policy of the encrypted content and who have effective usage rights can be able to recover the content encryption key and further decrypt the content. The attribute based mechanism allows the content provider to selectively provide fine-grained access control of contents among a set of users, and also enables the license server to implement immediate attribute and user revocation. Moreover, our scheme supports privacy-preserving dynamic usage control based on additive homomorphic encryption, which allows the license server in the cloud to update the users＇ usage rights dynamically without disclosing the plaintext. Extensive analytical results indicate that our proposed scheme is secure and efficient.     

MTBAC： A Mutual Trust Based Access Control Model in Cloud Computing

As a new computing mode, cloud computing can provide users with virtualized and scalable web services, which faced with serious security challenges, however. Access control is one of the most important measures to ensure the security of cloud computing. But applying traditional access control model into the Cloud directly could not solve the uncertainty and vulnerability caused by the open conditions of cloud computing. In cloud computing environment, only when the security and reliability of both interaction parties are ensured, data security can be effectively guaranteed during interactions between users and the Cloud. Therefore, building a mutual trust relationship between users and cloud platform is the key to implement new kinds of access control method in cloud computing environment. Combining with Trust Management（TM）, a mutual trust based access control （MTBAC） model is proposed in this paper. MTBAC model take both user＇s behavior trust and cloud services node＇s credibility into consideration. Trust relationships between users and cloud service nodes are established by mutual trust mechanism. Security problems of access control are solved by implementing MTBAC model into cloud computing environment. Simulation experiments show that MTBAC model can guarantee the interaction between users and cloud service nodes.     

一种平均电流模式控制的单电感双输出型开关电源转换器

An integrated single-inductor dual-output （SIDO） switching DC-DC converter is presented. The outputs are specified with 1.2 V/400 mA and 1.8 V/200 mA. A decoupling small signal model is proposed to analyze the multi-loop system and to design the on-chip compensators. An average current control mode is introduced with lossless, continuous current detection. The converter has been fabricated in a 0.25μm 2P4M CMOS process. The power efficiency is 86% at a total output power of 840 mW while the output ripples are about 40 mV at an oscillator frequency of 600 kHz.     

A fixed frequency fast transient response DC-DC controller for VRM application Chen Mingyang(陈明阳), Zhao Menglian*(赵梦恋), Wu Xiaobo(吴晓波)

A 2V-10A fast transient response DC-DC buck controller based on fixed frequency hysteresis control is presented. A carefully designed output voltage filter detects the output capacitor current change which helps the controller to respond immediately after load changes. Adaptive hysteresis control guarantees the switching frequency to be the same as the reference frequency by using a CCII-composed circuit and current mirrors. The controller is designed and fabricated in a TSMC 0.35 μm process. Simulation and test results show that this con- troller achieves a 20 μs settling time in one single switching cycle when load current changes from 1 A to the full load condition at 10 A.     

一种用于数字助听器SoC的高性能低功耗、可配置自动增益控制环路

A low-power,configurable auto-gain control loop for a digital hearing aid system on a chip(SoC) is presented.By adopting a mixed-signal feedback control structure and peak detection and judgment,it can work in automatic gain or variable gain control modes through a digital signal processing unit.A noise-reduction and dynamic range(DR) improvement technique is also used to ensure the DR of the circuit in a low-voltage supply.The circuit is implemented in an SMIC 0.13 μm 1P8M CMOS process.The measurement results show that in a 1 V power supply,1.6 kHz input frequency and 200 mVp-p,the SFDR is 74.3 dB,the THD is 66.1 dB,and the total power is 89 μW,meeting the application requirements of hearing aid SoCs.     

Explicit Rate Based Transmission Control Scheme in Vehicle-to-lnfrastructure Communication Networks

In Vehicle-to-Infrastructure （V2I） communication networks, mobile users are able to access Internet services, such as video stre- aming, digital map downloading, database acc- ess, online gaming, and even safety services like accident alarm, traffic condition broadcast, etc., through fixed roadside units. However, the dynamics of communication environment and frequent changing topology critically challe- nge the design of an efficient transport layer protocol, which makes it difficult to guarantee diverse Quality of Service （QoS） requirements for various applications. In this paper, we pre- sent a novel transport layer scheme in infra- structure based vehicular networks, and aim to resolve some challenging issues such as sou- rce transfer rate adjustment, congestion avoid- ance, and fairness. By precisely detecting pac- ket losses and identifying various causes of th- ese losses （for example, link disconnection, cha- nnel error, packet collision, buffer overflow）, the proposed scheme adopts different reacting mechanisms to deal with each of the losses. Moreover, it timely monitors the buffer size of the bottleneck Road-Side Unit （RSU）, and dyn- amically makes transfer rate feedbacks to sou- rce nodes to avoid buffer overflow or vacancy. Finally, analysis and simulation results show that the proposed scheme not only successfully reduces packet losses because of buffer over- flow and link disconnection but also improves the utilization efficiency of channel resource.     

CMOS反相器在高功率微波下闩锁效应的温度影响

The temperature dependence of the latch-up effects in a CMOS inverter based on 0.5 μm technology caused by high power microwave （HPM） is studied. The malfunction and power supply current characteristics are revealed and adopted as the latch-up criteria. The thermal effect is shown and analyzed in detail. CMOS in- verters operating at high ambient temperature are confirmed to be more susceptible to HPM, which is verified by experimental results from previous literature. Besides the dependence of the latch-up triggering power P on the ambient temperature T follows the power-law equation P = ATβ. Meanwhile, the ever reported latch-up delay time characteristic is interpreted to be affected by the temperature distribution. In addition, it is found that the power threshold increases with the decrease in pulse width but the degree of change with a certain pulse width is constant at different ambient temperatures. Also, the energy absorbed to cause latch-up at a certain temperature is basically sustained at a constant value.     

X 波段氮化镓合成固态放大器

Based on a self-developed A1GaN/GaN HEMT with 2.5 mm gate width technology on a SiC substrate, an X-band GaN combined solid-state power amplifier module is fabricated. The module consists of an AIGaN/GaN HEMT, Wilkinson power couplers, DC-bias circuit and microstrip line. For each amplifier, we use a bipolar DC power source. Special RC networks at the input and output and a resistor between the DC power source and the gate of the transistor at the input are used for cancellation of self-oscillation and crosstalk of low-frequency of each amplifier. At the same time, branches of length 3λ/4 for Wilkinson power couplers are designed for the elimination of self-oscillation of the two amplifiers. Microstrip stub lines are used for input matching and output matching. Under Vds = 27 V, Vgs = -4.0 V, CW operating conditions at 8 GHz, the amplifier module exhibits a line gain of 5.6 dB with power added efficiency of 23.4%, and output power of 41.46 dBm （14 W）, and the power gain compression is 3 dB. Between 8 and 8.5 GHz, the variation of output power is less than 1.5 dB.     

A controllable resistor and its applications in pole-zero tracking frequency compensation methods for LDOs

This paper presents a controllable resistor, which is formed by a MOS-resistor working in the deep triangle region and an auxiliary circuit. The auxiliary circuit can generate the gate-source voltage which is proportional to the output current of an low dropout regulator for the MOS-resistor. Thus, the equivalent output resistance of the MOS-resistor is inversely proportional to the output current, which is a suitable feature for pole-zero tracking frequency compensation methods. By switching the type of the MOS-resistor and current direction through the auxiliary circuit, the controllable resistor can be suitable for different applications. Three pole-zero tracking frequency compensation methods based on a single Miller capacitor with hulling resistor, unit-gain compensation cell and pseudo-ESR （equivalent serial resistor of load capacitor） power stage have been realized by this controllable resistor. Their advantages and limitations are discussed and verified by simulation results.     

DCFl-Checker： Checking Kernel Dynamic Control Flow Integrity with Performance Monitoring Counter

It is a challenge to verify integrity of dynamic control flows due to their dynamic and volatile nature. To meet the challenge, existing solutions usually implant an ＂attachment＂ in each control transfer. However, the attachment introduces additional cost except performance penalty. For example, the attachment must be unique or restrictedly modified. In this paper, we propose a novel approach to detect integrity of dynamic control flows by counting executed branch instructions without involving any attachment. Our solution is based on the following observation. If a control flow is compromised, the number of executed branch instructions will be abnormally increased. The cause is that intruders usually hijack control flows for malicious execution which absolutely introduces additional branch instructions. Inspired by the above observation, in this paper, we devise a novel system named DCFI- Checker, which detect integrity corruption of dynamic control flows with the support of Performance Monitoring Counter （PMC）. We have developed a proof-of-concept prototype system of DCFI-Checker on Linux fedora 5. Our experiments with existing kemel rootkits and buffer overflow attack show that DCFI- Checker is effective to detect compromised dynamic control transfer, and performance evaluations indicate that performance penaltyinduced by DCFI-Checker is acceptable.     

用于TFT-LCD驱动芯片的省面积高效率内置电荷泵

An area-saving and high power efficiency charge pump is proposed, and methods for optimizing the operation frequency and improving the power efficiency are discussed. Through sharing coupling capacitors the proposed charge pump realizes two DC-DC functions in one circuit, which can generate both positive and negative high voltages. Due to sharing of the coupling capacitors, as compared with a previous charge pump designed by us for a TFT-LCD driver IC, the die area and the amounts of necessary external capacitors are reduced by 40% and 33%, respectively. Furthermore, the charge pump＇s power efficiency is improved by 8% as a result of employing the new topology. The designed circuit has been successfully applied in a one-chip TFT-LCD driver IC implemented in a 0.18 μm low/mid/high mixed-voltage CMOS process.     

用于高压ESD保护的LDMOS中触发电压退化效应的研究

The trigger voltage walkin effect has been investigated by designing two different laterally diffused metal-oxide-semiconductor （LDMOS） transistors with an embedded silicon controlled rectifier （SCR）. By inserting a P＋ implant region along the outer and the inner boundary of the N＋ region at the drain side of a conventional LDMOS transistor, we fabricate the LDMOS-SCR and the SCR-LDMOS devices with a different triggering order in a 0.5/zm bipolar-CMOS-DMOS process, respectively. First, we perform transmission line pulse （TLP） and DC-voltage degradation tests on the LDMOS-SCR. Results show that the trigger voltage walk-in effect can be attributed to the gate oxide trap generation and charge trapping. Then, we perform TLP tests on the SCR-LDMOS. Results indicate that the trigger voltage walk-in effect is remarkably reduced. In the SCR-LDMOS, the embedded SCR is triggered earlier than the LDMOS, and the ESD current is mainly discharged by the parasitic SCR structure. The electric potential between the drain and the gate decreases significantly after snapback, leading to decreased impact ionization rates and thus reduced trap generation and charge trapping. Finally, the above explanation of the different trigger voltage walk-in behavior in LDMOS-SCR and SCR-LDMOS devices is confirmed by TCAD simulation.     

A power scalable PLL frequency synthesizer for high-speed △-∑ ADC

A 35-130 MHz/300-360 MHz phase-locked loop frequency synthesizer for △-∑ analog-to-digital con- verter （ADC） in 65 nm CMOS is presented. The frequency synthesizer can work in low phase-noise mode （300-360 MHz） or in low-power mode （35-130 MHz） to satisfy the ADC＇s requirements. To switch between these two modes, a high frequency GHz LC VCO followed by a divided-by-four frequency divider and a low frequency ring VCO followed by a divided-by-two frequency divider are integrated on-chip. The measured results show that the fre- quency synthesizer achieves a phase-noise of-132 dBc/Hz at 1 MHz offset and an integrated RMS jitter of 1.12 ps with 1.74 mW power consumption from a 1.2 V power supply in low phase-noise mode. In low-power mode, the frequency synthesizer achieves a phase-noise of-112 dBc/Hz at 1 MHz offset and an integrated RMS jitter of 7.23 ps with 0.92 mW power consumption from a 1.2 V power supply.     

一种新颖的片内高压转低压电源转换方案

A novel power supply transform technique for high voltage IC based on the TSMC 0.6μm BCD process is achieved. An adjustable bandgap voltage reference is presented which is different from the traditional power supply transform technique. It can be used as an internal power supply for high voltage IC by using the push-pull output stage to enhance its load capability. High-order temperature compensated circuit is designed to ensure the precision of the reference. Only 0.01 mm^2 area is occupied using this novel power supply technique. Compared with traditional technique, 50% of the area is saved, 40% quiescent power loss is decreased, and the temperature coefficient of the reference is only 4.48 ppm/℃. Compared with the traditional LDO （low dropout） regulator, this power conversion architecture does not need external output capacitance and decreases the chip-pin and external components, so the PCB area and design cost are also decreased. The testing results show that this circuit works well.     

一种基于SOI基的N区控制阳极LIGBT新结构

A new lateral insulated-gate bipolar transistor （LIGBT） structure on SOI substrate, called an n-region controlled anode LIGBT （NCA-LIGBT）, is proposed and discussed. The n-region controlled anode concept results in fast switch speeds, efficient area usage and effective suppression NDR in forward I-V characteristics. Simulation results of the key parameters （n-region doping concentration, length, thickness and p-base doping concentration） show that the NCA-LIGBT has a good tradeoff between turn-off time and on-state voltage drop. The proposed LIGBT is a novel device for power ICs such as PDP scan driver ICs.