一种基于半分析法的HEMT小信号参数的提取方法

提出了一种基于半分析法的高速电子迁移率半导体晶体管小信号模型的提取方法.此方法是用测试结构的方法来提取焊盘电容和寄生电感,半分析法来提取寄生电阻,提高了寄生电阻的提取精度.在频率高达40 GHz的范围内,多偏置情况下模拟的S参数和测试的S参数曲线吻合良好,证明这种方法是正确的.     

0.35μm BiCMOS工艺的器件建模

针对0.35μmBiCMOS工艺的MOS及Bipolar晶体管器件,分析其结构特征及相应物理效应,选取相应的晶体管器件理论模型,确定了样管测试条件和方法,设计了测试结构及模型验证环振电路,完成用于试验流片及参数提取的测试版芯片的设计,最终利用测试芯片的测量数据提取模型参数,分别建立高精度的MOS及Bipolar器件SPICE模型.     

高频硅基光电晶体管SPICE模型的建立及关键参数的提取

硅基光电晶体管在高频通信、自动控制、电力系统领域具有广泛的应用前景.从系统验证和仿真的角度,迫切需要建立光电晶体管的等效电路模型,该模型需要包含电学特性和光学特性.本文提出了一种高频(100MHz～1GHz)硅基光电晶体管的SPICE(Simulation Program with Integrated Circuit Emphasis)等效模型,包含器件的主要光电特性,通过TCAD(Technology Computer Aided Design)仿真建立了模型中关键电学和光学参数的提取方法.基于所建立的高频光电晶体管的SPICE模型等效电路进行仿真,所得到的仿真结果能够完整描述光电晶体管的电学特性和光学特性,并验证了模型在器件模拟与电路应用上的可行性,表明本文所提出的SPICE模型和参数提取方法,对于基于高频光电晶体管的系统仿真,具有参考价值.     

SiGe HBT的Mextram 504模型温度参数提取与模型改进

针对IMEC 0.13μm准自对准SiGe BiCMOS工艺制成的基区Ge组分二阶分布结构SiGe异质结双极晶体管,在25～125℃温度范围内,对其进行了包括Early电压,Gummel图形等在内的完整双极晶体管特性曲线测量,提取了该器件在25～125℃范围内的温度可变Mextram 504模型参数.在此基础上,为Mextram 504模型对0.13μm基区Ge组分二阶分布SiGe异质结双极晶体管探索了完整的模型提取方案.提出了对Mextram 504模型温度参数提取方法的改进,优化了提取流程.对SiGe异质结双极晶体管雪崩电流受温度影响的特性进行了讨论,为Mextram模型提出了雪崩外延层的有效厚度的温度变化经验公式和新的雪崩电流温度变化参数,提高了Mextram模型对不同温度下SiGe双极型晶体管进行模拟仿真的精确度.     

一种新的HBT小信号模型参数优化提取法

阐述了一种新的异质结双极型晶体管（HBT）的小信号模型参数提取方法――综合多偏置点优化参数提取法. 对HBT小信号模型进行推导并确定外部参数和内部参数的计算公式;介绍了多偏置点优化算法,并在GaInP/ GaAs HBT器件上进行了鲁棒性和精确性测试. 实验采用了一系列随机初始值,结果表明提取的参数值具有唯一收敛性和精确性,仿真结果与测量数据的相对误差小于1%.     

一个基于BSIM3的LDMOS大信号模型

提出了一个基于BSIM3的LDMOS大信号模型.LDMOS晶体管分为本征MOS晶体管和漂移区电阻两部分,本征MOS晶体管采用BSIM3模型,漂移区电阻采用一个随栅漏电压变化的电阻模型.根据ISE仿真结果,可以得到漂移区电阻模型.模型考虑自加热效应后,经过参数提取,模拟数据可以很好地与实际器件的测试数据相吻合,说明模型可用于LDMOS功率器件的电路仿真.     

双极型晶体管直流模型参数提取的局部优化方法

采用ＳＰＩＣＥ进行电路模拟时，获取适用的晶体管模型参数是非常重要的，它将直接影响电路模拟的精度。提取模型参数的方法有分段直接提取法、整体优化法以及局部优化法。前两种方法有其各自的缺点，局部优化法针对使用它们可能遇到的问题做了改进。本文针对双极型晶体管直流模型参数的提取，详细介绍了一种局部优化方法，经过使用，能够达到满意的精度。     

用改进的差分进化算法提取HEMT小信号模型的参数

高电子迁移率晶体管(HEMT)以其噪声低和频带宽等特点在微波毫米波领域得到了广泛的应用,本文在传统优化方法的基础上,对差分进化算法进行了改进,并基于该算法对HEMT小信号等效电路模型进行了模型参数提取。实验结果表明,2×20μm GaAs HEMT器件S参数模拟结果和测试结果在40 GHz频率范围内吻合很好,误差在2%以内。     

一种精确的有机薄膜晶体管模型参数提取方法研究

提出了一种可以精确获得有机薄膜晶体管(OTFT)的直流电流-电压模型中的参数提取方法。该方法通过对实验获得的输出特性曲线和转移特性曲线进行计算和处理,精确获得OTFT器件模型中的7个参数。实验制备了两种采用不同绝缘栅的基于并五苯的底栅顶接触的OTFT,并对其进行了参数提取。利用提取的参数及直流电流-电压模型对OTFT进行模拟,将模拟结果与实验测试结果相比较发现,模拟得到的输出特性及转移特性与测试结果拟合得很好,验证了本文中参数提取方法的正确性。应用建立的模型及本文中的参数提取方法可以用于OTFT器件的设计与模拟。     

硅双极型晶体管的可缩放MEXTRAM模型及参数提取

文章在分析Mextram模型缩放性的基础上,介绍了可缩放Mextram模型的参数提取方法.结合不同几何尺寸的硅双极型晶体管的测试数据,进行了参数提取.得到的可缩放Mextram模型的仿真结果与测试数据吻合得很好.     

SiGe HBT小信号等效电路的参数直接提取

提出了一种求解硅锗异质结双极型晶体管(SiGe HBT)小信号等效电路模型的参数直接提取方法.整个提取过程使用由小信号等效电路推导出的一系列解析表达式,不使用任何数值优化方法.参数提取结果使用ADS软件仿真验证.结果表明,该方法简单易行,较为精确.     

SiGe HBT非准静态小信号等效电路的参数提取

提出了一种硅锗异质结双极型晶体管（SiGe HBT）非准静态效应的小信号等效电路模型的参数提取方法。整个参数提取过程建立在由非准态效应的小信号等效电路推导出的一系列泰勒级数解析公式并结合参数直接法,该方法依赖于测量的S参数,不使用任何的数值优化法,参数提取结果使用CAD仿真验证。结果表明该参数提取方法简单易行,较为精确,该方法能够用到不同工艺SiGe HBT参数提取。     

A new parameter extraction technique for small-signal equivalentcircuit of polysilicon emitter bipolar transistors

We propose a new parameter extraction method for advanced polysilicon emitter bipolar transistors. This method is based on the predetermination of equivalent circuit parameters using the analytical expressions of de-embedded Z-parameters of these devices. These parameter values are used as initial values for the parameter extraction process using optimization. The entire device equivalent circuit, containing RF probe pad and interconnection circuit parameters extracted by test structures, is optimized to fit measured S-parameters for eliminating de-embedding errors due to the imperfection of pad and interconnection test structures. The equivalent circuit determined by this method shows excellent agreement with the measured S-parameters from 0.1 to 26.5 GHz     

双极型晶体管模型参数提取的组合优化算法

本文讨论双极型晶体管（ＢＪＴ）器件模型参数提取的最优化方法，提出了一种解决全局最优的组合算法，与通常的Ｇａｕｓｓ－Ｎｅｗｔｏｎ法相比，其突出的优点是：在计算过程中只需计算目标函数值，不必计算目标函数的梯度，所获得的解的全局最优性也较好，本文提出的方法在全局搜索的基础上还同时解决了初值选择与迭代策略，是一种简便、高效的全局优化算法。     

Predictive worst case statistical modeling of 0.8-μm BICMOSbipolar transistors: a methodology based on process and mixeddevice/circuit level simulators

The authors discuss the use of mixed-level physics-based device/circuit simulation software and semiconductor process simulator in the construction of predictive worst case process conditions for bipolar transistors currently being manufactured in AT&T 0.8-μm BICMOS technology. Process fluctuations are introduced into the process simulator using the Latin hypercube (Monte Carlo) sampling method. The method is different from those in previous similar studies in that the compact device model parameter extraction step for each sample process is bypassed and active devices in the circuit are described by the physical device simulator rather than a compact model representation. This eliminates deficiencies associated with compact semiconductor device models. Furthermore, inaccuracies and difficulties introduced by compact model parameter extractions (especially for bipolar transistors) are also eliminated. The method is very useful in identifying critical process steps which determine the electrical performance of the devices and circuits     

Parameter extraction technique for HBT equivalent circuit usingcutoff mode measurement

A parameter extraction method based on the S-parameter measurements of the heterojunction bipolar transistors (HBTs) biased to cutoff is proposed. This method is applied to confirm the results for the RF probe pad and interconnection pattern parasitics obtained from the special test structures, and to determine some of the device capacitances of the HBT. The remaining device parameters are extracted by the S-parameter measurements of the devices biased to the active mode. The extraction technique gives good agreement between the equivalent circuit and the measured S-parameters of the HBT including probe pads and interconnections     

A SPICE compatible subcircuit model for lateral bipolar transistorsin a CMOS process

This paper describes a SPICE compatible subcircuit model of a lateral pnp transistor, which was fabricated in a 0.6 μm CMOS process. The extraction of a dc parameter set for the lateral device is more complicated than for a vertical device because of the presence of two parasitic vertical bipolar transistors which are formed by the emitter/collector, the base and the substrate regions. The SPICE Gummel-Poon model does not predict the substrate current accurately. This paper proposes a method which involves the use of a subcircuit incorporating three SPICE Gummel-Poon models [representing one lateral and two parasitic vertical bipolar junction transistors (BJT's)]. The development of this model, its implementation and the results obtained are outlined and discussed. This circuit model is SPICE compatible and can thus be used in commercial simulators. The model provides good agreement over a wide range of measured dc data including substrate current prediction     

晶体管直流模型参数的优化提取

本文描述了一个提取MOS场效应晶体管和双极型晶体管直流模型参数的程序。所采用的算法是Meger和Roth方法,它具有较好的收敛性。在目标函数中引入惩罚项,有效地防止了模型参数非物理解的出现。将双极型晶体管直流模型参数分组后优化提取,减少了计算量。应用本程序进行了大量实际器件参数的提取,获得了较满意的结果。     

A self-consistent method for complete small-signal parameterextraction of InP-based heterojunction bipolar transistors (HBT's)

A complete method for parameter extraction from small-signal measurements of InP-based heterojunction bipolar transistors (HBT's) is presented. Employing analytically derived equations, a numerical solution is sought for the best fit between the model and the measured data. Through parasitics extraction and an optimization process, a realistic model for a self-aligned HBT technology is obtained. The results of the generated s-parameters from the model for a 2×10 μm² emitter area device are presented over a frequency range of 250 MHz-36 GHz with excellent agreement to the measured data