一种扩展故障安全系统理论

本文以广义故障安全系统理论和扩展故障安全概念为基础,提出了一种扩展故障安全系统理论,它包括电路的扩展故障安全特性的有关定义、基本电路的模块结构及模块之间互连的条件等内容。     

Boolean process

Boolean algebra successfully describes the logical behavior of a digital circuit, and has been widely used in electronic circuit design and test With the development of high speed VLSIs it is a drawback for Boolean algebra to be unable to describe circuit timing behavior. Therefore a Boolean process is defined as a family of Boolean van ables relevant to the time parameter t. A real-valued sample of a Boolean process is a waveform. Waveform functions can be manipulated formally by using mathematical tools. The distance, difference and limit of a waveform polynomial are defined, and a sufficient and necessary condition of the limit existence is presented. Based on this, the concept of sensitization is redefined precisely to demonstrate the potential and wide application possibility The new definition is very different from the traditional one, and has an impact on determining the sensitizable paths with maximum or minimum length, and false paths, and then designing and testing high performance circuits     

可信系统与网络

容错计算学科领域,以IEEE国际容错计算会议为标志,发展了30年之后,于2000年定名为可信计算与通信。本文提供一些信息,报导一些新情况,供研究人员特别是我国科技管理人员参考。     

集成电路中冒险的检测和消除

CMOS集成电路中的冒险现象会增大电路的功耗,所以对集成电路中冒险的检测和消除的研究十分重要。文章分别对集成电路中原始输入单跳变,和多跳变两种情况下产生的冒险现象进行了研究,提出了检测和消除冒险的方法。文章的方法可以在非常短的时间内检测出电路中可能产生冒险的点,对于单个原始输入跳变的情况可以通过增加很少的电路开销来消除一部分冒险点。     

超立方体多处理机系统中基于扩展安全向量的容错路由

针对超立方体结构的多处理机系统中存在链路故障的情况,修改了吴杰提出的安全向量的概念,提出了扩展安全向量的概念,并给出了一个基于扩展安全向量的容错路由算法,与基于安全向量的路由算法相比,基于扩展安全向量的路由算法搜索最优通路的能力有了非常大的提高,即使故障数较多时,它仍能保证把绝大多数源、目的节点间有最优通路和消息沿最优通路传递。超立方体结构中各节点扩展安全向量的赋值可以通过ｎ－１轮邻接点的信息交换     

一种新的语音流队列管理调度机制

本文提出一种新的语音流队列管理调度机制,结合随机早期探测(RED)和主动丢包调度算法实现因特网语音流的队列管理和调度.采用仿真方法分析了新机制的性能特征,并与RED做了性能对比.当网络拥塞时,该算法可有效改善包转发的性能.语音质量测试表明新机制是可行的和有效的.     

Aliasing Errors in Parallel Signature Analyzers

A Linear Feedback Shift Register (LFSR)can be used to compress test response data as a SignatureAnalyzer(SA). Parallel Signature Analyzers (PSAs) implemented as multiple input LFSRs are faster and re-quire less hardware overhead than Serial Signature Analyzers (SSAs)for compacting test response data forBuilt-In Serf-Test (BIST)in IC or hoard-testing environments. However, the SAs are prone to aliasing errorsbecause of some specific types of error patterns. An alias is a faulty output signature that is identical to thefault-free signature. A penetrating analysis of detecting capability of SAs depends strongly on mathematicalmanipulations, instead of being aware of some special cases or examples. In addition , the analysis should notbe restricted to a particular structure of LFSR, but be appropriate for various structures of LFSRs. This pa-per presents necessary and sufficient conditions for aliasing errors based on a complete mathematical descrip-tion of various types of SAs. An LFSR reconfiguration scheme is suggested which will prevent any aliasingdouble errors. Such a prevention cannot be obtained by any extension of an LFSR.     

Product-Oriented Test-Pattern Generation for Programmable Logic Arrays

A Product-oriented test-pattern generation strategy for Programmable Logic Arrays(PLAs)is pres-ented.First the personality of products is discussed.Products are divided into several categories to speed up thetest generation.This strategy aims at generating a very compact test set for crosspoint defects through the fol-lowing steps:1)generate special test vectors for each category of products at the beginning of test generation.Each vector is capable of detecting a great amount of crosspoint defects;2)generate test vectors for the defectswhich are not covered by the tests already generated.In this step,some heuristics are employed to acceleratetest generation.Based on this strategy,a PLA test-pattern generation system is developed and the experimen-tal results are analyzed.     

基于FAN算法的测试产生系统及实验研究

本文详细介绍了一个基于FAN算法的测试产生系统的实现以及利用该系统得到的一些有意义的实验结果。     

可编程序逻辑阵列的测试产生

本文在PLA的统一的故障模型下,给出一个测试产生方法,以诊察所有可诊察的交叉点单故障,以及同一阵列中相同模式的交叉点多故障。为了诊察多故障,给出了基本多重故障的定义及其充要条件,以便把多重故障的测试问题变为基本多重故障的测试问题。这个测试产生手续还包括测试集的优化,以致可以达到测试集最小。所谓“最小”是指去掉一个测试,就会使某些可诊察的故障不能披诊察。最后,给出了这个测试集大小的估计。