Illumination interface stability of aging-diffusion-modulated high performance InZnO/DyOx transistors and exploration in digital circuits

In current study,the rare-reported solution-driven DyOx films have been prepared to act as the dielectric layer of high performance InZnO/DyOx thin film transistors (TFTs).Annealing temperature depen-dent thermal decomposition,morphology,crystallization behavior,and chemical compositions of DyOx and InZnO films have been investigated respectively.Results have demonstrated that air-annealed InZnO/DyOx TFTs possess the improved electrical performance,including ultrahigh on/offcurrent ratio of 1 × 109,larger saturation mobility of 12.6 cm2 V-1 s-1 and negligible hysteresis after 10 d aging diffusion in the relative humidity (RH) of 40 ％ air ambient,which has been explored by the variable range-hopping(VRH) percolation model and energy band theory.The distinct illumination bias stability can be attributed to the generated various interface defects and concluded that the white light illuminated TFT behaves the higher stability with the smaller threshold voltage shift of 0.25 V.To confirm its feasible application in digital circuit,a resistor-loaded inverter based on InZnO/DyOx TFTs has been constructed.A high gain of 10.1 and good dynamic response behavior have been detected at a low operating voltage of 2 V.As a result,it can be inferred that diffusion-induced enhanced carrier transporting mechanism is an economical and effective method to optimize the electrical performance of solution-derived lnZnO/DyOx TFTs,indicating its potential application prospects in flexible transparent electronics with low power consumption.     

Effect of gallium content on bias stress stability of solution-deposited Ga-Sn-Zn-O semiconductor transistors

We generated solution-processed thin film transistor (TFTs) using gallium tin zinc oxide (GTZO, Ga-Sn-Zn-O) layers as the channel that exhibit improved bias-stress stability during device operation under ambient conditions. The cause of the bias-stress stability was investigated through comparisons with zinc tin oxide (ZTO, Zn-Sn-O)-based TFTs, which suffer red from bias stress instability. Based on in-depth analysis of the electrical characteristics and chemical structure of both GTZO and ZTO layers, it was discovered that the GTZO layers had a significantly lower oxygen vacancy concentration than did the ZTO layer, which influenced the electrical performance of the GTZO transistors as well as their bias-stress stability. When 5 mol% gallium was added, a bias stress-stable transistor was obtained, exhibiting typical semiconductor behavior with a field-effect mobility of 1.2 cm² V^− 1 s^− 1, on/off ratio of 10⁶, off-current of 1 × 10^− 10 A, and threshold voltage of 19.6 V. Further doping of Ga deteriorated the device performance, which was found to be associated with decreased carrier concentration and segregation of an insulating secondary phase.     

Thin film transistors by solution-based indium gallium zinc oxide/carbon nanotubes blend

Solution-based indium gallium zinc oxide (IGZO)/single-walled carbon nanotubes (SWNTs) blend have been used to fabricate the channel of thin film transistors (TFTs). The electrical characteristics of the fabricated devices were examined. We found a low leakage current and a higher on/off currents ratio for TFT with SWNTs compared to solution-based TFTs made without SWNTs. The saturation field effect mobility (μ_sat) of about 0.22 cm²/Vs, the current on/off ratio is ~ 10⁵, the subthreshod swing is ~ 2.58 V/decade and the threshold voltage (V_th) is less than − 2.3 V. We demonstrated that the solution-based blend active layer provides the possibility of producing higher performance TFTs for low-cost large area electronic and flexible devices.     

High-performance transparent inorganic-organic hybrid thin-film n-type transistors

High-performance thin-film transistors (TFTs) that can be fabricated at low temperature and are mechanically flexible, optically transparent and compatible with diverse substrate materials are of great current interest. To function at low biases to minimize power consumption, such devices must also contain a high-mobility semiconductor and/or a high-capacitance gate dielectric. Here we report transparent inorganic-organic hybrid n-type TFTs fabricated at room temperature by combining In2O3 thin films grown by ion-assisted deposition, with nanoscale organic dielectrics self-assembled in a solution-phase process. Such TFTs combine the advantages of a high-mobility transparent inorganic semiconductor with an ultrathin high-capacitance/low-leakage organic gate dielectric. The resulting, completely transparent TFTs exhibit excellent operating characteristics near 1.0 V with large field-effect mobilities of >120 cm2 V(-1) s(-1), drain-source current on/off modulation ratio (I(on)/I(off)) approximately 10(5), near-zero threshold voltages and sub-threshold gate voltage swings of 90 mV per decade. The results suggest new strategies for achieving 'invisible' optoelectronics.     

Corrugated Heterojunction Metal‐Oxide Thin‐Film Transistors with High Electron Mobility via Vertical Interface Manipulation

A new strategy is reported to achieve high‐mobility, low‐off‐current, and operationally stable solution‐processable metal‐oxide thin‐film transistors (TFTs) using a corrugated heterojunction channel structure. The corrugated heterojunction channel, having alternating thin‐indium‐tin‐zinc‐oxide (ITZO)/indium‐gallium‐zinc‐oxide (IGZO) and thick‐ITZO/IGZO film regions, enables the accumulated electron concentration to be tuned in the TFT off‐ and on‐states via charge modulation at the vertical regions of the heterojunction. The ITZO/IGZO TFTs with optimized corrugated structure exhibit a maximum field‐effect mobility >50 cm² V^?1 s^?1 with an on/off current ratio of >10⁸ and good operational stability (threshold voltage shift <1 V for a positive‐gate‐bias stress of 10 ks, without passivation). To exploit the underlying conduction mechanism of the corrugated heterojunction TFTs, a physical model is implemented by using a variety of chemical, structural, and electrical characterization tools and Technology Computer‐Aided Design simulations. The physical model reveals that efficient charge manipulation is possible via the corrugated structure, by inducing an extremely high carrier concentration at the nanoscale vertical channel regions, enabling low off‐currents and high on‐currents depending on the applied gate bias.     

Bias stress effects on different dielectric surfaces of pentacene thin-film transistors

In this paper, it was demonstrated that pentacene thin-film transistors (TFTs) were fabricated with an organic adhesion layer between an organic semiconductor and a gate insulator. In order to form polymeric film as an adhesion layer, a vapor deposition polymerization (VDP) process was introduced to substitute for the usual spin-coating process. Field effect mobility, threshold voltage, and on/off current ratio in pentacene TFTs with a 15 nm thick organic adhesion layer were about 0.4 cm2/Vs, -1 V, and 10(6), respectively. We also demonstrated that threshold voltage strongly depends on the stress time when a gate voltage has been applied for bias stress test. We suggest that a polyimide adhesion layer fabricated by the VDP method can be applied to realize organic TFTs with long-term stability because of lower threshold voltage shifts due to reduced charge trapping at the interface between the pentacene semiconductor and the polyimide layer.     

Improvement in the negative bias temperature stability of ZnO based thin film transistors by Hf and Sn doping

We assessed the performance of ZnO TFTs using Si₃N₄ gate dielectrics after various treatments. A remarkable improvement in the transfer characteristics was obtained for the O₂ plasma treated ZnO TFT and SiO₂ interlayer deposited ZnO TFT. Also, we developed amorphous hafnium-zinc-tin oxide (HZTO) thin film transistors (TFTs) and investigated the influence of hafnium (Hf) doping on the electrical characteristics of the hafnium-zinc oxide (HZO) thin film transistors. Doping with Hf can decrease the carrier concentration, which may result from a decrease of the field effect mobility, and reduce oxygen vacancy related defects in the interfacial layer. Adding tin (Sn) can suppress the growth of a crystalline phase in the HZTO films. The HZTO TFTs exhibited good electrical properties with a field effect mobility of 14.33 cm²/Vs, a subthreshold swing of 0.97 V/decade, and a high I_ON/OFF ratio of over 10⁹.     

Effect of the annealing ambient on the electrical characteristics of the amorphous InGaZnO thin film transistors

The influence of the thermal annealing on the amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs) under different ambient gases has been systematically addressed. The chemical bonding states and transfer characteristics of a-IGZO TFTs show evident dependence on the annealing ambient gas. For the a-IGZO TFTs in the oxygen ambient annealing at 250 degrees C for 30 mins exhibited a maximum field effect mobility (max muFE) of 9.36 cm2/V x s, on/off current ratio of 6.12 x 10(10), and a subthreshold slope (SS) of 0.21 V/decade. Respectively, the as-deposited ones without annealing possess a max muFE of 6.61 cm2/V x s, on/off current ratio of 4.58 x 10(8), and a SS of 0.46 V/decade. In contrast, the a-IGZO TFTs annealed at 250 degrees C for 30 mins in the nitrogen ambient would be degraded to have a max muFE of 0.18 cm2/V x s, on/off current ratio of 2.22 x 10(4), and a SS of 7.37 V/decade, corresponding. It is attributed to the content of the oxygen vacancies, according the x-ray photoelectron spectroscopy (XPS) analyze of the three different samples.     

Zinc cadmium oxide thin film transistors fabricated at room temperature

Zinc cadmium oxide (ZnCdO) transparent thin film transistors (TFTs) have been fabricated with a back-gate structure using highly p-type Si (001) substrate. For the active channel, 30 nm, 50 nm, and 100 nm thick ZnCdO thin films were grown by pulsed laser deposition. The ZnCdO thin films were wurtzite hexagonal structure with preferred growth along the (002) direction. All the samples were found to be highly transparent with an average transmission of about 80%~ in the visible range. We have investigated the change of the performance of ZnCdO TFTs as the thickness of the active layer is increased. The carrier concentration of ZnCdO thin films has been confirmed to be increased from 10¹⁶ to 10¹⁹ cm⁻³ as the film thickness increased from 30 to 100 nm. Base on this result, the ZnCdO TFTs show a thickness-dependent performance which is ascribed to the carrier concentration in the active layer. The ZnCdO TFT with 30 nm active layer showed good off-current characteristic of below ~ 10¹¹, threshold voltage of 4.69 V, a subthreshold swing of 4.2 V/decade, mobility of 0.17 cm²/V s, and on-to-off current ratios of 3.37 × 10⁴.     

Fully transparent thin-film transistor devices based on SnO2 nanowires

We report on studies of field-effect transistor (FET) and transparent thin-film transistor (TFT) devices based on lightly Ta-doped SnO2 nano-wires. The nanowire-based devices exhibit uniform characteristics with average field-effect mobilities exceeding 100 cm2/V x s. Prototype nano-wire-based TFT (NW-TFT) devices on glass substrates showed excellent optical transparency and transistor performance in terms of transconductance, bias voltage range, and on/off ratio. High on-currents and field-effect mobilities were obtained from the NW-TFT devices even at low nanowire coverage. The SnO2 nanowire-based TFT approach offers a number of desirable properties such as low growth cost, high electron mobility, and optical transparency and low operation voltage, and may lead to large-scale applications of transparent electronics on diverse substrates.     

Characteristics of transparent ZnO based thin film transistors with amorphous HfO2 gate insulators and Ga doped ZnO electrodes

Coplanar type transparent thin film transistors (TFTs) have been fabricated on the glass substrates. The devices consist of intrinsic ZnO, Ga doped ZnO (GZO), and amorphous HfO₂ for the semiconductor active channel layer, electrode, and gate insulator, respectively. GZO and HfO₂ layers were prepared by using a pulsed laser deposition (PLD) and intrinsic ZnO layers were fabricated by using an rf-magnetron sputtering. The transparent TFT exhibits n-channel, enhancement mode behavior. The field effect mobility, threshold voltage, and a drain current on-to-off ratio were measured to be 14.7 cm²/Vs, 2 V, and 10⁵, respectively. High optical transmittance (> 85%) in visible region makes ZnO TFTs attractive for transparent electronics.     

Flexible organic thin-film transistors using single-walled carbon nanotubes as an activated channel

We report on the fabrication of organic thin-film transistors (OTFTs) with a spun cross linked poly-4-vinylphenol (PVP) dielectric on a polyethersulphone (PES) flexible substrate. To improve the electrical performance of OTFTs, we employed a random single-walled carbon nanotubes (SWNTs) network as a carrier transfer underlay without sacrificing the flexibility of the TFTs. The random SWNTs showed that they can act as a semiconducting channel and conduction path to shorten the channel length in our TFTs. The flexible thin-film transistors (TFTs) with a random SWNTs/pentacene bilayer as an active channel exhibited an improved saturation field effect mobility (µ_sat) of 2.6 × 10^− 1 cm²/Vs compared to that of TFTs without the SWNTs underlay, while creating only a minor reduction of the current on/off ratio.     

Small hysteresis nanocarbon-based integrated circuits on flexible and transparent plastic substrate

We report small hysteresis integrated circuits by introducing monolayer graphene for the electrodes and a single-walled carbon nanotube network for the channel. Small hysteresis of the device originates from a defect-free graphene surface, where hysteresis was modulated by oxidation. This uniquely combined nanocarbon material device with transparent and flexible properties shows remarkable device performance; subthreshold voltage of 220 mV decade(-1), operation voltage of less than 5 V, on/off ratio of approximately 10(4), mobility of 81 cm(2) V(-1) s(-1), transparency of 83.8% including substrate, no significant transconductance changes in 1000 times of bending test, and only 36% resistance decrease at a tensile strain of 50%. Furthermore, because of the nearly Ohmic contact nature between the graphene and carbon nanotubes, this device demonstrated a contact resistance 100 times lower and a mobility 20 times higher, when compared to an Au electrode.     

Flexible high-performance carbon nanotube integrated circuits

Carbon nanotube thin-film transistors are expected to enable the fabrication of high-performance, flexible and transparent devices using relatively simple techniques. However, as-grown nanotube networks usually contain both metallic and semiconducting nanotubes, which leads to a trade-off between charge-carrier mobility (which increases with greater metallic tube content) and on/off ratio (which decreases). Many approaches to separating metallic nanotubes from semiconducting nanotubes have been investigated, but most lead to contamination and shortening of the nanotubes, thus reducing performance. Here, we report the fabrication of high-performance thin-film transistors and integrated circuits on flexible and transparent substrates using floating-catalyst chemical vapour deposition followed by a simple gas-phase filtration and transfer process. The resulting nanotube network has a well-controlled density and a unique morphology, consisting of long (~10 μm) nanotubes connected by low-resistance Y-shaped junctions. The transistors simultaneously demonstrate a mobility of 35 cm(2) V(-1) s(-1) and an on/off ratio of 6 × 10(6). We also demonstrate flexible integrated circuits, including a 21-stage ring oscillator and master-slave delay flip-flops that are capable of sequential logic. Our fabrication procedure should prove to be scalable, for example, by using high-throughput printing techniques.     

Characterization of the SnO2 based thin film transistors with Ga, In and Hf doping

We investigated the effects of doping tin oxide thin film transistors (TFTs) with Ga, In, and Hf. The quantity of doping impurities added to the SnO2-TFT channel layer was as follows: Ga (6.3-21.4 at.%), In (9.6-55.6 at.%), and Hf (1.2-2.7 at.%). Hafnium and gallium doping of SnO2 thin film decreased the carrier concentration, possibly due to a decrease in field effect mobility, and reduced oxygen vacancy-related defects. Indium-doped SnO2-TFTs exhibited high performance with a high field-effect mobility of > 20 cm2 V(-1) s(-1). The current on/off ratio and the subthreshold swing of In-doped SnO2-TFTs was 1 x 10(9) and 0.5 V/decade, respectively. These results demonstrate that Ga, In, and Hf doping can effectively enhance the performance of SnO2-based TFT devices.     

High-performance amorphous indium-gallium-zinc oxide thin-film transistors with polymer gate dielectric

The fabrication of amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) with a spin-coated polymer gate dielectric on a glass substrate is reported. The interface state density at the poly(4-vinylphenol)/a-IGZO interface is only around 4.05 × 10¹¹ cm^− 2. The TFTs' threshold voltage, subthreshold swing, on-off current ratio, and carrier mobility are 2.6 V, 1.3 V/decade, 1 × 10⁵, and 21.8 cm²/V s, respectively. These characteristics indicate that the TFTs are suitable for use as nonvolatile memory devices and in flexible electronic applications.     

Effect of hafnium addition on the electrical properties of indium zinc oxide thin film transistors

This study reports the performance and stability of hafnium-indium zinc oxide (HfInZnO) thin film transistors (TFTs) with thermally grown SiO2. The HfInZnO channel layer was deposited at room temperature by a co-sputtering system. We examined the effects of hafnium addition on the X-ray photoelectron spectroscopy properties and on the electrical characteristics of the TFTs varying the concentration of the added hafnium. We found that the transistor on-off currents were greatly influenced by the composition of hafnium addition, which suppressed the formation of oxygen vacancies. The field-effect mobility of optimized HfInZnO TFT was 1.34 cm² V⁻¹ s⁻¹, along with an on-off current ratio of 10⁸ and a threshold voltage of 4.54 V. We also investigated the effects of bias stress on HfInZnO TFTs with passivated and non-passivated layers. The threshold voltage change in the passivated device after positive gate bias stress was lower than that in the non-passivated device. This result indicates that HfInZnO TFTs are sensitive to the ambient conditions of the back surface.     

Threshold voltage shift by controlling Ga in solution processed Si-In-Zn-O thin film transistors

The threshold voltage change of solution processed gallium-silicon-indium-zinc oxide (GSIZO) thin film transistors (TFTs) annealed at 200 °C has been investigated depending on gallium ratio. GSIZO thin films were formed with various gallium ratios from 0.01 to 1 M ratio. The 30 nm-thick GSIZO film exhibited optimized electrical characteristics, such as field effect mobility (μ_FE) of 2.2 × 10^− 2 cm²/V·s, subthreshold swing (S.S) of 0.11 V/dec, and on/off current ratio (I_on/off) of above 10⁵. The variation of gallium metal cation has an effect on the threshold voltage (V_th) and the field effect mobility (μ_FE). The V_th was shifted toward positive direction from − 5.2 to − 0.4 V as increasing gallium ratio, and μ_FE was decreased from 2.2 × 10^− 2 to 5 × 10^− 3 cm²/V s. These results indicated that gallium was acted as carrier suppressor by degenerating oxygen vacancy. The electrical property of GSIZO TFTs has been analyzed as a function of the gallium ratio in SIZO system, and it clearly showed that variation of gallium contents could change on the performance of TFTs.     

The structural and electrical properties of Zn-Sn-O buffer layers and their effect on CdTe solar cell performance

Thin films of zinc-tin-oxide (ZTO) have been deposited on SnO₂:F coated glass substrates by co-sputtering of SnO₂ and ZnO. The deposition conditions for ZTO were controlled in order to vary film stoichiometry. The electro-optical and structural properties of ZTO have been studied as a function of their stoichiometric ratio and post-deposition annealing conditions. The same films were subsequently utilized as part of a bi-layer transparent front contact for the fabrication of CdTe solar cells: glass/SnO₂:F/ZTO. The performance of these devices suggested that the ZTO deposition and cell processing conditions can be optimized for enhanced device performance in particular for devices with thin CdS. Specifically, high blue spectral response (> 70% at 450 nm), accompanied by high open-circuit voltages (830 mV), and fill factors (70⁺%) have been demonstrated. Best solar cell performance was obtained for multi-phase ZTO films deposited at substrate temperatures of 400°C and a Zn/Sn ratio of 2.0, and which contained the binary phase of ZnO₂.     

Effect of magnesium oxide passivation on the performance of amorphous indium-gallium-zinc-oxide thin film transistors

Effect of hygroscopic magnesium oxide (MgO) passivation layer on the stability of amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs) under positive bias stress and positive bias temperature stress has been investigated. The effect of MgO passivation has been observed by comparing the shift of the positive threshold voltage (V_th) after constant bias temperature stress, which were 8.2 V for the unpassivated TFTs and 1.88 V for the passivated TFTs.In addition, MgO passivated a-IGZO TFTs show also excellent stability under a humidity test since MgO passivation layer can prevent the penetration of water into back channel. In order to investigate the origin of humidity test result, we have measured X-ray photoelectron spectroscopy depth profile of both unpassivated and MgO passivated TFTs with a-IGZO back channel layers after N₂ wet annealing.