Study of surface-modified PVP gate dielectric in organic thin film transistors with the nano-particle silver ink source/drain electrode

We have fabricated the flexible pentacene based organic thin film transistors (OTFTs) with formulated poly[4-vinylphenol] (PVP) gate dielectrics treated by CF4/O2 plasma on poly[ethersulfones] (PES) substrate. The solution of gate dielectrics is made by adding methylated poly[melamine-co-formaldehyde] (MMF) to PVP. The PVP gate dielectric layer was cross linked at 90 degrees under UV ozone exposure. Source/drain electrodes are formed by micro contact printing (MCP) method using nano particle silver ink for the purposes of low cost and high throughput. The optimized OTFT shows the device performance with field effect mobility of the 0.88 cm2/V s, subthreshold slope of 2.2 V/decade, and on/off current ratios of 1.8 x 10(-6) at -40 V gate bias. We found that hydrophobic PVP gate dielectric surface can influence on the initial film morphologies of pentacene making dense, which is more important for high performance OTFTs than large grain size. Moreover, hydrophobic gate dielelctric surface reduces voids and -OH groups that interrupt the carrier transport in OTFTs.     

Efficient degradation of tetrabromobisphenol A by heterostructured Ag/Bi5Nb3O15 material under the simulated sunlight irradiation

Heterostructured metallic silver-layered bismuth niobate two-component system (Ag/Bi(5)Nb(3)O(15)) was developed for the first time by a mild hydrothermal method combined with photodeposition. The Ag/Bi(5)Nb(3)O(15) exhibited single-crystalline orthorhombic structure with small particle size (50-200 nm) and octahedral as well as sheet-like shape; additionally, it possessed photoresponse in both UV and visible region. As a novel alternative photocatalysts to TiO(2), the photocatalytic activity of the Ag/Bi(5)Nb(3)O(15) was evaluated by the degradation of tetrabromobisphenol A, a member from the family of the brominated flame retardant, under solar simulating Xe lamp irradiation, and enhanced photocatalytic activity in compared to Bi(5)Nb(3)O(15) itself and Degussa P25 was obtained.     

High-performance transparent inorganic-organic hybrid thin-film n-type transistors

High-performance thin-film transistors (TFTs) that can be fabricated at low temperature and are mechanically flexible, optically transparent and compatible with diverse substrate materials are of great current interest. To function at low biases to minimize power consumption, such devices must also contain a high-mobility semiconductor and/or a high-capacitance gate dielectric. Here we report transparent inorganic-organic hybrid n-type TFTs fabricated at room temperature by combining In2O3 thin films grown by ion-assisted deposition, with nanoscale organic dielectrics self-assembled in a solution-phase process. Such TFTs combine the advantages of a high-mobility transparent inorganic semiconductor with an ultrathin high-capacitance/low-leakage organic gate dielectric. The resulting, completely transparent TFTs exhibit excellent operating characteristics near 1.0 V with large field-effect mobilities of >120 cm2 V(-1) s(-1), drain-source current on/off modulation ratio (I(on)/I(off)) approximately 10(5), near-zero threshold voltages and sub-threshold gate voltage swings of 90 mV per decade. The results suggest new strategies for achieving 'invisible' optoelectronics.     

High performance flexible organic thin film transistors (OTFTs) with octadecyltrichlorsilane/ Al2O3/poly(4-vinylphenol) multilayer insulators

The incorporation of a thin, atomic layer deposited Al2O3 layer in between a spin-coated poly-4-vinyl phenol (PVP) organic layer and octadecyltrichlorsilane (OTS) in the multilayer gate dielectric for pentacene organic thin film transistors on a n(+)-Si substrate reduced the gate leakage current and thereby significantly enhanced the current on/off ratio up to 2.8 x 10(6). Addition of the OTS monolayer on the UV-treated Al2O3 improved the crystallinity of the pentacene layer, where the OTS/UV-treated Al2O3 surfaces increased their contact angles to 100 degrees. X-ray diffraction (XRD) analysis revealed a more intense (001) crystal reflectance of pentacene deposited on OTS/UV-treated Al2O3 surface than that on OTS/Al2O3 surface. Moreover, the improved pentacene layer contributed to the field effect mobility (0.4 cm2/Vs) and subsequently improved the electrical performances of organic thin film transistor (OTFT) devices. This PVP/UV treated Al2O3/OTS multilayer gate dielectric stack was superior to those of the device with the single PVP gate dielectrics due to the improved crystallinity of pentacene.     

Light sensing in a photoresponsive, organic-based complementary inverter

A photoresponsive organic complementary inverter was fabricated and its light sensing characteristics was studied. An organic circuit was fabricated by integrating p-channel pentacene and n-channel copper hexadecafluorophthalocyanine (F16CuPc) organic thin-film transistors (OTFTs) with a polymeric gate dielectric. The F16CuPc OTFT showed typical n-type characteristics and a strong photoresponse under illumination. Whereas under illumination, the pentacene OTFT showed a relatively weak photoresponse with typical p-type characteristics. The characteristics of the organic electro-optical circuit could be controlled by the incident light intensity, a gate bias, or both. The logic threshold (V(M), when V(IN) = V(OUT)) was reduced from 28.6 V without illumination to 19.9 V at 6.94 mW/cm2. By using solely optical or a combination of optical and electrical pulse signals, light sensing was demonstrated in this type of organic circuit, suggesting that the circuit can be potentially used in various optoelectronic applications, including optical sensors, photodetectors and electro-optical transceivers.     

High-performance low-voltage organic field-effect transistors prepared on electro-polished aluminum wires

We report the preparation of high-performance low-voltage pentacene-based organic field-effect transistors (OFETs) fabricated on a metallic fiber (Al wire) substrate. The surface roughness of the wire was significantly reduced after 10 min of electro-polishing. A 120 nm thick Al(2)O(3) gate dielectric layer was deposited on the anodized wire, followed by octadecyltrichlorosilane (ODTS) treatment. The ODTS-modified Al(2)O(3) gate dielectrics formed around the Al wire showed a high capacitance of 50.1 nF cm(-2) and hydrophobic surface characteristics. The resulting OFETs exhibited hysteresis-free operation with a high mobility of 0.345 cm(2) V(-1) s(-1) within a low operating voltage range of -5 V, and maintained their high performance at an applied tensile strain of bending radius ~2.2.     

Low-voltage organic field-effect transistors (OFETs) with solution-processed metal-oxide as gate dielectric

In this study, low-voltage copper phthalocyanine (CuPc)-based organic field-effect transistors (OFETs) are demonstrated utilizing solution-processed bilayer high-k metal-oxide (Al(2)O(y)/TiO(x)) as gate dielectric. The high-k metal-oxide bilayer is fabricated at low temperatures (< 200 °C) by a simple spin-coating technology and can be controlled as thin as 45 nm. The bilayer system exhibits a low leakage current density of less than 10(-5) A/cm(2) under bias voltage of 2 V, a very smooth surface with RMS of about 0.22 nm and an equivalent k value of 13.3. The obtained low-voltage CuPc based OFETs show high electric performance with high hole mobility of 0.06 cm(2)/(V s), threshold voltage of -0.5 V, on/off ration of 2 × 10(3) and a very small subthreshold slope of 160 mV/dec when operated at -1.5 V. Our study demonstrates a simple and robust approach that could be used to achieve low-voltage operation with solution-processed technique.     

Reduction of hysteresis in HgSe nanoparticle-based thin-film transistors using blocking oxide layers on plastics

In this study, the hysteresis mechanism is investigated for bottom-gate HgSe nanoparticle (NP)-based thin-film transistors (TFTs) using cross-linked poly vinyl alcohol (PVA) as the gate dielectric on plastics. The hysteresis loop with the clockwise direction is observed and the width of the hysteresis is reduced at long delay times. These phenomena indicate that the origin of the hysteresis is the injection of electrons from the gate electrode to the trap site located in the PVA layer. The widths of the hysteresis curves taken from the TFTs are not reduced even though the annealing treatment for the PVA gate dielectric is performed under N2, O2, and in a vacuum at 120 degrees C for 1 hour. The electron injection from the gate electrode is effectively prevented by inserting Al2O3 of 10 nm utilized as the blocking layer between gate electrode and PVA layer. The hysteresis window is remarkably reduced from about 8 V in HgSe NP-based TFTs without blocking layer to nearly 0 V in the TFTs with blocking layer of Al2O3.     

SnO2掺杂对BMN陶瓷结构及介电性能的影响

采用固相烧结法制备Ba(Mg_(1/3)Nb_(2/3))O_3+x(x=0~8)%SnO_2(BMSN,x为质量分数)微波介质陶瓷,并研究SnO_2掺杂对Ba(Mg_(1/3)Nb_(2/3))O_3(BMN)微波介质陶瓷结构及介电性能的影响。XRD分析表明,陶瓷体系中存在两种相,主晶相Ba(Mg_(1/3)-Nb_(2/3))O_3和附加相Ba_5Nb_4O_(15)。随着x的增大,BMSN陶瓷体系的相结构逐渐由钙钛矿六方结构转变为立方结构,同时有序相逐渐由1∶2有序结构转变为1∶1有序结构。研究表明:添加适量的SnO_2可以促进液相烧结,当SnO_2掺杂质量分数为6%时,BMN陶瓷致密化烧结温度由纯相时的1 550℃以上降低至1 200℃,表观密度ρ=6.39g/cm3,相对理论密度为99.1%,此时BMSN陶瓷体系拥有优良的微波介电性能——高相对介电常数(ε_r=33.6),接近于零的谐振频率温度系数(τ_f=0.15×10~(-6)℃~(-1)),高品质因数与谐振频率的乘积(Q·f=112 300GHz(8GHz))。     

Low operating voltage single ZnO nanowire field-effect transistors enabled by self-assembled organic gate nanodielectrics

The development of nanowire transistors enabled by appropriate dielectrics is of great interest for flexible electronic and display applications. In this study, nanowire field-effect transistors (NW-FETs) composed of individual ZnO nanowires are fabricated using a self-assembled superlattice (SAS) as the gate insulator. The 15-nm SAS film used in this study consists of four interlinked layer-by-layer self-assembled organic monolayers and exhibits excellent insulating properties with a large specific capacitance, 180 nF/cm2, and a low leakage current density, 1 x 10(-8) A/cm2. SAS-based ZnO NW-FETs display excellent drain current saturation at Vds = 0.5 V, a threshold voltage (Vth) of -0.4 V, a channel mobility of approximately 196 cm2/V s, an on-off current ratio of approximately 10(4), and a subthreshold slope of 400 mV/dec. For comparison, ZnO NW-FETs are also fabricated using 70-nm SiO2 as the gate insulator. Implementation of the SAS gate dielectric reduces the NW-FET operating voltage dramatically with more than 1 order of magnitude enhancement of the on-current. These results strongly indicate that SAS-based ZnO NW-FETs are promising candidates for future flexible display and logic technologies.     

Effect of oxygen on the dielectric and energy storage performances of lead-free Bi2Mg2/3Nb4/3O7 thin films prepared by magnetron sputtering

Journal of Materials Science: Materials in Electronics - Bi2Mg2/3Nb4/3O7 (BMN) thin films are prepared on Pt–Si substrates by magnetron sputtering, the influence of oxygen on dielectric and...     

Y5U multilayer ceramic capacitors with high-specific capacitance and low-equivalent series resistance

A dielectric powder material, for Y5U multilayer ceramic capacitors was developed in the Pb(Mg(1/3)Nb(2/3))O (3)-Pb(Ni(1/3)Nb(2/3))O(3)-PbTiO (3) ternary system by using an alkoxide process. Multilayer ceramic chip capacitors (10 muF) with high specific capacitances were fabricated using this powder. A Ag80%-Pd20% alloy was used for the internal electrodes. The alkoxide-derived capacitor had an extremely high specific capacitance of about 500 muF/cm(3) and a small temperature dependence meeting Y5U specifications of the EIA standard. The equivalent series resistance was approximately 20 mOmega at 500 kHz. The breakdown voltages of the capacitor were 300 V or higher. In accelerated load life tests and load humidity tests, no degradation of insulation resistance was found during 1000 h of testing.     

Fabrication of arrayed Si nanowire-based nano-floating gate memory devices on flexible plastics

Arrayed Si nanowire (NW)-based nano-floating gate memory (NFGM) devices with Pt nanoparticles (NPs) embedded in Al2O3 gate layers are successfully constructed on flexible plastics by top-down approaches. Ten arrayed Si NW-based NFGM devices are positioned on the first level. Cross-linked poly-4-vinylphenol (PVP) layers are spin-coated on them as isolation layers between the first and second level, and another ten devices are stacked on the cross-linked PVP isolation layers. The electrical characteristics of the representative Si NW-based NFGM devices on the first and second levels exhibit threshold voltage shifts, indicating the trapping and detrapping of electrons in their NPs nodes. They have an average threshold voltage shift of 2.5 V with good retention times of more than 5 x 10(4) s. Moreover, most of the devices successfully retain their electrical characteristics after about one thousand bending cycles. These well-arrayed and stacked Si NW-based NFGM devices demonstrate the potential of nanowire-based devices for large-scale integration.     

Effect of organic buffer layer in the electrical properties of amorphous-indium gallium zinc oxide thin film transistor

In this research, we reported on the fabrication of top-contact amorphous-indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs) with an organic buffer layer between inorganic gate dielectric and active layer in order to improve the electrical properties of devices. By inserting an organic buffer layer, it was possible to make an affirmation of the improvements in the electrical characteristics of a-IGZO TFTs such as subthreshold slope (SS), on/off current ratio (I(ON/OFF)), off-state current, and saturation field-effect mobility (muFE). The a-IGZO TFTs with the cross-linked polyvinyl alcohol (c-PVA) buffer layer exhibited the pronounced improvements of the muFE (17.4 cm2/Vs), SS (0.9 V/decade), and I(ON/OFF) (8.9 x 10(6)).     

Nb掺杂Bi4Ti3O12层状结构铁电陶瓷的电行为特性研究

采用固相烧结工艺制备了Nb⁵⁺掺杂的Bi₄Ti₃O₁₂层状结构铁电陶瓷.运用XRD 和AFM对Bi₄Ti_3-xNb_xO_12+x/2材料的微观结构进行表征,发现所制备的陶瓷均具有单一的正交相结构,抛光热腐蚀表面晶粒的显微形貌表现为随机排列的棒状结构.通过对材料直流电导率与温度关系的Arrhenius拟合,分析丁Bi₄Ti_3-xNb_xO_12+x/2的导电机理. Nb⁵⁺掺杂提高了材料的介电常数,但居里温度随掺杂含量的增加呈线性下降趋势.DSC结果显示Bi₄Ti_3-xNb_xO_12+x/2材料在居里温度处经历了一级铁电相变.样品的铁电性能测试结果表明, Nb⁵⁺掺杂Bi₄Ti₃O₁₂提高了材料的剩余极化Pr,这主要是由于^_Nb5+取代Ti⁴⁺大大降低了材料中氧空位的浓度,使得氧空位对畴的钉扎作用减弱的缘故.     

Chemically cross-linked thin poly(vinylidene fluoride-co-trifluoroethylene)films for nonvolatile ferroelectric polymer memory

Both chemically and electrically robust ferroelectric poly(vinylidene fluoride-co-trifluoro ethylene) (PVDF-TrFE) films were developed by spin-coating and subsequent thermal annealing with the thermal cross-linking agent 2,4,4-trimethyl-1,6-hexanediamine (THDA). Well-defined ferroelectric β crystalline domains were developed with THDA up to approximately 50 wt %, with respect to polymer concentration, resulting in characteristic ferroelectric hysteresis polarization-voltage loops in metal/cross-linked ferroelectric layer/metal capacitors with remnant polarization of approximately 4 μC/cm(2). Our chemically networked film allowed for facile stacking of a solution-processable organic semiconductor on top of the film, leading to a bottom-gate ferroelectric field effect transistor (FeFET). A low-voltage operating FeFET was realized with a networked PVDF-TrFE film, which had significantly reduced gate leakage current between the drain and gate electrodes. A solution-processed single crystalline tri-isopropylsilylethynyl pentacene FeFET with a chemically cross-linked PVDF-TrFE film showed reliable I-V hysteresis with source-drain ON/OFF current bistablility of 1 × 10(3) at a sweeping gate voltage of ±20 V. Furthermore, both thermal micro/nanoimprinting and transfer printing techniques were conveniently combined for micro/nanopatterning of chemically resistant cross-linked PVDF-TrFE films.     

Ti4+取代Zn2+、Nb5+对Bi2O3-ZnO-Nb2O5系介质材料结构和性能的影响

研究了Ti4 取代Zn2 ,Nb5 对Bi2O3-ZnO-Nb2O5系介质材料结构和性能的影响，研究表明，少量替代对于材料的结构和性能没有太大的影响；随着替代量的增加，相结构中出现正交Bi4Ti3O12相；微观形貌中出现棒晶，介电常数逐渐增大，温度系数逐渐向负温度系数方向移动，适量Ti4 替代可以获得性能很好的NP0介质材料。     

Nanocrystallization of ferroelectric strontium bismuth vanadium niobate in lithium tetraborate glasses

Transparent glass samples in (100-3x) (Li2O-2B2O3)-x(SrO-Bi2O3-0.7Nb2O5-0.3V2O5) (10 < or = x < or = 60, in molar ratio) system have been fabricated via conventional melt-quenching technique. The as-quenched samples, of all the compositions under study have been confirmed to be amorphous, by X-ray powder diffraction (XRD) studies. Differential thermal analysis (DTA) was employed to confirm the glassy nature of the as-quenched glasses. Glass composites comprising vanadium doped strontium bismuth niobate nanocrystallites were obtained by controlled heat-treatment of the as-quenched glasses at 783 K for 6 h. Perovskite SrBi2(Nb0.7VO3)2O9-delta phase formation was found to be preceded by an intermediate fluorite phase which was established via XRD and transmission electron microscopy (TEM). The dielectric constants (epsilonr) of the as-quenched glasses as well as the glass nanocrystal composites decreased with increase in frequency (100 Hz-10 kHz) at 300 K. Interestingly, the dielectric constant of the glass nanocrystal composite (heat-treated at 783 K/6 h) undergoes a maximum in the vicinity of the crystallization temperature of the host glass (Li2B4O7) reaching an anomalously high value (approximately 10(6)) at 800 K. Different dielectric mixture formulae were employed to rationalize the dielectric properties of the glass nanocrystal composite. The optical transmission properties of these glass nanocrystal composites were found to have strong compositional dependence.     

A double-mode piezoelectric single-crystal ultrasonic micro-actuator

Ternary Pb(In(1/2)Nb(1/2))O(3)-Pb(Mg(1/3)Nb(2/3))O(3)-PbTiO(3) (PIN-PMN-PT) single crystals with higher coercive field (E(C) ~9 kV/cm) and higher ferroelectric-transition temperature (T(R-T) = 108°C) were grown, and correspondingly, a double-mode piezoelectric ultrasonic micro-actuator made of PIN-PMN-PT crystal brick (5 x 1.5 x 1.32 mm) and operated in the first longitudinal and the second bending modes was developed. The ferroelectric, dielectric, electromechanical, and resonance displacement properties of the micro-actuator were characterized for miniature linear piezo-motor applications. The longitudinal displacement of the actuator is ~0.11 μm (with an applied voltage of 5 V), which is comparable to that of a multilayer piezoelectric-ceramic actuator of the same size. This crystal micro-actuator was successfully used to drive a slider moving linearly.     

Short-Term Synaptic Plasticity Mimicked on Ionic/Electronic Hybrid Oxide Synaptic Transistor Gated by Nanogranular SiO_2 Films

An indium-zinc-oxide （IZO） based ionic/electronic hybrid synaptic transistor gated by field-configurable nanogranular SiO2 films was reported. The devices exhibited a high current ON/OFF ratio of above 107, a high electron mobility of ～14 cm2 V^-1 s^-1 and a low subthreshold swing of ～80 mV/decade. The gate bias would modulate the interplay between protons and electrons at the channel/dielectric interface. Due to the dynamic modulation of the transient protons flux within the nanogranular SiO2 films, the channel current would be modified dynamically. Short-term synaptic plasticities, such as short-term potentiation and short- term depression, were mimicked on the proposed IZO synaptic transistor. The results indicate that the synaptic transistor proposed here has potential applications in future neuromorphic devices.