Processing and performance of organic insulators as a gate layer in organic thin film transistors fabricated on polyethylene terephthalate substrate

Fabrication of organic thin film transistor (OTFT) on flexible substrates is a challenge, because of its low softening temperature, high roughness and flexible nature. Although several organic dielectrics have been used as gate insulator, it is difficult to choose one in absence of a comparative study covering processing of dielectric layer on polyethylene terephthalate (PET), characterization of dielectric property, pentacene film morphology and OTFT characterization. Here, we present the processing and performance of three organic dielectrics, poly(4-vinylphenol) (PVPh), polyvinyl alcohol (PVA) and poly(methyl methacrylate) (PMMA), as a gate layer in pentacene-based organic thin film transistor on PET substrate. We have used thermogravimetric analysis of organic dielectric solution to determine annealing temperature for spin-coated films of these dielectrics. Comparison of the leakage currents for the three dielectrics shows PVA exhibiting lowest leakage (in the voltage range of ?30 to +30 V). This is partly because solvent is completely eliminated in the case of PVA as observed by differential thermogravimetric analysis (DTGA). We propose that DTGA can be a useful tool to optimize processing of dielectric layers. From organic thin film transistor point of view, crystal structure, morphology and surface roughness of pentacene film on all the dielectric layers were studied using X-ray diffraction (XRD), atomic force microscopy (AFM) and scanning electron microscopy (SEM). We observe pyramidal pentacene on PVPh whereas commonly observed dendritic pentacene on PMMA and PVA surface. Pentacene morphology development is discussed in terms of surface roughness, surface energy and molecular nature of the dielectric layer.     

High performance flexible organic thin film transistors (OTFTs) with octadecyltrichlorsilane/ Al2O3/poly(4-vinylphenol) multilayer insulators

The incorporation of a thin, atomic layer deposited Al2O3 layer in between a spin-coated poly-4-vinyl phenol (PVP) organic layer and octadecyltrichlorsilane (OTS) in the multilayer gate dielectric for pentacene organic thin film transistors on a n(+)-Si substrate reduced the gate leakage current and thereby significantly enhanced the current on/off ratio up to 2.8 x 10(6). Addition of the OTS monolayer on the UV-treated Al2O3 improved the crystallinity of the pentacene layer, where the OTS/UV-treated Al2O3 surfaces increased their contact angles to 100 degrees. X-ray diffraction (XRD) analysis revealed a more intense (001) crystal reflectance of pentacene deposited on OTS/UV-treated Al2O3 surface than that on OTS/Al2O3 surface. Moreover, the improved pentacene layer contributed to the field effect mobility (0.4 cm2/Vs) and subsequently improved the electrical performances of organic thin film transistor (OTFT) devices. This PVP/UV treated Al2O3/OTS multilayer gate dielectric stack was superior to those of the device with the single PVP gate dielectrics due to the improved crystallinity of pentacene.     

Low-voltage-driven pentacene thin-film transistors with cross-linked poly(4-vinylphenol)/high-k Bi55b3O15 hybrid dielectric for phototransistor

This paper describes the fabrication of pentacene thin-film transistors (TFTs) with an organic/inorganic hybrid gate dielectric, consisting of cross-linked poly(4-vinylphenol) (PVP) and Bi5Nb3O15. A 300-nm-thick Bi5Nb3O15 dielectric film, grown at room temperature, exhibits a high dielectric constant (high-k) value of 40 but has an undesirable interface with organic semiconductors (OSC). To form better interfaces with OSC, a cross-linked PVP dielectric was stacked on the Bi5Nb3O15 dielectric. It is shown that, with the introduction of a hybrid dielectric, our devices not only can be operated at a low voltage (- -5 V) but also have improved electrical characteristics and photoresponse, including a field-effect mobility of 0.72 cm2/V x s, current sub-threshold slopes of 0.29 V/decade, and a photoresponse of 4.84 at a gate bias V(G) = 0 V under 100 mW/cm2 AM 1.5 illumination.     

Bootstrapped inverter using a pentacene thin-film transistor with a poly(methyl methacrylate) gate dielectric

A bootstrapped inverter incorporating pentacene organic thin-film transistors (OTFTs), with poly(methyl methacrylate) as the gate dielectric, has been designed, fabricated and tested. The inverter uses capacitive coupling and bootstrapping effects, and exhibits superior performance to the normal diode-connected load inverter. The pentacene OTFTs used for the inverter possess a field-effect mobility of 0.32 cm²/V/s, a threshold voltage of -10.0 V, a subthreshold slope of 1.5 V per decade and an on/off current ratio of 2.2 times 10⁶. The inverter has a 30 mus rise time and a 450 mus fall time, at an operating frequency of 1 kHz and 30 V drive voltage.     

Preparation of poly(4-vinylphenol)/titanium dioxide composite and its application as a gate dielectric for organic thin-film transistors

Organic-inorganic composites can provide a unique feature combining superior dielectric properties of inorganic materials and solution processing capability of organic materials. In this study, poly(4-vinylphenol) (PVP) and titanium dioxide (TiO2) composite was prepared by mixing TiO2 nanoparticles in the PVP solution. In order to avoid severe gate-leakage currents in organic thin-film transistors (OTFTs) with such a composite gate dielectric layer, poly(oxyethylene)(20)-sorbitane monooleate was used as a surfactant for uniform dispersion of TiO2 particles. The dispersion stability of TiO2 nanoparticles in the composite solutions was confirmed by observing its sedimentation time in the composite solutions. The composite dielectric film, fabricated by means of simple spin-coating, provided an enhanced dielectric property and contributed to reducing the threshold voltage of OTFT, without augmenting the gate-leakage current. These results demonstrate that the fabricated composite dielectric film is essentially eligible for low-voltage operating OTFTs.     

Behavior of pentacene initial nucleation on various dielectrics and its effect on carrier transport in organic field-effect transistor

The influence of dielectric surface energy on the initial nucleation and the growth of pentacene films as well as the electrical properties of the pentacene-based field-effect transistors are investigated. We have examined a range of organic and inorganic dielectrics with different surface energies, such as polycarbonate/SiO2, polystyrene/SiO2, and PMMA/SiO2 bi-layered dielectrics and also the bare SiO2 dielectric. Atomic force microscopy measurements of sub-monolayer and thick pentacene films indicated that the growth of pentacene film was in Stranski-Kranstanow growth mode on all the dielectrics. However, the initial nucleation density and the size of the first-layered pentacene islands deposited on different dielectrics are drastically influenced by the dielectric surface energy. With the increasing of the surface energy, the nucleation density increased and thus the average size of pentacene islands for the first mono-layer deposition decreased. The performance of fabricated pentacene-based thin film transistors was found to be highly related to nucleation density and the island size of deposited Pentacene film, and it had no relationship to the final particle size of the thick pentacene film. The field effect mobility of the thin film transistor could be achieved as high as 1.38 cm2Ns with on/off ratio over 3 x 10(7) on the PS/SiO2 where the lowest surface energy existed among all the dielectrics. For comparison, the values of mobility and on/off ratio were 0.42 cm2Ns and 1 x 10(6) for thin film transistor deposited directly on bare SiO2 having the highest surface energy.     

Double-gate organic thin-film transistor using a photosensitive polymer as the dielectric layer

Dichromated poly (vinyl alcohol) (DCPVA) has been proposed for protecting the pentacene active layer from organic solvents such as PGMEA. DCPVA is water-soluble, and the damage to the pentacene active layer can be minimized compared to other materials dissolved in organic solvents. In this study, the dielectric properties and leakage current density of DCPVA gate dielectric samples with different ammonium dichromate (ADC) concentrations and exposure times were obtained from 6.73 to 10.5 and 6.37 × 10^− 5 to 4.87 × 10^− 8 (A/cm²) respectively. Also the FTIR spectroscopy was used to determine the cross-linked DCPVA films based on the relative intensity of the vibration bands of chromium(VI) and the OH group. According to FTIR, the performance of double-gate OTFTs based on blending ADC:PVA ratio of 0.25:1 film as dielectric layers of double-gate OTFT devices to exclude the acute influence of large gate leakage current caused by excess hydroxyl groups and residual Cr⁶⁺ in dielectric layer on device performance.By analyzing the electrical performance, it was found that the fabricating method of the top-dielectric layer has a great effect on the performance of double-gate OTFTs. SEM images of pentacene microstructure show significant cracks on the top of the pentacene layer due to the swelling effect of the DCPVA polymer after post-baking. Therefore, we used vacuum drying to form photosensitive DCPVA as the top-dielectric layer of a double-gate OTFT circuit array. The use of top-dielectric and electrode layers on the top of pentacene significantly increased the performance of double-gate OTFTs. In summary, we eventually demonstrate that double-gate OTFTs using a low-temperature solution process exhibited an equivalent mobility of 0.53 cm²/Vs and on-off ratio of 8 × 10³.     

Moisture-induced hysteresis of pentacene thin film transistors with cross-linked poly(4-vinylphenol) gate dielectrics

The time variable electrical characteristics of pentacene thin-film transistors (TFTs) with poly(4-vinylphenol) gate dielectrics were investigated under various relative humidity conditions and the effect of moisture on the hysteresis behavior of the pentacene TFTs was studied. One possible cause of the hysteresis behavior is the presence of inherent hydroxyl groups in bulk or surface of the polymeric dielectric, which make the gate dielectric polar, but the hysteresis behavior of the pentacene TFTs was found to depend strongly on the relative humidity and to increase with an increase of the moisture in the surrounding atmosphere. With a time-scalable investigation, it was also found that the adsorption of moisture onto the pentacene layer is the main reason for the hysteresis even with the -OH rich polymeric dielectric. The hysteresis behavior was found to be significantly reduced by suppression of moisture or other moisture-induced impurities, such as the encapsulation of the devices with glass.     

Electrical characteristics of poly(3-hexylthiophene) organic thin film transistor with electroplated metal gate electrodes on polyimide

The electroplating of the gate electrode on a flexible polyimide (PI) substrate was successfully applied to the fabrication of inverted-staggered poly(3-hexylthiophene) (P3HT) organic thin film transistors (OTFTs). The Ni gate electrode was electroplated through patterned negative photo-resist (KMPR) masks onto Cu (seed)/Cr (adhesion) layers that had been sputter-deposited on O₂-plasma-treated PI substrates. The electrical measurements of the fabricated OTFTs with the SiO₂ gate insulator indicated non-ideal output characteristics, which are similar to the model of electrical transport by a space-charge limited current (SCLC). The use of a poly(4-vinyl phenol) (PVP) and SiO₂/PVP bilayer gate dielectric produced output characteristics that were closer to the ideal TFT behavior but led to a lower effective mobility and on/off current (I_on/I_off).     

Electric characteristics of organic thin-film transistors and logic circuits with a ferroelectric gate insulator

Organic electronic devices using a pentacene have improved importantly in the last several years. We fabricated pentacene organic thin-film transistors (OTFTs) with dielectric SiO₂ and ferroelectric Pb(Zr_0.3,Ti_0.7)O₃ (PZT) gate insulators. The organic devices using SiO₂ and PZT films had the field-effect mobility of approximately 0.1 and 0.004 cm²/V s, respectively. The drain current in the transfer curve of pentacene/PZT transistors showed a hysteresis behavior originated in a ferroelectric polarization switching. In order to investigate the polarization effect of PZT gate dielectrics in a logic circuit, the simple voltage inverter using SiO₂ and PZT films was fabricated and measured by an output-input measurement. The gain of inverter at the poling-down state was approximately 7.2 and it was three times larger than the value measured at the poling-up state.     

Characteristics of sputtered Al-doped ZnO films for transparent electrodes of organic thin-film transistor

Aluminum-doped ZnO (AZO) thin-films were deposited with various RF powers at room temperature by radio frequency (RF) magnetron sputtering method. The electrical properties of the AZO film were improved with the increasing RF power. These results can be explained by the improvement of the crystallinity in the AZO film. We fabricated the organic thin-film transistor (OTFT) of the bottom gate structure using pentacene active and poly-4-vinyl phenol gate dielectric layers on the indium tin oxide gate electrode, and estimated the device properties of the OTFTs including drain current-drain voltage (I_D-V_D), drain current-gate voltage (I_D-V_G), threshold voltage (V_T), on/off ratio and field effect mobility. The AZO film that grown at 160 W RF power exhibited low resistivity (1.54 × 10^− 3 Ω·cm), high crystallinity and uniform surface morphology. The pentacene thin-film transistor using the AZO film that's fabricated at 160 W RF power exhibited good device performance such as the mobility of 0.94 cm²/V s and the on/off ratio of ~ 10⁵. Consequently, the performance of the OTFT such as larger field-effect carrier mobility was determined the conductivity of the AZO source/drain (S/D) electrode. AZO films prepared at room temperature by the sputtering method are suitable for the S/D electrodes in the OTFTs.     

Organic thin-film transistors using thin ormosil-based hybrid dielectric

We synthesized a novel thermally-crosslinkable ormosil-based hybrid material as a solution-processable dielectric layer for organic thin-film transistors (OTFTs). Dielectrics with a thickness of 50-260 nm were fabricated via spin-coating in order to evaluate their applicability as an ultra-thin gate dielectric. It was observed that the capacitance of the hybrid dielectric increases with decreasing film thickness. Hybrid dielectrics with a thickness of 260 nm and 160 nm, respectively, exhibited adequate leakage current behavior. Coplanar-type OTFTs were fabricated using each of the hybrid dielectrics (i.e., thickness of 260 nm and 160 nm). The off-current, threshold voltage, and field-effect mobility of both transistors were analyzed to investigate the effects of capacitance and film thickness on the electrical performance of the transistors.     

Organic thin-film transistors using pentacene and SiOC film

Pentacene for organic thin-film transistors (OTFTs) was deposited on the SiOC film by thermal evaporation. The transfer characteristic of the pentacene channel as the active layer is dependent on the chemical properties of a surface-on-gate insulator. Hybrid-type SiOC film can have all chemical properties from organic to inorganic properties according to the deposition condition. Pentacene on SiOC film shows the gradient or normal growth because of the C=C bond in SiOC film. Normal growth of pentacene molecules increased the grain size of the surface of pentacene on SiOC film, and the mobility of OTFTs on SiOC films prepared with an O/sub 2//(BTMSM+O/sub 2/) flow rate ratio of 80% is 2.19 (cm/sup 2//V/sub s/).     

Layer-by-layer structured polymer/TiO2 thin film and its gate dielectric application

Composite materials of the polymer and inorganic dielectric material have been investigated due to synergistic effect of both flexible properties of the polymer and dielectric properties of the inorganic material. In this study, poly(methyl methacrylate-co-methacrylic acid)/titanium dioxide (PMMA-co-MAA/TiO2) bilayer films were fabricated using a spin coating method followed by a self assembled sol-gel process and then examined for a gate dielectric application of the OTFT. Fracture and surface morphologies of the bilayer film on silicon wafer was observed via both SEM and AFM. Dielectric constant of the composite film synthesized was found to be larger than that of pure polymer film. In addition, with pentacene as a conducting layer, device performance of the composite film was characterized, and it was found that the threshold gate voltage was reduced while the field induced current was increased.     

High-performance low-voltage organic field-effect transistors prepared on electro-polished aluminum wires

We report the preparation of high-performance low-voltage pentacene-based organic field-effect transistors (OFETs) fabricated on a metallic fiber (Al wire) substrate. The surface roughness of the wire was significantly reduced after 10 min of electro-polishing. A 120 nm thick Al(2)O(3) gate dielectric layer was deposited on the anodized wire, followed by octadecyltrichlorosilane (ODTS) treatment. The ODTS-modified Al(2)O(3) gate dielectrics formed around the Al wire showed a high capacitance of 50.1 nF cm(-2) and hydrophobic surface characteristics. The resulting OFETs exhibited hysteresis-free operation with a high mobility of 0.345 cm(2) V(-1) s(-1) within a low operating voltage range of -5 V, and maintained their high performance at an applied tensile strain of bending radius ~2.2.     

Inkjet printing of transparent, flexible, organic transistors

Two different types of all-organic, transparent transistors, namely Organic Thin Film Transistors (OTFTs) and Organic Electrochemical Transistors (OECTs), were fabricated on transparent, flexible plastic substrates by means of inkjet printing. In OTFTs the source, drain and gate electrodes were inkjet printed using a poly(3,4ethylenedioxythiophene)/polystyrene sulfonate (PEDOT:PSS ) solution, while a thermally sublimated layer of Parylene C acted as gate dielectric. Two kinds of organic semiconductors were used as active layers: 6,13-bis(triisopropylsilylethynyl) pentacene for p-type and N1400 for n-type OTFTs. For OECTs, all electrodes were also realized by inkjet printing deposition of a PEDOT:PSS solution. Electrical output characteristics of both kinds of devices are reported, demonstrating that the performances of our devices may be compared to those of transistors fabricated employing different realization techniques.     

Performance enhancement of organic thin-film transistors with improved copper phthalocyanine crystallization by inserting ultrathin pentacene buffer

Organic thin-film transistors (OTFTs) with high crystallization copper phthalocyanine (CuPc) active layers were fabricated by inserting an ultrathin pentacene buffer layer between the dielectric and CuPc layers. Comparing with the OTFTs without a pentacene buffer layer, the charge carrier mobility of the OTFT with a buffer layer presented a much higher value of ~ 0.20 cm²/V s. Meanwhile, by investigating the morphology of the CuPc active layer with an ultrathin pentacene buffer layer through scanning electron microscopy and X-ray diffraction, the high crystallization of the CuPc film with a larger grain size and less grain boundaries can be observed. As a result, the resistance of the conducting channel was decreased, leading to a performance improvement of the OTFTs.     

Aging effects and electrical stability in pentacene thin film transistors

We have studied the transfer characteristic variations induced by aging effects and applied voltage in top contact pentacene thin film transistors (OTFTs) fabricated by using Polymethylmetacrylate buffer layer. The electrical stability of pentacene OTFTs was tested by applying prolonged bias stress (up to 10⁴ s) with gate voltage V_gstress = − 30 V and + 30 V. The environmental effects were analysed by measuring the degradation of electrical characteristics of OTFT exposed to air. The results have been analysed in terms of trap state model, evaluating the channel conductance using a one-dimensional approach. This allows us to correlate the transfer characteristics variations to changes in localised state distribution.     

Light sensing in a photoresponsive, organic-based complementary inverter

A photoresponsive organic complementary inverter was fabricated and its light sensing characteristics was studied. An organic circuit was fabricated by integrating p-channel pentacene and n-channel copper hexadecafluorophthalocyanine (F16CuPc) organic thin-film transistors (OTFTs) with a polymeric gate dielectric. The F16CuPc OTFT showed typical n-type characteristics and a strong photoresponse under illumination. Whereas under illumination, the pentacene OTFT showed a relatively weak photoresponse with typical p-type characteristics. The characteristics of the organic electro-optical circuit could be controlled by the incident light intensity, a gate bias, or both. The logic threshold (V(M), when V(IN) = V(OUT)) was reduced from 28.6 V without illumination to 19.9 V at 6.94 mW/cm2. By using solely optical or a combination of optical and electrical pulse signals, light sensing was demonstrated in this type of organic circuit, suggesting that the circuit can be potentially used in various optoelectronic applications, including optical sensors, photodetectors and electro-optical transceivers.     

Organic Field‐Effect Transistor Memory Devices Using Discrete Ferritin Nanoparticle‐Based Gate Dielectrics

Organic field‐effect transistor (OFET) memory devices made using highly stable iron‐storage protein nanoparticle (NP) multilayers and pentacene semiconductor materials are introduced. These transistor memory devices have nonvolatile memory properties that cause reversible shifts in the threshold voltage (V_th) as a result of charge trapping and detrapping in the protein NP (i.e., the ferritin NP with a ferrihydrite phosphate core) gate dielectric layers rather than the metallic NP layers employed in conventional OFET memory devices. The protein NP‐based OFET memory devices exhibit good programmable memory properties, namely, large memory window ΔV_th (greater than 20 V), a fast switching speed (10 μs), high ON/OFF current ratio (above 10⁴), and good electrical reliability. The memory performance of the devices is significantly enhanced by molecular‐level manipulation of the protein NP layers, and various biomaterials with heme Fe^III/Fe^II redox couples similar to a ferrihydrite phosphate core are also employed as charge storage dielectrics. Furthermore, when these protein NP multilayers are deposited onto poly(ethylene naphthalate) substrates coated with an indium tin oxide gate electrode and a 50‐nm‐thick high‐k Al₂O₃ gate dielectric layer, the approach is effectively extended to flexible protein transistor memory devices that have good electrical performance within a range of low operating voltages (<10 V) and reliable mechanical bending stability.