Analysis of a source-coupled MOS multivibrator with resistive drain loads

The determinant of the system of nodal equations of a source-coupled MOS multivibrator is calculated. Equating this determinant to zero, one can obtain the condition of transition from one quasistable state to another. This condition is used to calculate the currents in the multivibrator transistors at the instant of transition. Then the voltage amplitude at the coupling capacitor is calculated and the oscillation frequency is found. The oscillation frequency in this multivibrator depends on the value of currents supplied to the circuit and the power supply voltage. The results were verified experimentally.     

New constant-current controlled astable multivibrator for generating sawtooth and square waves

This article presents a now constant-current controlled astable multivibrator in which only one resistor and one capacitor is used, the other elements being transistors. The circuit consists of a constant-current source and the multivibrator itself. The multivibrator is specifically designed to have a simple three-stage direct-coupled transistor amplifier, with the output of the third stage fed back to the first stage and a capacitor connected across any two collectors. The switching action takes place by means of that capacitor. Linear sawtooth and square waves are generated simultaneously at the transistor collectors. Since only one resistor and one capacitor are required, this circuit is practical with IC fabrication.     

New dynamic RAM Cell for VLSI memories

A novel high-alpha-particle-immunity and high-density dynamic RAM cell with readout signal gain is proposed. The cell is composed of a MOSFET for charge transfer, a MOS capacitor for charge storage and a junction FET (JFET) with buried channel under the MOS capacitor. The buried channel is dynamically switched according to whether there is charge-storage or not. The cell has extremely small collection efficiency for charges generated by alpha-particles, and allows a large amount of leakage charges due to its peculiar structure. Thus, it can achieve high packing density.     

On a multivibrator that employs a fractional capacitor

The simple free running multivibrator built around a single fractional capacitor is examined in this letter. Equations for the oscillation frequency of the multivibrator are derived taking into account the positive feedback factor around the multivibrator. We show that the use of the fractional capacitance allows the multivibrator to have very high frequencies of oscillation for reasonable time constants used. PSPICE simulation and experimental results demonstrate the analysis with an approximation to a fractional capacitor that yields a result, which is at least 1000 times in frequency compared to if a normal capacitor of the same value was employed.     

一种基于混沌的随机数发生器设计及其IC实现

在密码学、仿真学以及集成电路测试等许多领域 ,随机数起着重要的作用。在密码学中 ,通常要求所使用的随机数具有不可预测性。基于混沌现象 ,使用开关电容技术 ,用集成电路实现了一种硬件随机数发生器。测试结果表明 ,其产生的序列具有不可预测性 ,可以满足密码学的应用要求。     

Analysis of emitter (source)-coupled multivibrators

The popular emitter-coupled multivibrator and its MOS variant are analyzed using the classical discontinuity theory. Accurate formulas for predicting their relaxation oscillation are obtained solving the nonlinear circuit equation, which is derived finding the voltage-current characteristic of the nonlinearity connected to the timing capacitor. Then, using a small-signal equivalent circuit accounting for the intrinsic capacitances of the devices, we investigate the high-frequency behavior of these circuits finding the oscillation start-up condition. We show that they can exhibit a completely different behavior, similar to a series LC-tuned oscillator, without using an inductor. Numerical simulations are performed showing that the presented formulas are more accurate than the existing ones and that both behaviors are possible.     

Capacitance-voltage characterization of fully silicided gated MOS capacitor

This paper investigates the capacitance-voltage (C-V) measurement on fully silicided (FUSI) gated metal-oxide-semiconductor (MOS) capacitors and the applicability of MOS capacitor models. When the oxide leak-age current of an MOS capacitor is large, two-element parallel or series model cannot be used to obtain its real C-V characteristic, A three-element model simultaneously consisting of parallel conductance and series resistance or a four-element model with further consideration of a series inductance should be used. We employed the three-element and the four-element models with the help of two-frequency technique to measure the Ni FUSI gated MOS capacitors. The results indicate that the capacitance of the MOS capacitors extracted by the three-element model still shows some frequency dispersion, while that extracted by the four-element model is close to the real capacitance, showing little frequency dispersion. The obtained capacitance can be used to calculate the dielectric thickness with quantum effect correction by NCSU C-V program. We also investigated the influence of MOS capacitor's area on the measurement accuracy. The results indicate that the decrease of capacitor area can reduce the dissipation fac-tor and improve the measurement accuracy. As a result, the frequency dispersion of the measured capacitance is significantly reduced, and real C-V characteristic can be obtained directly by the series model. In addition, this pa-per investigates the quasi-static C-V measurement and the photonic high-frequency C-V measurement on Ni FUSI metal gated MOS capacitor with a thin leaky oxide. The results indicate that the large tunneling current through the gate oxide significantly perturbs the accurate measurement of the displacement current, which is essential for the quasi-static C-V measurement. On the other hand, the photonic high-frequency C-V measurement can bypass the leakage problem, and get reliable low-frequency C-V characteristic, which can be used to evaluate whether the full silicidation has completed or not, and to extract the interface trap density of the SiO2/Si interface.     

射频连续波对多谐振荡器的干扰研究

在GTEM室中用射频连续波对某导弹装备上的一块数字控制电路进行电磁辐照实验,在一定的场强下,产生控制信号的自激多谐振荡器受到了电磁干扰,主要表现为产生的方波控制信号占空比增大。分析了多谐振荡器受干扰的机理,用电路仿真软件对多谐振荡器受到的干扰进行了模拟,验证了对干扰机理的分析。     

High Security FeRAM‐Based EPC C1G2 UHF (860 MHz‐960 MHz) Passive RFID Tag Chip

The metal‐ferroelectric‐metal (MFM) capacitor in the ferroelectric random access memory (FeRAM) embedded RFID chip is used in both the memory cell region and the peripheral analog and digital circuit area for capacitance parameter control. The capacitance value of the MFM capacitor is about 30 times larger than that of conventional capacitors, such as the poly‐insulator‐poly (PIP) capacitor and the metal‐insulator‐metal (MIM) capacitor. An MFM capacitor directly stacked over the analog and memory circuit region can share the layout area with the circuit region; thus, the chip size can be reduced by about 60%. The energy transformation efficiency using the MFM scheme is higher than that of the PIP scheme in RFID chips. The radio frequency operational signal properties using circuits with MFM capacitors are almost the same as or better than with PIP, MIM, and MOS capacitors. For the default value specification requirement, the default set cell is designed with an additional dummy cell.     

高性能硅基MOS电光相位调制器

提出了一种SOI新型MOS电容型电光调制器.与普通单一电容型MOS调制器相比,由三层栅氧化层形成的新型MOS电容型调制器提高了调制效率.模拟显示,调制电压和调制长度乘积为VπLπ=2.4V·cm,上升和下降时间分别为80和40ps,带宽达到了8GHz.通过减小器件尺寸能进一步提高调制效率和调制速度.     

MOS capacitor loaded frequency agile microstrip antenna

A new MOS capacitor loaded frequency agile microstrip patch antenna is proposed in which the operating frequency of the rectangular microstrip antenna is electronically controlled by the bias voltage of the MOS capacitor. Theoretical investigations, based on a modal expansion cavity model as well as an improved theory of Richards et al. (1981, IEEE Transactions on Antennas and Propagation, 29, 38-41), are carried out for five different oxide (Si₃N₄) thicknesses from 100 Å to 500 Å for the (Au-Si₃N₄-Si) MOS structure. The maximum obtainable frequency tuning range (76.08%) is achieved for the lowest value of oxide thickness (100 Å); this is almost 1.5 times the value reported for the varactor loaded patch antenna. The larger frequency variation is achieved with lower variation in the bias voltage as compared with the varactor.     

非对称式多谐振荡器的Multisim仿真

针对Multisim中器件从0输出状态开始仿真,仿真非对称式多谐振荡器工作波形不能形成振荡输出,提出了在仿真电路的输入端接入转换开关,仿真时先将转换开关接地使电路脱离系统设置的初始输出状态,再通过转换开关构成非对称式多谐振荡器,进行正常工作状态的仿真.特点是直观形象地描述了多谐振荡器的工作工程、解决了多谐振荡器工作波形无法用电子实验仪器进行分析验证的问题.     

实现Folded-Cascode放大器快速建立的时钟馈通频率补偿

基于有源开关电容网络二阶系统最小建立时间(MST)理论和阶跃响应分析,提出了一种用于Folded-Cascode放大器的频率补偿新方法,即通过MOS电容引入时钟馈通以调整电路阻尼因子η,使其达到MST状态,从而实现快速建立.研究结果表明,补偿后放大器的建立时间缩短了22.7%;当负载电容从0.5变化至2.5pF,其建立时间从3.62ns近似线性地增长到4.46ns;将采用该补偿方法的放大器应用于可变增益(VGA)系统,当闭环增益变化时,仅需调整MOS电容值仍可实现对应状态下的快速建立.     

On the properties of the gate and substrate current after softbreakdown in ultrathin oxide layers

In this work we have studied soft breakdown (SBD) in capacitors and nMOSFET's with 4.5-nm oxide thickness. It is shown that for larger area devices gate current and substrate current as a function of the gate voltage after SBD are stable and unique curves, but for smaller area devices both currents become lower and unstable. This difference can be explained by the different energy available for discharging in the SBD path. It is shown that the SBD detection strongly depends on the test structure area. In nMOSFET's for positive gate polarity, the large increase in the substrate current at the SBD moment is proposed as a sensitive SBD detector. Two level fluctuations in the gate current are investigated at different voltages and are explained by means of a model where electron capture-emission in the traps of the SBD path induces local field fluctuations causing variations in the tunneling rate across the oxide. In the substrate current directly correlated two-level fluctuations are observed     

一种基于单电子隧穿结和MOS晶体管的混合随机数发生器

提出了一种新颖的单电子随机数发生器(RNG).该随机数发生器由多个单电子隧穿结(MTJ)以及单电子晶体管(SET)/MOS管混合输出电路组成.MTJ被用于实现一个高频率的振荡器.它利用了电子隧穿的物理随机性得到了很大的振荡频率漂移.SET/MOS管输出电路放大并输出MTJ振荡器的输出信号.该信号经过一个低频信号采样后,产生随机数序列.所提出的随机数发生器使用简单的电路结构产生了高质量的随机数序列.它具有简单的结构,输出随机数的速度可以高达1GHz.同时,该电路还具有带负载能力以及很低的功耗.这种新颖的随机数发生器对未来的密码和通讯系统具有一定的应用前景.     

一种基于单电子隧穿结和MOS晶体管的混合随机数发生器

提出了一种新颖的单电子随机数发生器(RNG).该随机数发生器由多个单电子隧穿结(MTJ)以及单电子晶体管(SET)/MOS管混合输出电路组成.MTJ被用于实现一个高频率的振荡器.它利用了电子隧穿的物理随机性得到了很大的振荡频率漂移.SET/MOS管输出电路放大并输出MTJ振荡器的输出信号.该信号经过一个低频信号采样后,产生随机数序列.所提出的随机数发生器使用简单的电路结构产生了高质量的随机数序列.它具有简单的结构,输出随机数的速度可以高达1GHz.同时,该电路还具有带负载能力以及很低的功耗.这种新颖的随机数发生器对未来的密码和通讯系统具有一定的应用前景.     

Formation mechanism of concave by dielectric breakdown on silicon carbide metal-oxide-semiconductor capacitor

Adjacent concaves are formed commonly on silicon carbide (SiC) MOS capacitor after time-dependent dielectric breakdown (TDDB). This paper describes the formation mechanism of the concave on the SiC MOS capacitor with aluminum gate electrode on thermally grown silicon dioxide gate dielectric by the dielectric breakdown. At the bottom of an approximately 450 nm-deep concave, a stack structure of the concave surface was found to be surface oxide/C-rich layer/Si-rich layer/SiC substrate. Some C-rich debris adhered on the surface of the concave. The concave surface was speculated to be formed by a sequence of the C-rich surface on the Si-rich surface, the debris adhered on the surface, and the oxide layer containing nitrogen and aluminum. Formation of the concave and its surface is explained based on the physical properties of SiC; (i) a peritectic decomposition of SiC to the solid phase carbon and the liquid phase solution containing silicon and carbon, (ii) a normal freezing process of the liquid phase solution, and (iii) a thermal decomposition on the concave surface to form a graphite layer.     

Metal-layer capacitors in the 65 nm CMOS process and the application for low-leakage power-rail ESD clamp circuit

Between the metal–insulator–metal (MIM) capacitor and metal–oxide–metal (MOM) capacitor, the MIM capacitor has a better characteristic of stable capacitance. However, the MOM capacitors can be easily realized through the metal interconnections, which does not need additional fabrication masks into the process. Moreover, the capacitance density of the MOM capacitor can exceed the MIM capacitor when more metal layers are used in nanoscale CMOS processes. With advantages of lower fabrication cost and higher capacitance density, the MOM capacitor could replace MIM capacitor gradually in general integrated circuit (IC) applications. Besides, the MOM capacitor ideally do not have the leakage issue. Thus, the MOM capacitor can be used instead of MOS capacitor to avoid the gate leakage issue of thin-oxide devices in nanoscale CMOS processes. With the MOM capacitor realized in the power-rail electrostatic discharge (ESD) clamp circuit, the overall leakage is decreased from 828 μA to 358 nA at 25 °C, as compared to the traditional design with MOS capacitor in the test chip fabricated in a 65 nm CMOS process.     

A new dynamic random access memory cell using a bipolar MOS composite structure

A new dynamic random access memory (RAM) cell which incoperates an n-p-n bipolar junction transistor with an n-channel MOSFET in a composite structure, is proposed and investigated. In this novel cell called the BIMOS cell, the collector-base junction serves as a buried storage capacitor whereas the n-MOSFET as a transfer gate. The fabrication technology is simple and compatible with that of single-polysilicon CMOS IC's and a minimum cell size of 14.875F²with a minimum feature sizeFis realizable. The write, read, and standby operations of the cell are analyzed and simulated. An experimental cell is fabricated and characterized. Dynamic test is successfully performed. The investigation on the cell performance is also made. It has shown that large storage capacitance to bit-line capacitance ratio as well as fairly good packing density, soft-error immunity and leakage characteristics are expected. Furthermore, as compared to the conventional 1-transistor cell the new cell can be scaled down with less processing troubles and better performance improvements. Simple process and good scaled-down properties offer great potential for the proposed new cell to be used in the design of larger dynamic MOS RAM's.     

On Using the Volatile Mem-Capacitive Effect of TiO<Subscript>2</Subscript> Resistive Random Access Memory to Mimic the Synaptic Forgetting Process

In this work, we report on mimicking the synaptic forgetting process using the volatile mem-capacitive effect of a resistive random access memory (RRAM). TiO₂ dielectric, which is known to show volatile memory operations due to migration of inherent oxygen vacancies, was used to achieve the volatile mem-capacitive effect. By placing the volatile RRAM candidate along with SiO₂ at the gate of a MOS capacitor, a volatile capacitance change resembling the forgetting nature of a human brain is demonstrated. Furthermore, the memory operation in the MOS capacitor does not require a current flow through the gate dielectric indicating the feasibility of obtaining low power memory operations. Thus, the mem-capacitive effect of volatile RRAM candidates can be attractive to the future neuromorphic systems for implementing the forgetting process of a human brain.