Current-Mode Active RC Filters Using Current Followers

In this letter, a realization of current-mode active filter using current followers as active element is described. We show the constructions of second-order lowpass, highpass and bandpass filters. The high-order filters can be realized by a cascade connection of these second filters. As examples, the second-order lowpass and highpass filters are designed for frequency of 5 MHz. The effectiveness of the proposed method is demonstrated through SPICE simulation.     

Design of positive feedback driven current-mode amplifiers Z-Copy CDBA and CDTA,and filter applications

In this study, high-performance current-mode amplifiers Z-Copy current differencing buffered amplifier (ZC-CDBA) and current differencing trans-conductance amplifier (ZC-CDTA) are designed. In order to improve input impedances of the amplifiers, a new approach based on positive feedback is proposed. Impedance improvement/reduction is achieved by using only two extra transistors for each input. This number of extra transistors is very few compared to that in conventional negative feedback based improvement techniques. The proposed technique is justified by performing a detailed stability analysis. It is shown that the input impedances of ZC-CDBA and ZC-CDTA can be safely reduced to the level of 50 Ω by considering fabrication scatterings. The proposed amplifiers are verified with analog filter applications, a new KHN and recently proposed biquadratic and frequency agile filters. It is shown that the filters operate accurately at the frequency level of 100 MHz. This is a clear sign of the proposed amplifiers’ high performance. Layout and post layout simulations are done for the proposed circuits using AMS 0.18 µm parameters in Cadence environment.     

电流模式CMOS OTA滤波器实现

本文提出了利用CMOS OTA综合连续时间电流模式滤波器的方法。应用信号流图模拟,系统地生成了二阶CMOS OTA电流滤波器。分析了OTA的非理想因素对滤波器高频性能的影响,并给出了简单的高频补偿方案。最后,给出了一个四阶巴特沃思低通滤波器的设计实例并经PSPICE仿真证实。     

跨导线性MDDCCⅡ电路

提出了一个跨导线性MDDCCII电路,该电路全部由双极型晶体管构成。详细分析了其工作原理,并对该电路进行了硬件实验。该电路在0～1.5MHz以很小的跟踪误差满足MDDCCII理想端口特性,其中电压跟踪误差为0.01,同相电流跟踪误差为0.01,反相电流跟踪误差为0.02。作为应用,根据该MDDCCII电路构成了多功能二阶低通和高通滤波器电路,并对滤波器进行了硬件实验。     

Automatic Tuning System for Integrator-Based Continuous-Time Filters

This paper proposes an automatic tuning system to adjust frequency characteristics of integrated continuous-time filters especially at high frequencies. Frequency characteristic deterioration of a filter using integrators with electrically controllable unity-gain frequencies can be easily evaluated and compensated even when they are affected by deviations of element values and parasitic elements. The compensation requires detection of both frequency and excess phase shifts of the integrators. Their two values are electrically detected by two detection systems usually used in the conventional frequency tuning system. The proposed system is stable, simple and easy to be implemented on an integrated circuit. As an example a 4th-order biquad bandpass filter with 10 MHz center frequency, 2 MHz passband width, and 0.5 dB passband ripples is designed using a bipolar process. Simulation results by SPICE show the effectiveness of the proposed system.     

Systematic Generation of Current-Mode Linear Transformation Filters Based on Multiple Output CCIIs

A transformation called current-mode linear transformation (CMLT) and its filter applications using multiple output second-generation current conveyors (MOCCIIs) are presented. The systematic method is developed to realize CMLT MOCCII-based filters efficiently. Based on the proposed design tables, we can synthesize high-order current-mode all-pole and elliptic filters with MOCCIIs, grounded resistors and capacitors. Moreover, the high-frequency elliptic filter can also be efficiently realized by adding capacitors to the relative all-pole filter, although floating capacitors are needed. Third-order Chebychev and elliptic lowpass filters are described in this paper. Experimental results that confirm the theoretical analysis are obtained. Furthermore, the proposed circuits can be extended to higher-order filters.     

差分式CMOS多功能电流模式滤波器

本文提出多端输出的CMOS电流加法器，在此基础上提出了新型差分式CMOS多功能电流模式滤波器的信号流图和电路。该滤波电路能同时产生二阶低通、带通、高通输出，并通过适当的连接能产生二阶带阻和全通滤波输出。对提出的滤波器截止频率为1MHz的电路进行了计算机PSPICE仿真。     

Second Order Band-Pass Filter Design Using Single CC-CDBA

Six new second order band-pass filter configurations using only a single current-controlled current differencing buffered amplifier (CC-CDBA) are proposed. Further, the proposed filters also have a minimum number of external electronic components. They realize current-mode, voltage-mode and transadmittance-mode filter characteristics. The quality factor and natural frequency can be adjusted electronically without changing the values of the passive components. The proposed filters use a minimum number of passive elements (two or three). There is no second order active filter structure which uses two passive components and one active component in the literature. The validity of the proposed filters is verified through PSpice simulations.     

Signal limitations of the current-mode filters employing current conveyors

It is well known that second-generation current conveyors (CCII) are widely used for the realization of second-order current-mode universal filters. A filter with high-quality factor (Q) and gain constant (K) suffers from various signal swing restrictions especially at its angular resonance frequency (ω₀). This is due to the terminal voltages of the CCIIs limited by the power supply voltages and maximum allowable terminal currents of the CCIIs. In this paper, signal limitations of the CCII-based current-mode filters are investigated in detail. A filter example is given to exhibit the signal limitations of a universal current-mode filter. The time-domain and frequency-domain results of the proposed filter are also given to verify the theoretical analysis.     

Current-controlled current differencing transconductance amplifier and applications in continuous-time signal processing circuits

This article presents the design for a basic current-mode building block for analogue signal processing, named as Current Controlled Current Differencing Transconductance Amplifier (CCCDTA). Its parasitic resistances at two current input ports can be controlled by an input bias current. As it can be applied in current-mode of all terminals, it is very suitable to use in a current-mode signal processing, which is continually more popular than a voltage one. The proposed element is realized in a bipolar technology and its performance is examined through PSPICE simulations. They display usability of the new active element, where the maximum bandwidth is 65 MHz. The CCCDTA performs low-power consumption and tuning over a wide current range. In addition, some examples as a current-mode universal biquad filter, a current-mode multiplier/divider and floating inductance simulator are included. They occupy only single CCCDTA.     

Programmable BiCMOS transconductor for capacitor-transconductor filters

A simple linear programmable BiCMOS transconductor is introduced. It mainly consists of an inverting amplifier with an emitter degeneration. The driver transistor is bipolar and the equivalent resistor is an MOS transistor operating in the linear region. This transconductor can be employed in high frequency continuous-time current-mode filters. Simulated and experimental results of filters show the validity of the proposed transconductor.<>     

最少元件的多输入多输出MOCCII电流模式滤波器

本文提出了两种基于MOCCⅡ（多端输出的第二代电流传输器）的多输入多输出的电流模式滤波器。两种电路均由2个MOCCⅡ及4个接地RC元件构成。每一种电路除了实现出单输出的低通、带通、高通、带组、全通电流模式滤波器外，还能实现三种不同类型的具有同时多输出的电流模式滤波器，提出的电路具有很低的无源灵敏度；同时应用基本电流镜技术实现出结构简单的高精度CMOS MOCCⅡ，并对MOCCⅡ及提出的滤流器电路进行了PSICE仿真。     

CMOS高频电流差分缓冲放大器

本文提出了一种利用修改的差分电流传输器(MDCC)与电压跟随器实现的全新高频CMOS差分电流缓冲放大器电路(CDBA).PSPICE仿真结果表明,在0～100MHz的频率范围内,提出的电路能很好地满足CDBA的端口特性.作为应用,实现了二阶电流模式多功能滤波器,并对他们进行了仿真.     

基于多输出端电流模式全差分积分器的梯形滤波器实现

本文提出了利用低电压多输出端电流模式全差分积分器（MCDI）综合连续时间电流模式滤波器的方法。首先对所设计的无源梯形滤波器用信号流图形（SFG）进行综合，然后用MCDI实现该SFG，分析并模拟了MCDI及所提出的滤波器的特性，应用3.3V、0.5μm、CMOS工艺参数仿真得到的1dB波纹四阶Chebyshev低通滤波器功耗仅为1mW左右，且其截止频率可在很宽的范围内调控，此外，这种滤波器还具有结构简单，对称性好，失真小等优点，适于全集成。     

New current-mode wave-pipelined architectures for high-speed analog-to-digital converters

In this paper, two new architectures for high-speed CMOS wave-pipelined current-mode A/D converters (WP-IADCs) are proposed and analyzed. In the new WP-IADC architectures, the wave-pipelined theory is applied to both pipeline structures, called full WP-IADC (FWP-IADC) and indirect transfer WP-IADC (ITWP-IADC). In the FWP-IADC, each stage uses the full current-mode wave-pipelined structure without switched-current cell circuits. In the ITWP-IADC, the switched-current cells are incorporated into the wave-pipelined stages which are divided into several sections with controlled clocks. Therefore, the proposed ITWP-IADC performs optimally in terms of speed and accuracy in the WP-IADCs. Generally, the proposed WP-IADCs have the advantages of high speed, high input frequency, high efficiency of timing usage, high clock-period flexibility in switched-current cells for precision enhancement, and reduced number of switched-current cells in the overall data path for linearity improvement. According to the theoretical analysis on the proposed WP-IADC structures, the minimum sampling clock period is proportional to the intrinsic delay of the current mirror and the increased rise/fall time in each wave-pipelined stage. The HSPICE simulation results reveal that, under Nyquist rate sampling in 8-b resolution, a sampling rate of 20 and 54 MHz can be achieved for FWP-IADC and two-section ITWP-IADC, respectively. If four wave-pipelined sections are used, the ITWP-IADC can be operated at 166 MHz at an input frequency of 8 MHz. To experimentally verify the correct function of the proposed WP-IADC structures, the proposed new architecture of the FWP-IADC is implemented by using 0.35-/spl mu/m CMOS technology. The measurement results successfully demonstrate the feasibility of wave-pipelined IADC architectures in applications of high-speed ADCs.     

0.8 V PLL-based automatic frequency tuning system for current-mode filters

A wide-range automatic frequency tuning system for current-mode filters is proposed in this paper. The cutoff frequency of the tunable filter is controlled by an external reference signal and is locked in the desired frequency through a current-mode based phase locked loop (PLL) circuit. Although the PLL operates in a relatively narrow band, the total tuning range of the topology is extended by interpolating an automatic frequency detector after the reference input and before the PLL. The use of current controlled oscillator, based on same blocks with those in the filter, offers accuracy and feasible design in the control path. The topology has been simulated using MOS transistor models for a 130 nm CMOS technology in 0.8 V supply voltage. The achieved overall automatic tuning range was from 2.3 MHz to 660 MHz.     

Current-mode elliptic filter design based on symmetrical current switching

This paper describes a current-mode elliptic filter structure based on dual-output OTAs and grounded capacitors. The filter is capable of producing both lowpass and highpass notch responses without changing the filter structure. This is achieved using a symmetrical current switching technique based on two switches controlled with a 2-bit digital word. The proposed filter structure forms a basic second-order building block in the design of high-order elliptic filters with tuneable frequency response. To confirm the theoretical analysis, simulated and measured results of fourth-order elliptic lowpass and highpass filters with tuneable bandwidth in the range of 0.65MHz to 1.3MHz are included. Finally, detailed analysis of the OTAs non-ideal parameters on the filter performance is presented and an example is given.     

多输出端电流模式全差分积分器实现带通滤波器的方法及仿真

该文提出了利用低电压多输出端电流模式全差分积分器(MCDI)设计实现连续时间电流模式滤波器的方法.分析并模拟了MCDI及所提出的滤波器的特性,应用3.3V,0.5m,CMOS工艺参数仿真得到的二阶带通滤波器功耗仅为0.6mW左右,且其中心频率可在很宽的范围内调控.此外,这种滤波器还具有结构简单、对称性好、失真小等优点,适于全集成.     

CMOS current-controlled current differencing transconductance amplifier and applications to analog signal processing

This article presents design of a basic current-mode building block for analog signal processing, named as current-controlled current differencing transconductance amplifier (CCCDTA). Its parasitic resistances at two current input ports can be controlled by an input bias current. Owing to working in current-mode of all terminals, it is very suitable to use in a current-mode signal processing, which is continually more popular than a voltage one. The proposed element is realized in a CMOS technology and is examined the performance through PSPICE simulations. They display usability of the new active element, where the maximum bandwidth is 311 MHz. The CMOS CCCDTA performs low power consumption and tuning over a wide current range. In addition, some examples as a current-mode universal biquad filter, floating inductance simulator and quadrature oscillator are included. They occupy only single CCCDTA.     

The design of CMOS continuous-time VHF current and voltage-modelowpass filters with Q-enhancement circuits

In this paper, very high frequency (VHF) current and voltage biquadratic lowpass filters implemented directly by the linear wideband finite-gain current and voltage amplifiers, respectively, are proposed and analyzed. A new Q-enhancement circuit which consists of a finite-gain wideband tunable voltage amplifier and a Miller capacitor is also proposed. It can increase the maximum-gain frequency f_M, and enhance the maximum-gain quality factor Q_M of the VHF lowpass filters. Experimental results have successfully verified the capability of the proposed new filter implementation method in realizing both VHF current and voltage lowpass filters with maximum-gain frequency f_M tunable in the range of 148 MHz to 92 MHz. It is also shown from experimental results that the VHF current lowpass biquad with the Q-enhancement circuit has the maximum-gain frequency f_M near 185 MHz and the maximum-gain quality factor Q_M up to 18.5. A fourth-order Chebyshev current lowpass filter with the cut-off frequency of 190 MHz has been successfully designed by using the current biquads with Q-enhancement circuits