Current-controlled current differencing transconductance amplifier and applications in continuous-time signal processing circuits

This article presents the design for a basic current-mode building block for analogue signal processing, named as Current Controlled Current Differencing Transconductance Amplifier (CCCDTA). Its parasitic resistances at two current input ports can be controlled by an input bias current. As it can be applied in current-mode of all terminals, it is very suitable to use in a current-mode signal processing, which is continually more popular than a voltage one. The proposed element is realized in a bipolar technology and its performance is examined through PSPICE simulations. They display usability of the new active element, where the maximum bandwidth is 65 MHz. The CCCDTA performs low-power consumption and tuning over a wide current range. In addition, some examples as a current-mode universal biquad filter, a current-mode multiplier/divider and floating inductance simulator are included. They occupy only single CCCDTA.     

Wideband CMOS current conveyor

A novel CMOS second generation current conveyor (CCII) for high frequency current-mode signal processing is described. The input stage consists of a regulated current cell coupled to a source follower, and the output stage is a cascode current mirror. This architecture provides the high input/output conductance ratio for current transfer. Simulations show that a 3 dB bandwidth extends beyond 100 MHz     

A Current-Mode Circuit With a Linearized Input V/I Conversion Scheme and the Realization of a 2-V/2.5-V Operational, 100-MS/s, MOS SHA

This paper proposes a circuit to linearize the signal current and improve the distortion characteristics at the input of a current-mode circuit. Input voltage-to-current (V/I) conversion is carried out by a resistor that connects the signal source and the current input terminal of the current-mode circuit. The signal current flowing into the current-mode circuit through this resistor is distorted because of the signal-dependent voltage change at the current input terminal, and it is linearized by injecting a current that is proportional to the signal-dependent voltage change at the current input terminal, into the same current input terminal of the current-mode circuit. A current-mode sample-and-hold amplifier (SHA) that adopts the proposed scheme was fabricated and a 0.35-$mu{hbox {m}}$ CMOS process was used to verify the effectiveness of the scheme. It operated from a 2-V supply voltage in the analog part and a 2.5 V in the digital part with a 100-MHz clock and realized a 77- and a 86-dB spurious-free dynamic range values for 0 and $-$10 dB of full-scale signal current level $(pm hbox{100} mu{hbox {A}})$, respectively, of the 1-MHz signal input. More than a 13-bit equivalent SFDR for $-$14 to $-$4 dB of full-scale input was obtained, proving the effectiveness of the proposed scheme at realizing distortionless signal current processing.      

Seventh-order elliptic video filter with 0.1 dB pass band ripple employing CMOS CDTAs

In this paper, a CMOS realization of the current differencing transconductance amplifier (CDTA) is given, which is a newly reported active building block for current-mode signal processing. Current differencing stage of the CDTA element is realized using a differential current-controlled current source and in the output stage, floating current sources are used to convert intermediate voltage of z terminal to output currents. Due to the compactness of the circuit, it is capable of high-frequency operation and suitable for video signal-processing applications. The CDTA element is used in a current-mode anti-aliasing video filter, which is designed using operational simulation of a seventh-order passive elliptic filter, so the resulting active filter has the low sensitivity feature of its passive counterpart. The filter has 0.1 dB maximum pass band ripple as imposed by ITU video anti-aliasing filter standard. SPICE-simulation results of both the CDTA element and the seventh-order elliptic filter are given. Simulation results are found in close agreement with theoretical results.     

Current-mode CMOS multiple-valued logic circuits

Current-mode CMOS circuits are receiving increasing attention. Current-mode CMOS multiple-valued logic circuits are interesting and may have applications in digital signal processing and computing. In this paper we review several of the current-mode CMOS multiple-valued logic (MVL) circuits that we have studied over the past decade. These circuits include a simple current threshold comparator, current-mode MVL encoders and decoders, current-mode quaternary threshold logic full adders (QFAs), current-mode MVL latches, current-mode latched QFA circuits, and current-mode analog-to-quaternary converter circuits. Each of these circuits is presented and its performance described     

High Frequency and High Precision CMOS Half-Wave Rectifier

In this paper, a new high frequency and high precision half-wave rectifier circuit which is very suitable for CMOS technology implementation is presented. The system comprises a voltage to current converter, a dual output precision current-mode half-wave rectifier, and two current to voltage converters. An input voltage signal is converted into a current signal by using a current conveyor and a MOS resistor. The current signal is rectified using a dual output class-AB precision rectifier cell and then converted into two output voltages by using grounded MOS resistors. This class-AB current-mode precision rectifier is employed for providing high frequency performance. Simulated rectifier results based-on a 0.5 µm CMOS technology with ±1.2 V supply voltage demonstrates very high operating frequency, very precise rectification and good temperature stability.     

A Novel Resistor-Free Electronically Adjustable Current-Mode Instrumentation Amplifier

In this paper, a novel topology for implementing resistor-free current-mode instrumentation amplifier (CMIA) is presented. Unlike the other previously reported instrumentation amplifiers (IAs), in which input and/or output signals are in voltage domain, the input and output signals in the proposed structure are current signals and signal processing is also completely done in current domain benefiting from the full advantages of current-mode signal processing. Interestingly the CMRR of the proposed topology is wholly determined by only five transistors. Compared to the most of the previously reported IAs in which at least two active elements are used to attain high common-mode rejection ratio (CMRR) resulting in a complicated circuit, the proposed structure enjoys from an extremely simple circuit. It also exhibits low input impedance employing negative feedback principal. Of more interest is that, using simple degenerate current mirrors, the differential-mode gain of the proposed CMIA can be electronically varied by control voltage. This property makes it completely free of resistors. The very low number of transistors used in the structure of the proposed CMIA grants it such desirable properties as low-voltage low-power operation, suitability for integration, wide bandwidth etc. SPICE simulation results using the TSMC 0.18-μm CMOS process model under supply voltage of ±0.8 V show a high CMRR of 91 dB and a low input impedance of 291.5 Ω for the proposed CMIA. Temperature simulation results are also provided, which prove low temperature sensitivity of the proposed CMIA.     

A new CMOS differential current-mode AGC on the division operation based

A new CMOS differential current-mode AGC on the division operation based is presented. The operation principle consists in detection of both positive and negative envelopes of the differential input signal cycles, respectively. The output signal with constant magnitude is obtained by dividing the differential input signal to the difference between the positive and negative detected envelopes. The new current-mode architecture of the proposed AGC (composed only by an envelope detector and a divider stage) diminishes significantly the settling time, the circuit complexity and the power consumption. The circuit yields an input dynamic range of 15 dB and provides a constant magnitude output signal in the frequency range from 10 MHz to 70 MHz. The current consumption is 5 mA from a single 3.3 V supply voltage. The simulations performed in 0.13 µm CMOS process confirm the theoretically obtained results.     

Algorithmic analogue-to-quaternary convertor circuit using current-mode CMOS

A new current-mode CMOS algorithmic analogue-to-quaternary data convertor circuit has been realised in a standard polysilicon-gate CMOS technology. This circuit accepts an analogue current input and develops a set of quaternary, base-four, output currents. A single type of convertor cell may be cascaded to the desired number of quaternary output digits. The reference current that defines the full scale input range may be set externally. This circuit is input-output compatible with other previously described VLSI-compatible current-mode CMOS quaternary threshold logic and memory circuits.<>     

CMOS FTFN realisation based on translinear cells

A novel CMOS implementation of a four-terminal floating nullor (FTFN) is proposed. The presented FTFN circuit is based on two translinear cells and cascode current mirrors. It provides an alternative solution to differential amplifier-based FTFN circuits. Simulation results show that the proposed circuit is quite suitable for wideband, accurate and wide dynamic range current-mode signal processing. The feasibility of the circuit is tested on a current-mode bandpass filter structure     

Wideband CMOS current conveyor

A CMOS second generation current conveyor consisting of two matched differential pairs and based on the first generation current conveyor is presented. PSPICE simulations have shown that its performance is quite satisfactory for wideband current-mode signal processing     

Electronically tunable current-mode biquad filter employing CCCDTAs and grounded capacitors with low input and high output impedance

In this study, a single-input multiple-outputs current-mode analog biquadratic filter, based on current controlled current differencing transconductance amplifier (CCCDTA) is presented. The proposed filter uses two CCCDTAs and two grounded capacitors without any external resistors, which is well suited for integrated circuit implementation. The filter simultaneously gives 3 standard transfer functions, namely, lowpass, highpass and bandpass filters with independent control of quality factor and pole frequency by electronic method. By summing of I_HP and L_LP, the notch filter can be also achieved. Moreover, the circuit has low input and high output impedance which would be an ideal choice for cascading in current-mode circuit. The PSPICE simulation results are included verifying the workability of the proposed filter. The given results agree well with the theoretical anticipation.     

A new CMOS realization of a four terminal floating nullor (FTFN)

A novel circuit configuration for the realization of a four terminal floating nullor in CMOS technology is proposed. The circuit proposed combines the advantages of a cascade of common-source and common-gate amplifiers and a floating current source. PSPICE simulations show that the proposed circuit is suitable for wideband, accurate and wide dynamic range current-mode signal processing. The feasibility of the circuit is also tested successfully in a current-mode band-pass filter structure.     

DESIGN OF TERNARY CURRENT-MODE CMOS CIRCUITS BASED ON SWITCH-SIGNAL THEORY

By applying switch-signal theory, the interaction between MOS transmission switch-ing transistor and current signal in current-mode CMOS circuits is analyzed, and the theory oftransmission current-switches which is suitable to current-mode CMOS circuits is proposed. Thecircuits, such as ternary full-adder etc., designed by using this theory have simpler circuit struc-tures and correct logic functions. It is confirmed that this theory is efficient in guiding the logicdesign of current-mode CMOS circuits at switch level.     

Current-Mode First-Order Allpass Filter Employing Single Current Operational Amplifier

A current-mode first-order allpass filter configuration is proposed. The presented circuit uses a single current operational amplifier (COA), a resistor and a capacitor, which are of minimum number. High output impedance of the proposed filter enables the circuit to be cascaded without additional buffers. The proposed circuit is insensitive to parasitic input capacitances and input resistances due to internally grounded input terminals of COA. It does not impose any component matching constraint in analog signal processing circuits. Non-ideal effects of COA to the first-order allpass network are also investigated. To demonstrate the performance of the proposed filter a new current-mode quadrature oscillator is given as an application example. The theoretical results are verified with PSPICE simulations using a new realization of fully differential CMOS COA.     

Current multiplier/divider circuit

A new current multiplier/divider circuit using CMOS techniques and based on current-mirror circuits is proposed, and simulated by SPICE3 to confirm its function. This circuit will be a useful subcircuit for analogue current-mode signal processing systems.<>     

CMOS Latch Using Quad for High-Speed Comparators

The well-known CMOS quad consisting of two asymmetric differential pairs is a transconductance element. It provides an additional output current proportional to the square of its differential input voltage. Here, we use both the linear and square-law outputs of a quad to build a high-speed latch that has differential low-voltage output swing. This latch retains the useful property of constant power-supply current like all current-biased differential current-mode logic circuits. Simulation results for 0.18-mum CMOS process are presented. The design is application specific and is intended for use in high-speed comparators needed for analog-to-digital converters     

基于开关信号理论的三值电流型CMOS电路设计

本文应用开关信号理论对电流型CMOS电路中MOS传输开关管与电流信号之间的相互作用进行了分析,并提出了适用于电流型CMOS电路的传输电流开关理论。应用该理论设计的三值全加器等电路具有简单的电路结构和正确的逻辑功能,从而证明了该理论在指导电流型CMOS电路在开关级逻辑设计中的有效性。     

CMOS continuous-time current-mode filters for high-frequencyapplications

Design considerations for high-frequency CMOS continuous-time current-mode filters are presented. The basic building block is a differential current integrator with its gain constant set by a small-signal transconductance and a gate capacitance. A prototype fifth-order low-pass ladder filter implemented in a standard digital 2 μm n-well CMOS process achieved a -3 dB cutoff frequency (f ₀) of 42 MHz; f₀ was tunable from 24 to 42 MHZ by varying a reference bias current from 50 to 150 μA. Using a single 5 V power supply with a nominal reference current of 100 μA, the five-pole filter dissipated 25.5 mW. The active filter area was 0.056 mm²/pole. With the minimum input signal defined as the input-referred noise integrated over a 40 MHz bandwidth, and the maximum input signal defined at the 1% total intermodulation distortion (TIMD) level, the measured dynamic range was 69 dB. A third-order elliptic low-pass ladder filter was also integrated in the 2 μm n-well CMOS process to verify the implementation of finite transmission zeros     

A 1.4-V 48-μW current-mode front-end circuit for analog hearing aids with frequency compensation

正A current-mode front-end circuit with low voltage and low power for analog hearing aids is presented. The circuit consists of a current-mode AGC(automatic gain control) and a current-mode adaptive filter.Compared with its conventional voltage-mode counterparts,the proposed front-end circuit has the identified features of frequency compensation based on the state space theory and continuous gain with an exponential characteristic.The frequency compensation which appears only in the DSP unit of the digital hearing aid can upgrade the performance of the analog hearing aid in the field of low-frequency hearing loss.The continuous gain should meet the requirement of any input amplitude level,while its exponential characteristic leads to a large input dynamic range in accordance with the dB SPL(sound pressure level).Furthermore,the front-end circuit also provides a discrete knee point and discrete compression ratio to allow for high calibration flexibility.These features can accommodate users whose ears have different pain thresholds.Taking advantage of the current-mode technique,the MOS transistors work in the subthreshold region so that the quiescent current is small.Moreover,the input current can be compressed to a low voltage signal for processing according to the compression principle from the current-domain to the voltage-domain.Therefore,the objective of low voltage and low power(48μW at 1.4 V) can be easily achieved in a high threshold-voltage CMOS process of 0.35μm(V_(TON) + |V_(TOP)|≈1.35 V).The THD is below -45 dB.The fabricated chip only occupies the area of 1×0.5 mm~2 and 1×1 mm~2.