探测大气压力的差分吸收激光雷达的一种光发射机

介绍了一种氧气A带差分吸收激光雷达发射机,试图用于大气压力探测实验.该激光发射机是基于种子注入的光参量振荡器和光参量放大器的结构.作为从振荡器,采用一个环形腔KTP光参量振荡器.作为注入种子的主振荡器,即一个连续波外腔调谐二极管激光器.该连续波外腔调谐二极管激光器,由高精度的波长计构成的一个PID(Proportional-Integral-Derivative)伺服控制环,稳定其工作波长.向光参量振荡器的谐振腔注入连续波的种子激光,通过"Ramp-Hold-Fire"技术,锁定OPO(Optical Parametric Oscillator)谐振腔的腔长.该激光发射机具有高的光频率稳定性(30 MHz/rms)、窄的线宽(傅立叶转换限)、高的脉冲能量(≥45 mJ)等性能,能够在工作期间保持稳定.发射机系统以单纵模式工作,使得差分吸收激光雷达对后向散射光信号的窄带探测成为可能.因而此类系统具有精确探测大气压力的发展潜力.     

电子线路学习方法(二十) 第十二讲 正弦波振荡器电路分析方法

正弦波振荡器是众多振荡器电路中的一种.所谓振荡器就是不需要外电路输入信号,自身能够产生某种频率信号的电路,正弦波振荡器是能够产生某一频率正弦信号的电路.一、正弦波振荡器准备知识用于各种场合下的振荡器,由于所要求的振荡频率不同,振荡信号不同,具体的振荡器电路形式很多,在这一节中将详细讲解正弦波振荡器的工作条件和电路工作基...     

1种用于TPMS的新型环振式数字压力传感器

研制了一种新型环振式数字压力传感器,它可应用于汽车轮胎压力监测报警系统(TPMS).采用硅薄膜上的PMOS环形振荡器作为压力敏感元件,两个反方向变化的环振输出信号通过集成在片内的混频器实现频率相减.该传感器具有准数字输出、温度系数低、灵敏度高以及制作工艺简单等特点.分析并设计了压力传感器的环形振荡器电路、混频器电路、物理结构.分析了环形振荡器的频率特性、环形振荡器的谐振频率与压力的关系,以及制作工艺,并制作了样品,其灵敏度为5.12 kHz/Bar.     

MOS环振式数字加速度传感器

提出了一种新的环振式数字加速度传感器,它采用做在硅梁上的MOS环形振荡器作为敏感元件,两个反方向变化的环振输出信号通过集成在片内的混频器实现频率相减.该传感器具有准数字输出、灵敏度高、温度系数低以及制作工艺简单等特点.分析了环形振荡器的频率特性,以及环形振荡器的谐振频率和加速度的关系,分析并设计了加速度传感器的环形振荡器电路、混频器电路、物理结构以及制作工艺,并制作了样品,其灵敏度为6 .91k Hz/g.     

MOS环振式数字加速度传感器

提出了一种新的环振式数字加速度传感器,它采用做在硅梁上的MOS环形振荡器作为敏感元件,两个反方向变化的环振输出信号通过集成在片内的混频器实现频率相减.该传感器具有准数字输出、灵敏度高、温度系数低以及制作工艺简单等特点.分析了环形振荡器的频率特性,以及环形振荡器的谐振频率和加速度的关系,分析并设计了加速度传感器的环形振荡器电路、混频器电路、物理结构以及制作工艺,并制作了样品,其灵敏度为6.91kHz/g.     

全集成片上低温漂振荡电路

设计了一个全集成低温漂振荡电路,该电路通过将片上环形振荡器产生的振荡信号的频率转换为电压,并与片上基准电压源产生的基准电压进行比较,产生振荡器控制电压,实现稳定振荡器工作频率的目的.由于片上基准电压源和频率-电压转换电路具有较小的温度系数,振荡器的工作频率也具有较小的温度系数(140 ppm/℃).该电路无需从片外接收任何基准信号.另外,该设计具有对振荡器工作频率的负反馈调整机制,与单独的振荡器相比,输出信号的频率更加稳定,在0～100 ℃范围内,输出信号频率的变化小于1.35%.     

多功能信号发生电路XR-2206及其应用

<正> XR-2206是一种单片集成函数发生器电路,能产生高稳定度和高精度的正弦波、方波、三角波、斜波和矩形脉冲波,这些输出信号可受外加电压控制,从而可实现振幅调制(AM)或频率调制(FM)。其工作频率范围为0.01Hz～1MHz。XR-2206可广泛应用于各种波形信号发生器、正弦波或脉冲波的AM/FM发生器、扫频振荡器、电压/频率转换器、位移键控制(FSK)发生器、调制解调器(MODEM)作调制器用。也可在锁相环路(PLL)中作压控振荡器     

新颖的基于MOCCCII的多相位正弦振荡器

提出了一种用多输出电流控制传输器(MOCCCII)实现的多相位正弦波振荡器.设计出的振荡器能同时产生n相等幅等相差的正弦电流和电压信号.振荡条件和振荡频率独立可调.电路结构简单,PSPICE仿真结果验证了理论分析的正确性.     

DDS技术在SPWM信号产生系统IP核设计中的应用

提出了一种新的数字频率合成 (DDS)实现的方法 ,对传统的 DDS系统进行了改进 ,通过改变正弦波数据的取样时钟频率来改变正弦波的频率 ,而每个周期正弦波的采样点数固定不变 ,从而解决了传统 DDS生成正弦波波形精度随频率的增加而减小的问题 ,另外 ,通过在数控振荡器 (NCO)和正弦波查找表 (LUT)之间加入一个加减地址计数器 ,使得正弦波数据存储器 ROM减小到原来的 1 /4。仿真和 FPGA测试结果验证了设计的正确性。     

可编程正弦波信号发生器

本电路使用Micro Linear公司的ML2035单片可编程正弦波信号发生器(IC3)来产生正弦波信号,无需像通常那样由单片机来提供频率决定代码字。振荡器/计数器74HC4060(IC1)用来为ML2035提供时     

一种应用于低噪声PLL的RF-VCO设计

在PLL电路设计中,压控振荡器设计是电路的关键模块,按类型又主要分为LC震荡器和环形振荡器两种,其性能直接决定了相位噪声、频率稳定度及覆盖范围。文章介绍了一款1.8 GHz的基于交叉耦合对LC结构的低噪声CMOS压控振荡器的设计,并对调谐范围、相位噪声以及电路起振条件等做了分析讨论。该设计采用0.18μm 6层金属CMOS工艺制造,模块面积为0.3 mm2,电路经过Cadence SpectreRF仿真,VCO的输出范围为1 594~2 023 MHz,中心频率1.8 GHz输出时相位噪声为-118 dBc/Hz@600 kHz,1.9 GHz输出时相位噪声为-121 dBc/Hz@600 kHz。结果表明该VCO设计达到了较宽的频率覆盖范围和较低的相位噪声,可以满足低噪声PLL的设计要求。     

An efficient method for nonlinear distortion calculation of the AM and PM noise spectra of FMCW radar transmitters

The demand for autonomous cruise control and collision warning/avoidance systems has increased in recent years. Many systems based on frequency-modulated continuous-wave (FMCW) radar have emerged and are still in development. Due to the high complexity of such systems, the accurate evaluation of the noise spectra in the transmitter chain driven by complex modulated signals is today a severe drawback due to the limitation of simulation tools. In this paper, a method is proposed to compute easily with any commercially available nonlinear simulator, the amplitude and phase modulated signal distortion introduced by the nonlinearities of the transmitter on an FMCW signal. First, the amplitude modulation (AM) and phase modulation (PM) noise spectra of the driving FMCW signal is derived from the knowledge of the continuous wave (CW) AM and PM noise spectra of the voltage-controlled oscillator (VCO), and the modulating saw-tooth signal applied. Using the narrow band envelope concept and a first-order expansion of the nonlinear transfer function of the transmitter, the transfer of the AM and PM noise spectra of the driving FMCW signal through the nonlinear transmitter chain and the resulting output distortion are then computed. This novel approach allows to compute with reduced computation time and very good accuracy the AM/AM, AM/PM, PM/PM, and PM/AM conversion terms in any nonlinear system driven by CW or FMCW signals. This new method has been applied to the characterization of a whole car radar transmitter operating at 77 GHz driven by an FMCW signal issuing from a VCO. A successful comparison between measured and simulated PM-to-AM conversion coefficients of this transmitter is shown, validating the proposed method.     

A 3–5 GHz low-power high-speed radiated power tuning UWB transmitter

To satisfy the different radiated power requirements for the ultra-wideband (UWB) data transmitting in the implantable electronic devices or the wireless component interconnections, a novel low-power high-speed UWB transmitter with radiated power tuning was proposed. The tunable radiated power is achieved by a UWB RF buffer with a peak value controller. The designed low-complex narrow pulse generator and digital ring on–off VCO ensure a high speed transmitting. The low power is realized by using a subtractor to eliminate the base-band component from the output of the VCO and making the UWB RF buffer and the VCO operating in standby mode. The design was fabricated by a standard 0.18 μm CMOS technology. The test results show that the design can achieve maximum data-rate of 250 Mbps, frequency bandwidth from 3 to 5 GHz, radiated power tuning from −40 dBm to −60 dBm, low-power of 8 pJ/bit, and small circuit area of 0.18 mm².     

Ring voltage controlled oscillator for high-speed PLL systems

A circuit of a ring voltage controlled oscillator (VCO), which is to be used in high-speed phase-locked loop (PLL) systems integrated into programmable logic integrated circuits, is proposed. The maximum operating frequency of a VCO in 180 nm CMOS is shown by simulation to be able to reach 2 GHz in all operating conditions with the phase noise being ?99 dB/Hz and detuning frequency being 1 MHz.     

一种应用于NB-IoT芯片的压控振荡器

采用40 nm 1P6M CMOS工艺,研究与设计了一款应用于窄带物联网(Narrowband Internet of Things,NB-IoT)芯片的压控振荡器(Voltage Controlled Oscillator,VCO)。该VCO利用负反馈电路降低输出的相位噪声,通过电容减敏技术降低了输出频率相对于可变电容的敏感度,通过交叉偏置二极管技术提高了VCO增益的线性度。测试结果显示:VCO所需功耗为1.2 mW;当VCO震荡在3.49 GHz时,在偏离3.49 GHz的100 kHz、150 kHz、300 kHz、500 kHz和2.5 MHz的相位噪声的测量值依次为-92 dBc/Hz、-91 dBc/Hz、-100 dBc/Hz、-110 dBc/Hz和-125 dBc/Hz;采用此压控振荡器的NB-IoT发射机输出矢量幅度误差(Error Vector Magnitude,EVM)为7.8%,频谱辐射模板(Spectrum Emission Mask,SEM)和临近信道抑制比(Adjacent Channel Power Ratio,ACPR)均满足3GPP要求。可见,测试结果证明了所提出压控振荡器电路的有效性和实用性。     

模-数-差信号发生器的设计与实现

模-数-差信号发生器主要由集成压控振荡器ICL8038构成的函数信号发生器电路、模.数.差变换与输出电路以及电源电路组成.设计是在函数信号发生器和双路直流电源基础上,采取比例放大、串联分压、二极管检波等变换与组合方法,实现由正弦波、三角波、方波、直流信号组成的模拟信号,TTL和CMOS信号组成的数字信号,以及具有AC和DC信号的差分信号.模-数-差信号发生器集多种常用信号于一体,使用简便,可适应多种场合的电子测量.     

Design of 10 GHz eight-phase voltage controlled oscillator in 90 nm CMOS

A novel 10 GHz eight-phase voltage-controlled oscillator(VCO) architecture applied in clock and data recovery(CDR) circuit for 40 Gbit/s optical communications system is proposed.Compared with the traditional eight-phase oscillator,a new ring CL ladder filter structure with four inductors is proposed.The VCO is designed and fabricated in IBM 90nm complementary metal-oxide-semiconductor transistor(CMOS) technology.Measurement results show the tuning range is 9.2 GHz～11.0 GHz and the phase noise of-108.85 dBc/Hz at 1 MHz offset from the carrier frequency of 10 GHz.The chip area of VCO is 500 μm× 685 μm and the power dissipation is 17.4 mW with the 1.2 V supply voltage.     

96-GHz static frequency divider in SiGe bipolar technology

A static frequency divider designed in a 210-GHz f/sub T/, 0.13-/spl mu/m SiGe bipolar technology is reported. At a -5.5-V power supply, the circuit consumes 44 mA per latch (140 mA total for the chip, with input-output stages). With single-ended sine wave clock input, the divider is operational from 7.5 to 91.6 GHz. Differential clocking under the same conditions extends the frequency range to 96.6 GHz. At -5.0 V and 100 mA total current (28 mA per latch), the divider operates from 2 to 85.2 GHz (single-ended sine wave input).     

A 0.25-/spl mu/m CMOS OPLL transmitter IC for GSM and DCS applications

A single-chip CMOS global system for mobile communications/digital cellular system dual-band offset phase-locked loop (OPLL) transmitter is presented in this paper. This chip includes a quadrature modulator and an OPLL modulation loop. Except for the loop filter and high-power voltage-controlled oscillator (TX VCO), everything is integrated into this chip to form a dual-band transmitter. This transmitter integrated circuit is fabricated in a 0.25-mum CMOS process. The current consumption without the TX VCO is approximately 23 mA under 2.7-V power supply for both bands. The measured rms and peak phase errors for Gaussian minimum shift-keying (GMSK) modulated signals are approximately 1deg and 2.4deg, respectively. The measurements show comparable performance to its BiCMOS counterparts     

5GHz0.18μm CMOS宽带LC VCO

采用0.18μm RF CMOS工艺,设计了一个5GHz的宽带电感电容压控振荡器。该压控振荡器的电路结构选用互补交叉耦合型,采用噪声滤波技术降低相位噪声,并采用开关电容阵列扩展其调谐范围。后仿真结果表明,实现了4.44～5.44GHz的宽调谐。振荡器的电源电压为1.8V,工作电流为2.78mA,版图面积为0.37mm2。