A 1.2-V 37–38.5-GHz Eight-Phase Clock Generator in 0.13- μm CMOS Technology

A 37-38.5-GHz clock generator is presented in this paper. An eight-phase LC voltage-controlled oscillator (VCO) is presented to generate the multiphase outputs. The high-pass characteristic CL ladder topology sustains the high-frequency signals. The split-load divider is presented to extend the input frequency range. The proposed PD improves the static phase error and enhances the gain. To verify the function of each block and modify the operation frequency, two additional testing components-an eight-phase VCO and a split-load frequency divider-are fabricated using 0.13-mum CMOS technology. The measured quadrature-phase outputs of VCO and input sensitivity of the divider are presented. This clock generator has been fabricated with 0.13-mum CMOS technology. The measured rms clock jitter is 0.24 ps at 38 GHz while consuming 51.6 mW without buffers from a 1.2-V supply. The measured phase noise is -97.55 dBc/Hz at 1-MHz offset frequency     

A 2.5-GHz eight-phase VCO in SiGe BiCMOS technology

We present a 2.5-GHz voltage-controlled oscillator (VCO) with eight equally distributed phases derived from a 10-GHz LC VCO. Stochastic and static phase errors were obtained by spectrum analyzer measurements in conjunction with an on-chip single-sideband mixer. From the measured phase noise spectrum, we predict an absolute rms jitter contribution of 130 fs in a 2-MHz bandwidth phase-locked loop. A static phase error of less than 0.7/spl deg/ was deduced from the sideband suppression. The eight-phase VCO is tunable from 2.35 to 2.85 GHz and draws 16 mA from a 2.0-V supply. Possible applications include clock and data recovery of a 10-Gb/s signal in a fiber-optic receiver as well as high-precision image rejection receivers and I/Q direct up-converters for radio-frequency applications.     

基于多相子载波生成和高增益射频振荡器的高数据率超宽带调频发射机

描述了高数据率超宽带调频(FM-UWB)发射机的系统结构和电路设计.该发射机采用内含8相环形振荡器的有限模小数分频型锁相环(PLL)生成频率键控正弦波信号,以降低子载波频率和噪声.该环形振荡器输出的差分正弦波信号直接调制高增益射频(RF)环形振荡器,生成带宽为2 GHz且满足UWB频谱掩膜的信号.在65 nm TSMC...     

A 108-GHz InP-HBT monolithic push-push VCO with low phase noise andwide tuning bandwidth

This paper reports on what is believed to be the highest frequency bipolar voltage-controlled oscillator (VCO) monolithic microwave integrated circuit (MMIC) so far reported. The W-band VCO is based on a push-push oscillator topology, which employs InP HBT technology with peak f_T's and f_max's of 75 and 200 GHz, respectively. The W-band VCO produces a maximum oscillating frequency of 108 GHz and delivers an output power of +0.92 dBm into 50 Ω. The VCO also obtains a tuning bandwidth of 2.73 GHz or 2.6% using a monolithic varactor. A phase noise of -88 dBc/Hz and -109 dBc/Hz is achieved at 1- and 10-MHz offsets, respectively, and is believed to be the lowest phase noise reported for a monolithic W-band VCO. The push-push VCO design approach demonstrated in this work enables higher VCO frequency operation, lower noise performance, and smaller size, which is attractive for millimeter-wave frequency source applications     

Millimetre-wave VCO with enhanced f/sub trans/

A 60 GHz voltage-controlled oscillator (VCO) with a double cross-coupled negative-resistance cell is presented. The proposed double cross-coupled pair shows higher f_trans and lower input capacitance than a typical capacitive-degeneration cross-coupled pair at millimetre-wave band. The 60 GHz double cross-coupled VCO has phase noise of -84 dBc/Hz at 100 kHz offset from 59.2 GHz and good FOM of -188 dBc/Hz.     

A 5-GHz low phase noise differential colpitts CMOS VCO

A low noise 5-GHz differential Colpitts CMOS voltage-controlled oscillator (VCO) is proposed in this letter. The Colpitts VCO core adopts only PMOS in a 0.18-/spl mu/m CMOS technology to achieve a better phase noise performance since PMOS has lower 1/f noise than NMOS. The VCO operates from 4.61 to 5 GHz with 8.3% tuning range. The measured phase noise at 1-MHz offset is -120.42 dBc/Hz at 5 GHz and -120.99 dBc/Hz at 4.61 GHz. The power consumption of the VCO core is only 3 mW. To the authors' knowledge, this differential Colpitts CMOS VCO achieves the best figure of merit (FOM) of 189.6 dB at 5-GHz band.     

一种三阶环形压控振荡器的分析设计

This paper describes a large tuning range low phase noise voltage-controlled ring oscillator(ring VCO)based on a different cascade voltage logic delay cell with current-source load to change the current of output node.The method for optimization is presented.Furthermore,the analysis of performance of the proposed ring VCO is confirmed by the measurement results.The three-stage proposed ring VCO was fabricated in the 180-nm CMOS process of SMIC.The measurement results show that the oscillator frequency of the ring VCO is from 0.770 to5.286 GHz and the phase noise is 97.93 dBc/Hz at an offset of 1 MHz from 5.268 GHz with a total power of15.1 mW from a 1.8 V supply while occupying only 0.00175 mm2of the core die area.     

9.3-10.4-GHz-band cross-coupled complementary oscillator with low phase-noise performance

A fully integrated 10-GHz-band voltage-controlled oscillator (VCO) has been designed and fabricated using commercial 0.18-/spl mu/m CMOS technology. The complementary cross-coupled differential topology is adopted in the design. The measured phase-noise is around -89 dBc/Hz at the offset frequency of 100 kHz from the center frequency of 9.83 GHz, the output frequency tuning range of the fabricated VCO is 1.1 GHz ranging from 9.3 to 10.4 GHz, and the power consumption of the core VCO circuit is 5.8 mW. The design is the first one that adopts the complementary cross-coupled circuit structure for 10-GHz-band oscillators, and whose performances of the VCO are the best ones for 10-GHz-band oscillators, compared with the 10-GHz-band CMOS oscillators reported earlier.     

192 GHz push-push VCO in 0.13 /spl mu/m CMOS

A 192 GHz cross-coupled push-push voltage controlled oscillator (VCO) is fabricated using the UMC 0.13 /spl mu/m CMOS logic process. The VCO can be tuned from 191.4 to 192.7 GHz. The VCO provides output power of /spl sim/-20 dBm and phase noise of /spl sim/-100 dBc/Hz at 10 MHz offset, while consuming 11 mA from a 1.5 V supply.     

A 48 GHz 196 dB-FOM LC VCO With Double Cap-Degeneration Negative-Resistance Cell

This letter presents a 48-GHz capacitively emitter-degenerated LC voltage controlled oscillator (VCO) with double cross-coupled pair showing higher and lower input capacitance than typical cross-coupled pairs. The phase noise of the proposed LC VCO is measured as 114.5 dBc/Hz at 1 MHz offset from 48 GHz carrier, and a current of 6 mA is drawn in the VCO circuit. The proposed VCO shows an excellent figure of merit of 196 dB.     

A novel complementary Colpitts differential CMOS VCO with low phase noise performance

A low phase noise Ka-band CMOS voltage-controlled oscillator is proposed in this paper. A new complementary Colpitts structure was adopted in a 0.18-μm CMOS process to achieve differential-ended outputs, low phase-noise performance, and low-power consumption. The designed VCO oscillates from 29.8 to 30 GHz with 200 MHz tuning range. The measured phase noise at 1-MHz offset is −109 dBc/Hz at 30 GHz and −105.5 dBc/Hz at 29.8 GHz. The power consumption of VCO is only 27 mW. In addition, compared with the published papers, the proposed CMOS VCO achieves the best figure of merit (FOM) of −185 dB at 29.95-GHz band.     

A 1.0 V differential VCO in 0.13 μm CMOS technology

A differential complementary LC voltage controlled oscillator(VCO) with high Q on-chip inductor is presented.The parallel resonator of the VCO consists of inversion-mode MOS(I-MOS) capacitors and an on-chip inductor.The resonator Q factor is mainly limited by the on-chip inductor.It is optimized by designing a single turn inductor that has a simulated Q factor of about 35 at 6 GHz.The proposed VCO is implemented in the SMIC 0.13μm 1P8M MMRF CMOS process,and the chip area is 1.0×0.8 mm~2.The free-running frequency is from 5.73 to 6.35 GHz.When oscillating at 6.35 GHz,the current consumption is 2.55 mA from a supply voltage of 1.0 V and the measured phase noise at 1 MHz offset is -120.14 dBc/Hz.The figure of merit of the proposed VCO is -192.13 dBc/Hz.     

Low power 10 GHz ring VCO using source capacitively coupled current amplifier in 0.12 /spl mu/m CMOS technology

A 10 GHz ring voltage controlled oscillator (VCO) has been designed and implemented in 0.12 /spl mu/m CMOS technology. A source capacitively coupled current amplifier (SC3A) is adopted to realise this VCO. It can operate from 8.4 GHz up to 10.6 GHz with a phase noise of about -85 dBc/Hz at 1 MHz frequency offset. With the 1.5 V supply voltage, the current consumption is about 35 mA.     

具有自校准压控振荡器和精确自动频率校准算法的低噪声频率合成器

A low noise phase locked loop （PLL） frequency synthesizer implemented in 65 nm CMOS technology is introduced. A VCO noise reduction method suited for short channel design is proposed to minimize PLL output phase noise. A self-calibrated voltage controlled oscillator is proposed in cooperation with the automatic frequency calibration circuit, whose accurate binary search algorithm helps reduce the VCO tuning curve coverage, which reduces the VCO noise contribution at PLL output phase noise. A low noise, charge pump is also introduced to extend the tuning voltage range of the proposed VCO, which further reduces its phase noise contribution. The frequency synthesizer generates 9.75-11.5 GHz high frequency wide band local oscillator （LO） carriers. Tested 11.5 GHz LO bears a phase noise of-104 dBc/Hz at 1 MHz frequency offset. The total power dissipation of the proposed frequency synthesizer is 48 mW. The area of the proposed frequency synthesizer is 0.3 mm^2, including bias circuits and buffers.     

A 1.8-GHz CMOS fractional-N frequency synthesizer with randomized multiphase VCO

A 1.8 GHz fractional-N frequency synthesizer implemented in 0.6 /spl mu/m CMOS with an on-chip multiphase voltage-controlled oscillator (VCO) exhibits no spurs resulting from phase interpolation. The proposed architecture randomly selects output phases of a multiphase VCO for fractional frequency division to eliminate spurious tones. Measured phase noise at 1.715 GHz is lower than -80 dBc/Hz within a 20 kHz loop bandwidth and -118 dBc/Hz at 1 MHz offset with no fractional spurs above -70 dBc/Hz. The synthesizer has a frequency resolution step smaller than 10 Hz. The chip consumes 52 mW at 3.3 V and occupies 3.7 mm/spl times/2.9 mm.     

A 0.6 V, 4.32 mW, 68 GHz Low Phase-Noise VCO With Intrinsic-Tuned Technique in 0.13 $mu$m CMOS

An intrinsic-tuned, 68 GHz voltage controlled oscillator (VCO) without an extra on-chip accumulation-mode metal oxide semiconductor (MOS)-varactor is demonstrated in a standard, 0.13 mum CMOS technology. This VCO exhibits phase noises of -98.4 dBc/Hz and -115.2 dBc/Hz at 1 and 10 MHz offset, respectively, along with a tuning range of 4.5 % even under a small power consumption of 4.32 mW. Besides, the highest figure-of-merit (taking frequency tuning range into account) of -182 dBc/Hz under the 1 MHz offset condition is achieved among all previously reported >60 GHz CMOS-based VCOs, which is attributed to the proposed intrinsic tuning mechanism.     

Dual-band ultra-wide tuning range CMOS voltage-controlled oscillator

A dual-band wide-tuning range LC CMOS voltage controlled oscillator (VCO) topology is proposed. Dual-band operation is realised by employing a double-tuned double-driven transformer as a resonator. The proposed approach eliminates MOS switches, which are typically used in multi-standard oscillators, and thus improves phase noise and tuning range characteristics. The concept is demonstrated through the design of an LC VCO in a standard 0.18 mum CMOS process. Two frequency bands are realised (2.4 and 6 GHz) with 740 MHz tuning range in the first band and 1.56 GHz tuning range in the second band. Operating from a 1.8 V supply, the VCO has a simulated phase noise of -119 dBc/Hz in the 2.4 GHz band and -110 dBc/Hz in the 6 GHz band at 600 KHz offset from the carrier     

An 8 GHz silicon bipolar clock-recovery and data-regenerator IC

A silicon bipolar IC for data regeneration and clock recovery which includes a phase/frequency detector (PFD), a quadrature voltage controlled oscillator (VCO), and an MS D-flipflop (DFF) is presented. The VCO is based on a modified two stage ring oscillator approach and presents a wide tuning range of 2-to-9 GHz. Data regeneration at 8 Gb/s (with the onchip VCO) and PFD operation up to 15 Gb/s (with an external VCO) are demonstrated. The IC for clock and data regeneration was fabricated with a 25 GHz f_T 0.4 μm emitter width bipolar process. The power dissipation is 2.25 W     

Novel 53/106 GHz Dual-Band MMW LC Oscillator Implemented in SiGe BiCMOS Technology

In this Paper, we present a fully integrated millimeter wave LC voltage-controlled oscillator (VCO), which employs a novel topology, operating at dual-band frequency of 53.22 GHz-band and 106.44 GHz-band. The low-phase noise performance of ?107.3 dBc/Hz and ?106.1 dBc/Hz at the offset frequency of 600 kHz, ?111.8 dBc/Hz and ?110.6 dBc/Hz at the offset frequency of 1 MHz around 53.22 GHz and 106.44 GHz are achieved using IBM BiCMOS-6HP technology, respectively. Two tuning ranges, of 52.7 - 53.8 GHz and 105.4 - 107.6 GHz for the proposed LC VCO are obtained. The output voltage swing of this VCO is around 1.8 V_p-p at the operation frequency of 53.22 GHz and 0.45 V_p-p at 106.44 GHz; the total power consumption is about 16.5 mW. To our knowledge, this is the first oscillator which operates at dual-band frequency above 50 GHz with the best preformance.     

A 1.8-V 2.4/5.15-GHz dual-band LCVCO in 0.18-/spl mu/m CMOS technology

A dual band, fully integrated, low phase-noise and low-power LC voltage-controlled oscillator (VCO) operating at the 2.4-GHz industrial scientific and medical band and 5.15-GHz unlicensed national information infrastructure band has been demonstrated in an 0.18-/spl mu/m CMOS process. At 1.8-V power supply voltage, the power dissipation is only 5.4mW for a 2.4-GHz band and 8mW for a 5.15-GHz band. The proposed VCO features phase-noise of -135dBc/Hz at 3-MHz offset frequency away from the carrier frequency of 2.74GHz and -126dBc/Hz at 3-MHz offset frequency away from 5.49GHz. The oscillator is tuned from 2.2 to 2.85GHz in the low band (2.4-GHz band) and from 4.4 to 5.7GHz in the high band (5.15-GHz band).