大容量串行Flash MM36SB010系列特点及应用

串行Flash存储器因体积小、密度高、功耗低和易操作而倍受青睐.本文简单介绍Megawin公司生产的Flash存储器,讲述其特点、结构、指令集,并以MM36SB010为例给出它的读写程序.     

大容量串行Flash MM36SB010系列特点及应用

串行Flash存储器因体积小，密度高，功耗低和易操作而倍受青睐。本文简单介绍Megawin公司生产的Flash存储器，讲述其特点，结构，指令集，并以MM36SB010为例给出它的读写程序。     

MEGAWIN推出的串行e-Flash系列大容量存储器

MM36SB512、MM36SB010、MM36SB020是MEGAWIN公司最近推出的大容量、低功耗、用于嵌入式系统的e-Flash存储器。存储空间分别由512、1024、2048个页面组成,每个页面为128字节,存储容量分别为512Kbits、1Mbits、2Mbits。此系列都自带128字节SRAM数据缓冲区,向存储器传送数据先将数据送进缓冲区再从缓冲区送入存储器。三器件都可在2.4V～3.6V和4.5V～5.5V两种电压下工作,串行接口结构,2/3线输入输出方式,MM36SB512的工作时钟最高可达4MHz,MM36SB010、MM36SB020的工作时钟最高可达8MHz,后两器件有OSC输入端,可根据需要调节频率大小。     

大容量串行e-Flash的FPGA配置方案

为配合某电力测量仪表的开发,对 Xilinx 公司的 SpartanII 系列 FPGA 的配置方案进行了探索。该方案采用大容量串行 e-　Flash 存储器 MM36SB010 存放 FPGA 配置文件,MCU 读取该配置文件并在被动串行模式下完成对 X C 2 S 3 0 的在线配置。该方案具有接口简单、成本低廉、便于移植的优点。     

单片机系统在系统编程技术的实现

讨论了运用ISP技术并结合Flash存储器AT29C020的特点实现基于P87C591的单片机系统的可在系统编程功能的方法及相关技术,介绍了向单片机传送目标文件的上位机(PC)需完成的串行通信、读取目标文件、传输校验等任务的实现方法.     

基于AVR单片机的SPI接口的实现

介绍了ATmega16单片机的SPI串行通讯原理,并设计了串行Flash存储器AT45DB021B与ATmega16单片机的硬件接口电路,这种方式对于简化电路设计和扩展系统存储容量具有重要意义。     

用C8051F020的SPI接口扩展大容量数据存储器

本文介绍了一种利用串行外设接口(SPI)为SOC单片机C8051F020扩展大容量数据存储器的设计方案,并给出来软件流程图和示例。该方案充分利用了SPI的功能,在极少地占用单片机引脚的情况下,实现了数据存储器的扩展。     

PIC单片机在线调试中的一些问题

1 在线串行编程 1．1在线串行编程接口 带有Flash闪速存储器的PIC单片机产品一般都具有在线串行编程功能，只需要5根引线就可以把程序下载到单片机的Flash程序存储器中。这5根线的排列顺序是MCLR／Vpp、Vdd、Vss、PD（或PGD）和PC（或PGC），图1是PIC单片机在线串行编程接口图。     

超大容量存储器K9F2G08U0M及其在管道通径仪中的应用

新型超大容量Flash存储器K9F2G08U0M的基本组织结构,给出了存储器与C8051F020单片机外部存储器接口(EMIF)的硬件连接方式以及存储器的主要操作流程和部分C语言代码。     

多功能汽车行驶状态记录仪的设计

介绍了一种多功能汽车行驶状态记录仪的主要功能及其硬软件设计,并针对其工作环境中电磁干扰强烈的实际情况,提出了具体的解决措施。该记录仪以单片机C8051F005为监控核心,采用串行时钟MAX6902作为实时时钟,大容量串行Flash存储器AT45DB081B作为存储介质,可对汽车行驶状态进行实时监测和记录;记录数据可通过RS232串行口上传到上位机,以进行日常管理和事故诊断。     

基于C8051F020的外部存储器扩展

针对Cygnal公司的C8051F020单片机内部数据存储器容量不足的问题,采用一种NAND闪速存储器K9F2808UOC为C8051F020单片机扩展大容量数据存储器的设计方案,从C8051F020单片机内部结构和K9F2808UOC的外部引脚功能出发,设计了C8051F020与K9F2808UOC的硬件接口电路和擦除、写、读程序的编写方法及流程图,实现了大容量的外部数据扩展。     

水下小型自容存储模块设计

以C8051F020单片机芯片为核心的小型自容存储模块,采用电池供电,外接内置串行数据接口的数据存储芯片.具有体积小,功耗低,存储容量大,操作简单等特点,能有效解决水声试验中环境参数的采集问题.     

A workload-aware flash translation layer enhancing performance and lifespan of TLC/SLC dual-mode flash memory in embedded systems

Similar to traditional NAND flash memory, triple-level cell (TLC) flash memory is used as secondary storage to meet the fast growing demands on storage capacity. TLC flash memory exhibits attractive features such as shock resistance, high density, low cost, non-volatility and low access latency natures. However, TLC flash memory also has some extra limitations, such as write disturbance, low performances and very limited cycles compared to single-level cell (SLC) flash memory.In this paper, we propose a workload-aware flash translation layer, named Balloon-FTL, for the TLC/SLC dual-mode flash memory, to improve performance and lifespan of the system. We first build a workload identifier module with genetic algorithm to dynamically allocate TLC/SLC capacity based on different workloads, and produce the suitable data allocation to achieve a balanced write distribution in flash memory with low memory access cost. The basic idea is to classify metadata/userdata according to their access pattern, and allocate low-latency SLC and high-density TLC mode blocks for write-intensive metadata and a large quantities userdata, respectively. We then propose a special hybrid mapping strategy for the TLC/SLC dual-mode flash memory to improve the performance. Experimental results show that Balloon-FTL can effectively improve the performance and lifespan of the TLC/SLC dual-mode flash memory in embedded systems.     

A hybrid flash translation layer design for SLC-MLC flash memory based multibank solid state disk

This paper presents the design of a NAND flash based solid state disk (SSD), which can support various storage access patterns commonly observed in a PC environment. It is based on a hybrid model of high-performance SLC (single-level cell) NAND and low cost MLC (multi-level cell) NAND flash memories. Typically, SLC NAND has a higher transfer rate and greater cell endurance than MLC NAND flash memory. MLC NAND, on the other hand, benefits from lower price and higher capacity. In order to achieve higher performance than traditional SSDs, an interleaving technique that places NAND flash chips in parallel is essential. However, using the traditional FTL (flash translation layer) on an SSD with only MLC NAND chips is inefficient because the size of a logical block becomes large as the mapping address unit grows. In this paper, we proposed a HFTL (hybrid flash translation layer) which makes use of chained-blocks, combining SLC NAND and MLC NAND flash memories in parallel. Experimental results show that for most of the traces studied, the HFTL in an SSD configuration composed of 80% MLC NAND and 20% SLC NAND memories can improve performance compared to other solid state disk configurations, composed of either SLC NAND or MLC NAND flash memory alone.     

Flash存储管理的研究与设计

针对目前存储管理对大容量NAND Flash考虑的不足,在对大容量NAND Flash物理特性深入研究的基础上,实现了连续写与非连续写技术,提高了存储管理的效率.首先研究并实现了特有的状态信息描述方法,完全符合大容量MLC类型NAND Flash的物理特性,研究并实现了区域映射技术,适用于任何容量的闪存,并实现了连续写与非连续写技术,提高了写大文件的效率.实验结果表明,该方法在文件传输方面最大限度地挖掘了MLC类型NAND Flash的性能.     

Next high performance and low power flash memory package structure

In general, NAND flash memory has advantages in low power consumption, storage capacity, and fast erase/write performance in contrast to NOR flash. But, main drawback of the NAND flash memory is the slow access time for random read operations. Therefore, we proposed the new NAND flash memory package for overcoming this major drawback. We present a high performance and low power NAND flash memory system with a dual cache memory. The proposed NAND flash package consists of two parts, i.e., an NAND flash memory module, and a dual cache module. The new NAND flash memory system can achieve dramatically higher performance and lower power consumption compared with any conventionM NAND-type flash memory module. Our results show that the proposed system can reduce about 78% of write operations into the flash memory cell and about 70% of read operations from the flash memory cell by using only additional 3KB cache space. This value represents high potential to achieve low power consumption and high performance gain.     

嵌入式Flash文件系统的设计与实现

Flash存储器是一种在嵌入式系统中日益普及的存储介质,它提供了高密度且成本相对较低的固态存储。使用Flash存储器需要很多技巧来确保数据可靠性并延长Flash器件的使用寿命。根据Flash存储器的特点提出了一种文件系统模型,可以合理且有效地利用Flash存储器,同时提供日志特性以增强使用该文件系统的嵌入式系统的可靠性。     

Flash-Optimized B+-Tree

With the rapid increasing capacity of flash memory, flash-aware indexing techniques are highly desirable for flash devices. The unique features of flash memory, such as the erase-before-write constraint and the asymmetric read/write cost, severely deteriorate the performance of the traditional B+-tree algorithm. In this paper, we propose an optimized indexing method, called lazy-update B+-tree, to overcome the limitations of flash memory. The basic idea is to defer the committing of update requests to the B...     

Flash memory efficient LTL model checking

As the capacity and speed of flash memories in form of solid state disks grow, they are becoming a practical alternative for standard magnetic drives. Currently, most solid-state disks are based on NAND technology and much faster than magnetic disks in random reads, while in random writes they are generally not.So far, large-scale LTL model checking algorithms have been designed to employ external memory optimized for magnetic disks. We propose algorithms optimized for flash memory access. In contrast to approaches relying on the delayed detection of duplicate states, in this work, we design and exploit appropriate hash functions to re-invent immediate duplicate detection.For flash memory efficient on-the-fly LTL model checking, which aims at finding any counter-example to the specified LTL property, we study hash functions adapted to the two-level hierarchy of RAM and flash memory. For flash memory efficient off-line LTL model checking, which aims at generating a minimal counterexample and scans the entire state space at least once, we analyze the effect of outsourcing a memory-based perfect hash function from RAM to flash memory.Since the characteristics of flash memories are different to magnetic hard disks, the existing I/O complexity model is no longer sufficient. Therefore, we provide an extended model for the computation of the I/O complexity adapted to flash memories that has a better fit to the observed behavior of our algorithms.     

大容量闪存芯片与DSP接口设计

K9K2G08UOM是三星公司的大容量闪存芯片,它的单片容量高达256MB.文中介绍了K9K2G08U0M的特性和使用方法,重点说明了与TI的TMS320F2812的硬件接口和软件编程.