TFT-LCD表面缺陷检测方法综述

对TFT-LCD表面缺陷的检测方法做了综述.首先介绍了TFT-LCD表面缺陷的种类,分析了缺陷的特点和成因,然后介绍了缺陷检测方法:图像识别法和图像处理法.在图像识别法中,详细分析了缺陷图像降维、缺陷特征提取和分类器设计等关键技术.在图像处理法中,探讨了边界模糊缺陷分割法、差影法和滤波法.最后归纳总结了各种检测方法的优点和不足,并指出了TFT-LCD表面缺陷检测的未来研究方向.     

含负折射率材料的1维光子晶体掺杂缺陷模研究

为了研究含有负折射率材料的光子晶体掺杂缺陷模的光学传输特性,利用传输矩阵理论进行数值分析.采用插入和替代两种方式对排列整齐的光子晶体进行掺杂,产生了缺陷模式.结果表明,引入正折射率缺陷只能在布喇格带隙中产生缺陷模,引入负折射缺陷能够同时在全方位光子带隙和布喇格带隙中产生缺陷模.同时研究了掺杂方式、入射方向、缺陷厚度、缺陷位置、缺陷类型对缺陷模式的影响,并对含有两层缺陷的光子晶体进行研究,得到两缺陷层的距离与带隙产生的关系,即距离越近越容易产生缺陷模式,且缺陷模的深度越深.这对于制造新型的全方位滤波器是有指导作用的.     

复杂结构精密焊件中缺陷空间定位及可视化

探讨了复杂结构激光焊件X射线检测图像中定位特征点的选择,建立了缺陷深度与偏移量计算的数学模型,确定了缺陷在精密焊缝中的空间分布特征.提出了缺陷空间位置数据的自动提取算法,实现了复杂结构激光焊件中缺陷空间位置数据的快速提取,并对提取结果进行了实验验证.结果表明所提出的提取算法是可行的.建立了复杂激光焊件的三维模型,自动导入已提取的缺陷空间位置数据,实现了复杂结构激光焊件中批量缺陷的空间位置可视化.     

FIB与PEM联用在半导体器件失效分析中的应用

在半导体器件的失效分析中,缺陷定位是必不可少的重要环节.光发射显微镜(PEM)是IC失效定位中最有效的工具之一.PEM利用了IC器件缺陷在一定条件下的发光现象,迅速定位缺陷.而聚焦等离子束(FIB)的定点切割和沉积技术在亚微米级半导体工艺失效分析中扮演着越来越重要的作用.介绍了一种联合使用FIB和PEM进行亚微米级缺陷定位的新方法,使得一些单独使用PEM无法完成缺陷定位的案例得以成功解决.     

基于多元接收线圈的管道局部缺陷检测方法研究

在管道内部,基于远场涡流技术的局部缺陷定量检测中,当发射线圈处于管道缺陷位置时,接收线圈检测的远场涡流信号中叠加了发射线圈处缺陷造成的伪峰信号,影响了接收线圈处管道缺陷定量分析的正确性.为了实现基于远场涡流检测中局部缺陷正确的定量分析,本文在远场区域设置与发射线圈同轴的多接收线圈以及周向传感器阵列.同轴接收线圈用来获取远场涡流检测信号中的伪峰信号,周向传感器阵列用来检测局部缺陷.该方法通过两个接收线圈获取具有差分特性的两个远场涡流检测信号,然后利用维纳去卷积滤波器实现伪峰信号的获取,同时滤除测试中的噪声;最后,在用于局部缺陷定量分析的涡流信号（由阵列传感器获取）中减去伪峰信号,达到检测管道局部缺陷的目的.该方法通过实验仪器得到验证,在管道局部缺陷的定量检测中具有很好的实用性.     

Al-Ni-Rh复杂合金相中特殊面缺陷的电子显微学研究

利用高分辨透射电子显微学方法,研究了复杂合金相ξ'-Al-Ni-Rh和ξ-Al-Ni-Rh相中一种特殊类型面缺陷.这种面缺陷的晶体学特点是,其结构特征不仅涉及描述通常晶体中面缺陷的平移矢量,而且还涉及原子团簇之间的位置交换.而后者通常出现在不具平移周期性的准晶中,称为相子缺陷.研究表明,这种特殊的面缺陷不仅呈现随机分布状态,也可周期性排列形成新的大晶胞调制结构.此外,本文还将报道与这种特殊面缺陷相关的晶界、畴界、孪晶、层错等面缺陷的研究.     

束源杂质引发的MBE HgCdTe表面缺陷

研究了利用GaAs作为衬底的HgCdTe MBE薄膜的表面缺陷,发现其中一类缺陷与Hg源中杂质有关.采用SEM对这类缺陷进行正面和横截面的观察,并采用EDX对其正面和横截面进行成分分析.并设计了两个实验:其一,在CdTe/GaAs衬底上,低温下用Hg源照射20min,再在其上继续高温生长CdTe;其二,在CdTe/GaAs衬底上,一直用Hg源照射下高温生长CdTe.两个实验后CdTe表面都出现与HgCdTe表面相比在形状和分布上类似的表面缺陷,采用光学显微镜和SEM对CdTe表面缺陷进行了观察,通过CdTe表面缺陷和HgCdTe表面缺陷的比较,我们证实了这类表面缺陷的成核起源于Hg源中杂质.     

真实缺陷的矩形模型及其关键面积计算

在集成电路(IC)中,为了进行有效的成品率估计和故障分析,与光刻有关的缺陷形状通常假设为圆模型.然而,真实缺陷的形状多种多样.本文提出一种真实缺陷的矩形模型及与之相关的关键面积计算模型,该模型既考虑了真实缺陷的形状又考虑了IC版图布线的特点.在缺陷引起故障概率预测方面,仿真结果表明新模型比圆模型更接近真实缺陷引起的故障概率.     

半绝缘InP中深能级缺陷对电学性质的影响和缺陷的控制

综合深能级缺陷和电学性质的测试结果,证明了半绝缘InP单晶材料的电学性能、热稳定性、均匀性等性能与材料中一些深能级缺陷的含量密切相关.通过分析深能级缺陷产生的规律与热处理及生长条件的关系,给出了抑制缺陷产生,提高材料质量的途径.对缺陷的属性与形成机理进行了分析讨论.     

半绝缘InP中深能级缺陷对电学性质的影响和缺陷的控制

综合深能级缺陷和电学性质的测试结果,证明了半绝缘InP单晶材料的电学性能、热稳定性、均匀性等性能与材料中一些深能级缺陷的含量密切相关.通过分析深能级缺陷产生的规律与热处理及生长条件的关系,给出了抑制缺陷产生,提高材料质量的途径.对缺陷的属性与形成机理进行了分析讨论.     

Efficient macromodeling of defect propagation/growth mechanisms inVLSI fabrication

Particulate contamination deposited on silicon wafers is typically the dominant reason for yield loss in VLSI manufacturing. The transformation of contaminating particles into defects and then electrical faults is a very complex process which depends on the defect location, size, material, and the underlying IC topography. An efficient defect macromodeling methodology based on the rigorous two-dimensional (2-D) topography simulator METROPOLE, has been developed to allow the prediction and correlation of the critical physical parameters (material, size, and location) of contamination in the manufacturing process to device defects. The results for a large number of defect samples simulated using the above approach were compared with the data gathered from the AMD-Sunnyvale fabline. A good match was obtained indicating the accuracy for our method of developing contamination to defect propagation/growth macromodels     

微腐蚀去除硅衬底表面损伤及污染物研究

硅片CMP工艺会引入表面缺陷和沾污,通常采用NaOH和KOH作为腐蚀溶液,利用微腐蚀法将硅片表面的损伤污染层剥离,以免导致IC制备过程中产生二次缺陷,但会不可避免地引入金属离子。制备了一种用螯合剂和表面活性剂复配的新型清洗液,利用螯合剂对硅片表面损伤层进行微腐蚀,同时采用表面活性剂去除硅片表面吸附的微粒。经台阶仪和原子力显微镜检测,该清洗液能有效去除硅片表面损伤层和颗粒,同时螯合剂本身不含金属离子,并且对金属离子有螯合作用,可有效避免传统腐蚀液中金属离子带来的二次污染。     

Monitoring defects in IC fabrication using a Hotelling T/sup 2/ control chart

Monitoring the wafer defects in integrated circuit (IC) fabrication is essential for enhancing wafer yield. However, significant defect clustering occurs when the wafer is large, so the conventional defect control chart, based on the Poisson distribution, is inappropriate. Defect clustering must also be analyzed to monitor effectively defects in IC fabrication process control. This study developed a novel procedure using the multivariate Hotelling T/sup 2/ control chart, based on the number of defects and the defect clustering index (CI) to monitor simultaneously the number of defects and the defect clusters. The CI does not require any statistical assumptions concerning the distribution of defects and can accurately evaluate the clustering phenomena. A case study of a Taiwanese IC manufacturer demonstrates the effectiveness of the proposed procedure.     

Defect Detection of IC Wafer Based on Spectral Subtraction

In this paper, spectral subtraction is successfully applied to image processing and to detect defects in the integrated circuit (IC) image. By utilizing the characteristics of many of the same chips in a wafer, three images with defects located in the same position and different chips are obtained. The defect images contain the spectrum of standard image without any defects. Spectral subtraction presented in the paper can extract the standard image from the three defect images. The algorithm complexity of spectral subtraction detecting defects is close to that of Fourier transform. After obtaining the standard image, the speed and accuracy of defects detection can be greatly enhanced using the detection method presented in the paper. Using the image gray-scale matching technology, impact of illumination on IC defect detection is solved. Experiments demonstrate that spectral subtraction is fast and accurate to defect detection in an IC image, and the method has high robustness for illumination.      

Defect detection of IC wafer based on two-dimension wavelet transform

Defect detection of integrated circuit (IC) wafer based on two-dimension wavelet transform (2-D DWT) is presented in this paper. By utilizing the characteristics many of the same chips in a wafer, three images with defects located in the same position and different chips are obtained. The defect images contain the standard image without any defects. 2-D DWT presented in the paper can extract the standard image from the three defect images. The algorithm complexity of the method is close to that of 2-D DWT. After obtaining the standard image, the speed and accuracy of defects detection can be greatly enhanced using the detection method presented in the paper. Using the image gray-scale matching technology, impact of illumination on IC defect detection is solved. Experiments demonstrate that 2-D DWT is fast and accurate to defects detection in an IC image, and the method has high robustness for illumination.     

用于先进 CMOS电路的 150 mm硅外延片外延生长

随着大规模和超大规模集成电路特征尺寸向亚微米、深亚微米发展,下一代集成电路对硅片的表面晶体完整性和电学性能提出了更高的要求.与含有高密度晶体原生缺陷的硅抛光片相比,硅外延片一般能满足这些要求.该文报道了应用于先进集成电路的150mmP/P+CMOS硅外延片研究进展.在PE2061硅外延炉上进行了P/P+硅外延生长.外延片特征参数,如外延层厚度、电阻率均匀性,过渡区宽度及少子产生寿命进行了详细表征.研究表明:150mmP/P+CMOS硅外延片能够满足先进集成电路对材料更高要求,     

Some considerations in the formulation of IC yield statistics

Some published modifications of the Poisson distribution for describing IC yield are critiqued. It is shown that it is incorrect to obtain an average yield for a non-uniform defect population by integrating, either in the geometrical space or in the density space, the Poisson distribution with some assumed density distribution functions. The correct way, and happily also the simplest way, is to average the yields of regionally partitioned subpopulations in a discrete manner. The simple Poisson distribution would become rigorously correct when the size of an imaginary IC increases to one quarter of a wafer, regardless of the non-uniformity in defect density. It is also shown that both cases of clustering of defects, one due to interaction among defects themselves, and the other due to wafer regional preference, result in increased yield for a given defect density in a wafer. On the other hand when there are interactions between defects and IC active area elements, or when defects themselves have physical dimensions, there would be a decreased yield for a given defect density, and a non-zero intercept in the plot of the logarithm of yield vs the active device area.     

注氢硅片中片状缺陷的结构特征及其深度分布的高分辨电镜研究

离子注入氢是改善硅材料性能,特别是实现硅片薄层剥离的重要途径。本文利用高分辨率电镜对注氢硅片的横截面样品进行了研究,观察了片状缺陷的结构特征,分析了片状缺陷尺寸和间距在纵深方向的变化。实验发现,沿着平行于正表面的(111)片状缺陷是注氢硅中的重要缺陷。片状缺陷的实质是四层晶面的应变,造成晶格膨胀约O．084nm。实验还发现片状缺陷的尺寸和间距随深度变化,在损伤带顶部和中间小,而在损伤带底部附近明显增大。     

圆片清洗过程中静电控制

随着半导体技术的不断发展,对集成电路封装过程中的静电控制要求也越来越高。传统清洗机清洗圆片时,通常会产生大量的静电电压,可能引起芯片失效、损伤造成漏电流增大从而导致电路的损坏。如何降低清洗机清洗圆片时产生的静电电压,对减少封装过程中因ESD引起的芯片失效有着比较重要的意义。为此我们利用高压喷雾旋转清洗机针对圆片清洗这个步骤进行了一系列的试验。文中涉及控制清洗液的电阻率,并尝试改变清洗过程中的相关清洗条件,最终达到封装过程中要求的±200V的静电控制要求。     

Mound defect modeling in yield forecasts

Although the majority of defects found in manufacturing lines have predominantly two-dimensional effects, there are many situations in which 2-D defect models do not suffice, e.g., tall layer bulks, residual resist flakes, and extraneous materials embedded in the IC. In this paper a more general model based on mound defects is presented. Both catastrophic and soft effects of mound defects are investigated. The defect model is based on the geometrical properties that result from the interaction between IC and defect size in two coordinate spaces: x-y and z. The approach to model catastrophic effects is a natural extension to the concept of critical areas, namely, the extraction of critical volumes. The simplicity of the extraction method makes it suitable for inclusion in common layout editing tools. Through the course of this work hints to the origins of mound defects will be given, conditions to capture critical volumes will be developed, realistic layout results will be shown, and a yield model taking into account these new kind of defects will be presented