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设计了一个应用于软件无线电接收机中的宽带无源下变频混频器,采用SMIC 0.13μm RF工艺实现,芯片面积0.42 mm<'2>.测试结果表明:在1.2 V电源电压下消耗了9 mA电流,工作频段0.9~2.2 GHz,电压转换增益17 dB,HP3 6~7 dBm,IIP2 40~42 dBm,DSB NF 17.5... 相似文献
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应用于软件无线电的四阶可重构模拟基带滤波器 总被引:2,自引:2,他引:0
本文提出了一个应用于软件无线电的四阶可重构模拟基带滤波器。该滤波器采用有数字辅助的有源RC低通结构,可以灵活地改变滤波器的特性,比如截止频率,选择性,类型,噪声,增益和功耗。为了同时达到优化噪声和调节功耗的目的,这里采用了一种新的可配置运放结构。该芯片采用SMIC 0.13μm CMOS工艺制作。主体滤波器和频率校准电路的面积分别为1.8 × 0.8 mm2和0.48 × 0.25 mm2。测试结果表明,该滤波器可以提供巴特沃斯和切比雪夫两种响应,而且截止频率可以覆盖从280kHz 到15MHz的宽带范围,同时可调增益范围为0dB到18dB。在1.2V的电源电压下获得29dBm的IIP3。根据给定的协议,输入参考噪声密度在41 nV/Hz½ 到133 nV/Hz½之间变化,低频带和高频带模式分别消耗了5.46mW和8.74mW的功耗。 相似文献
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This paper describes the analysis and design of a 0.13μm CMOS tunable receiver front-end that supports 8 TDD LTE bands,covering the 1.8-2.7 GHz frequency band and supporting the 5/10/15/20 MHz bandwidth and QPSK/16QAM/64QAM modulation schemes.The novel zero-IF receiver core consists of a tunable narrowband variable gain low-noise amplifier(LNA),a current commutating passive down-conversion mixer with a 2nd order low pass trans-impedance amplifier,an LO divider,a rough gain step variable gain pre-amplifier,a tunable 4th order Chebyshev channel select active-RC low pass filter with cutoff frequency calibration circuit and a fine gain step variable gain amplifier.The LNA can be tuned by reconfiguring the output parallel LC tank to the responding frequency band,eliminating the fixed center frequency multiple LNA array for a multi-mode receiver. The large various gain range and bandwidth of the analog baseband can also be tuned by digital configuration to satisfy the specification requirement of various bandwidth and modulation schemes.The test chip is implemented in an SMIC 0.13μm 1P8M CMOS process.The full receiver achieves 4.6 dB NF,-14.5 dBm out of band IIP3, 30-94 dB gain range and consumes 54 mA with a 1.2 V power supply. 相似文献
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A wideband CMOS variable gain low noise amplifier(VGLNA) based on a single-to-differential(S2D) stage and resistive attenuator is presented for TV tuner applications.Detailed analysis of input matching,noise figure(NF) and linearity for S2D is given.A highly linear passive resistive attenuator is proposed to provide 6 dB attenuation and input matching for each gain stage.The chip was fabricated by a 0.18μm 1P6M CMOS process, and the measurements show that the VGLNA covers a gain range over 36.4 dB and achieves a maximum gain of 21.3 dB,a minimum NF of 3.0 dB,an IIP3 of 0.9 dBm and an IIP2 of 26.3 dBm at high gain mode with a power consumption less than 10 mA from a 1.8 V supply. 相似文献
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设计实现了一种采用开关跨导型结构的低噪声高线性度上变频混频器,详细分析了电路的噪声特性和线性度等性能参数,本振频率为900 MHz。芯片采用0.18μm Mixed signal CMOS工艺实现。测试结果表明,混频器的转换增益约为8 dB,单边带噪声系数约为11 dB,输入参考三阶交调点(IIP3)约为10.5 dBm。芯片工作在1.8 V电源电压下,消耗的电流为10 mA,芯片总面积为0.63 mm×0.78 mm。 相似文献
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提出一种新的低成本射频识别标签模拟前端,同时兼容ISO 14443A和ISO 14443B协议.相比于传统模拟前端,本设计采用面积更小的单线圈天线代替传统大面积多圈天线,使得标签的封装成本大幅度降低.考虑到单线圈天线的性能降低,设计了一个新的具有高效率低启动电压的电荷泵整流电路.整体电路采用SMIC 0.18μm EEPROM工艺实现,测试结果显示电荷泵驱动120kΩ等效负载时,整流效率达到36%,输入交流幅度仅0.5V时,输出电压达到电路工作电压1V.标签的阅读距离可以达到22cm. 相似文献
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