GaAs metal insulator field effect transistors with excellentintrinsic transconductance and stable drain currents using (NH4)2Sx chemical treatment

Metal insulator semiconductor field effect transistors (MISFETs) and MIS capacitors are fabricated using Al metal-gate and PECVD silicon nitride (Si₃N₄) gate-insulator on commercial GaAs epitaxial wafers after treating the channel regions with (NH₄)₂S_x. It is shown that the post metallization annealing (PMA) of these devices improves the transconductance and reduces the interface state density (D_it) considerably. This is attributed to the additional passivation effect of hydrogen diffusing to the interface from the Si ₃N₄ during the PMA. An intrinsic transconductance of 30.7 mS/mm which is 75% of the theoretical maximum limit of 40.5 mS/mm has been achieved using silicon nitride gate insulator thickness of 1100 Å. Stability of the drain currents in these devices is demonstrated to be excellent     

Low thermal-budget ultrathin NH3-annealedatomic-layer-deposited Si-nitride/SiO2 stack gate dielectricswith excellent reliability

We present novel ultrathin (EOT = 2.1 nm) atomic-layer-deposited (ALD) Si-nitride/SiO₂ stack gate dielectrics annealed in NH ₃ at a moderate temperature of 550°C. MOS capacitors are fabricated using the proposed dielectrics. Excellent performance in electrical stressing experiments is shown by the dielectrics. They also exhibit better interface quality, low bulk-trap density, low trap generation rate, and high long-term reliability in comparison with ALD Si-nitride/SiO₂ stack dielectrics without NH₃-annealing and conventional thermal SiO₂ dielectrics. The proposed stack-gate dielectrics appear to be very promising for ULSI devices     

High efficiency polycrystalline silicon solar cells using lowtemperature PECVD process

Conventionally directionally solidified (DS) and silicon film (SF) polycrystalline silicon solar cells are fabricated using gettering and low temperature plasma enhanced chemical vapor deposition (PECVD) passivation. Thin layer (~10 nm) of PECVD SiO₂ is used to passivate the emitter of the solar cell, while direct hydrogen rf plasma and PECVD silicon nitride (Si₃N₄) are implemented to provide emitter and bulk passivation. It is found in this work that hydrogen rf plasma can significantly improve the solar cell blue and long wavelength responses when it is performed through a thin layer of PECVD Si₃N₄. High efficiency DS and SF polycrystalline silicon solar cells have been achieved using a simple solar cell process with uniform emitter, Al/POCl₃ gettering, hydrogen rf plasma/PECVD Si₃N₄ and PECVD SiO₂ passivation. On the other hand, a comprehensive experimental study of the characteristics of the PECVD Si₃N₄ layer and its role in improving the efficiency of polycrystalline silicon solar cells is carried out in this paper. For the polycrystalline silicon used in this investigation, it is found that the PECVD Si₃N₄ layer doesn't provide a sufficient cap for the out diffusion of hydrogen at temperatures higher than 500°C. Low temperature (⩽400°C) annealing of the PECVD Si₃N ₄ provides efficient hydrogen bulk passivation, while higher temperature annealing relaxes the deposition induced stress and improves mainly the short wavelength (blue) response of the solar cells     

New applications of low temperature PECVD silicon nitride films for microelectronic device fabrication

Silicon nitride has been widely used in microelectronic device fabrication processes for encapsulation, surface passivation and isolation. In this paper we report new applications of plasma-enhanced chemical vapor deposition (PECVD) silicon nitride films that can be deposited at a temperature lower than the soft bake temperature of normal photoresists. Lift-off of the silicon nitride film was carried out using standard positive photoresist. GaAs MESFETs and InP MISFETs with self-aligned gates were successfully fabricated using this lift-off process of low temperature PECVD silicon nitride.     

Effects of Sulfur Passivation on Germanium MOS Capacitors With HfON Gate Dielectric

In this letter, we study the effects of sulfur (S) passivation, using aqueous ammonium sulfide ((NH₄)₂S), on germanium (Ge) MOS capacitors with sputtered HfON as gate dielectric and TaN as metal-gate electrode. Compared with control samples, the S passivation can effectively reduce both equivalent oxide thickness and interface-state density. X-ray-photoelectron-spectroscopy analysis shows that (NH₄)₂S treatment can reduce the Ge-O bonds on Ge surface. The thermal stability of the S passivation under different postmetal-annealing temperatures was also examined, and it was found that samples with (NH₄)₂S treatment exhibit stable Ge/high-fc interface upon 550-deg C postmetal-deposition annealing, whereas interface quality degrades for those samples without S passivation.     

Electrical Characteristics of Passivated Pseudomorphic HEMTs With $hbox{P}_{hbox{2}}hbox{S}_{hbox{5}}/(hbox{NH}_{hbox{4}})_{hbox{2}}hbox{S}_{hbox{X}}$ Pretreatment

This paper elucidates the dc, pulse I-V, microwave, flicker noise, and power properties of AlGaAs/InGaAs pseudomorphic high electron mobility transistors (pHEMTs) after various ex situ sulfur pretreatments. The pHEMTs were pretreated with NH₄OH, (NH₄)₂S_X, and P₂S₅/(NH₄)₂S_X solutions before SiO₂ passivation to reduce the GaAs native oxide-related surface states. Stable phosphorus oxides and sulfur bound to the Ga and As species can be efficiently obtained using P₂S₅/(NH₄)₂S_X pretreatment; therefore, the leakage current in pHEMT was reduced following this process. Atomic force microscopy measurements indicated that the phosphorus oxides formed by P₂S₅/(NH₄)₂S_X treatment also provided a better surface roughness than obtained following traditional (NH₄)2S_X-only pretreatment, reducing mobility degradation after sulfur pretreatment. Based on the dc and 1 mus pulse I-V measurement results, P₂S₅/(NH₄)₂S_X-treated pHEMT exhibited very similar I_ds trends, especially at high currents; however, NH₄OH, (NH₄)₂S_X treatments clearly reduced the current upon pulse measurement because of the presence of surface traps. Hence, this novel pretreatment method has great potential for highly linear microwave power transistor applications.     

Ga2O3(Gd2O3)/InGaAsenhancement-mode n-channel MOSFETs

We have demonstrated the first Ga₂O₃(Gd₂O₃) insulated gate n-channel enhancement-mode In_0.53Ga_0.47As MOSFET's on InP semi-insulating substrate. Ga₂O₃(Gd₂ O₃) was electron beam deposited from a high purity single crystal Ga₅Gd₃O₁₂ source. The source and drain regions of the device were selectively implanted with Si to produce low resistance ohmic contacts. A 0.75-μm gate length device exhibits an extrinsic transconductance of 190 mS/mm, which is an order of magnitude improvement over previously reported enhancement-mode InGaAs MISFETs. The current gain cutoff frequency, f_t, and the maximum frequency of oscillation, f_max, of 7 and 10 GHz were obtained, respectively, for a 0.75×100 μm² gate dimension device at a gate voltage of 3 V and drain voltage of 2 V     

Unpinned GaAs MOS capacitors and transistors

Metal-oxide-semiconductor (MOS) capacitors and field-effect transistors (MOSFETs) in the GaAs semiconductor system using an unpinned interface are described. The structures utilize plasma-enhanced chemical-vapor deposition (PECVD) for the silicon-dioxide insulator on GaAs that has been terminated with a few monolayers of silicon during growth by molecular beam epitaxy. Interface densities in the structures have been reduced to ~10¹² cm^-2·eV^-1 . High-frequency characteristics indicate strong inversion of both p-type and n-type GaAs. The excellent insulating quality of the oxide has allowed demonstration of quasi-static characteristics. MOSFETs operating in depletion mode with a transconductance of 60 mS/mm at 8.0-μm gate lengths have been fabricated     

Passivation of GaAs FET's with PECVD silicon nitride films ofdifferent stress states

The passivation of GaAs MESFETs with plasma-enhanced chemical-vapor-deposited (PECVD) silicon nitride films of both compressive and tensile stress is reported. Elastic stresses included in GaAs following nitride passivation can produce piezoelectric charge density, which results in a shift of MESFET characteristics. The shift of MESFET parameters due to passivation was found to be dependent on gate orientation. The experiments show that nitride of tensile stress is preferable for MESFETS with [011-bar] oriented gates. The shifts in V_TH,I_DSS, and G_M of the devices before and after nitride passivation are less than 5% if the nitride of appropriate stress states are used for passivation. The breakdown voltage of the MESFETs after nitride deposition was also studied. It is found that the process with higher hydrogen incorporation tends to reduce the surface oxide and increase the breakdown voltage after nitride deposition. In addition, the passivation of double-channel HEMTs is reported for the first time     

The effects of NH3 plasma passivation on polysiliconthin-film transistors

The NH₃ plasma passivation has been performed for the first time on the polycrystalline silicon (poly-Si) thin-film transistors (TFT's). It is found that the TFT's after the NH₃ plasma passivation achieve better device performances, including the off-current below 0.1 pA/μm and the on/off current ratio higher than 10⁸, and also better hot-carrier reliability as well as thermal stability than the H₂-plasma devices. These improvements were attributed to not only the hydrogen passivation of the grain-boundary dangling bonds, but also the nitrogen pile-up at SiO₂/poly-Si interface and the strong Si-N bond formation to terminate the dangling bonds at the grain boundaries of the polysilicon films     

Electrical Characterization of ZrO2/Si Interface Properties in MOSFETs With ZrO2 Gate Dielectrics

MOSFETs incorporating ZrO₂ gate dielectrics were fabricated. The I_DS-V_DS, I_DS-V_GS , and gated diode characteristics were analyzed to investigate the ZrO₂/Si interface properties. The interface trap density (D _it) was determined to be about 7.4times10¹² cm ^-2middoteV^-1 using subthreshold swing measurement. The surface-recombination velocity (s₀) and the minority carrier lifetime in the field-induced depletion region (tau _0,FIJ) measured from the gated diodes were about 3.5times10 ³ cm/s and 2.6times10^-6 s, respectively. The effective capture cross section of surface state (sigma_s) was determined to be about 5.8times10^-16 cm² using the gated diode technique and the subthreshold swing measurement. A comparison with conventional MOSFETs using SiO₂ gate oxides was also made     

In0.53Ga0.47As FET's with insulator-assisted Schottky gates

Schottky-gate FET's have been fabricated on n-type In0.53Ga0.47As using a thin interfacial silicon nitride layer between the metal and the epitaxial layer to reduce the gate leakage current. In0.53Ga0.47As was grown by molecular beam epitaxy on semi-insulating InP substrates and silicon nitride was grown by plasma-enhanced chemical vapor deposition. Devices with 1.2µm gate length and net donor doping in the mid 10¹⁶cm^-3range show dc transconductance of up to 130mS/mm. Both depletion and enhancement mode operation were observed. The effective saturation velocity of electrons in the channel is deduced to be 2.0 ± 0.5 × 10⁷cm/sec, a value 60 to 70% higher than that in GaAs MESFET's. The insulator-assisted gate technology has many advantages in fabrication flexibility and control compared with other approaches to realizing high-speed microwave and logic in FET's in In0.53Ga0.47As.     

Fabrication of 0.15-μm Γ-Shaped Gate In0.52Al0.48As/In0.6Ga0.4As Metamorphic HEMTs Using DUV Lithography and Tilt Dry-Etching Technique

An In_0.52Al_0.48As/In_0.6Ga_0.4 As metamorphic high-electron mobility transistor (MHEMT) with 0.15-mum Gamma-shaped gate using deep ultraviolet lithography and tilt dry-etching technique is demonstrated. The developed submicrometer gate technology is simple and of low cost as compared to the conventional E-beam lithography or other hybrid techniques. The gate length is controllable by adjusting the tilt angle during the dry-etching process. The fabricated 0.15-mum In_0.52Al_0.48As/In_0.6Ga_0.4As MHEMT using this novel technique shows a saturated drain-source current of 680 mA/mm and a transconductance of 728 mS/mm. The f_T and f_max of the MHEMT are 130 and 180 GHz, respectively. The developed technique is a promising low-cost alternative to the conventional submicrometer E-beam gate technology used for the fabrication for GaAs MHEMTs and monolithic microwave integrated circuits     

Low-temperature gate dielectrics formed by plasma anodisation ofsilicon nitride

Silicon nitrides, deposited on silicon by PECVD using an SiH₄ /NH₃ plasma at 300°C, were anodised in an oxygen plasma at 500°C. The resulting dielectric appears to have lower fixed charge, leakage current and interface trap density than the original PECVD nitride, and to have the potential of use as a gate dielectric for MIS devices in VLSI circuits     

Further Suppression of Surface-Recombination of an InGaP/GaAs HBT by Conformal Passivation

Conformal passivation on an InGaP/GaAs HBT with significant reduction in the base surface-recombination effect is demonstrated. Not only dc behaviors but also RF performances are remarkably improved compared with the conventional emitter-ledge structure. Based on the conformal passivation, i.e., the base surface is covered by the depleted InGaP ledge structure and sulfur ((NH₄)₂S_x ) treatment, lower base surface-recombination current density, lower specific contact resistance, lower sheet resistance, higher current gain, higher collector current, and higher maximum oscillation frequency are obtained     

Characteristics of strained In0.65Ga0.35As/In0.52Al0.48As HEMT withoptimized transport parameters

The DC and microwave performance of a strained In₀.₆₅Ga₀.₃₅As/In₀ .₅₂A1₀.₄₈As HEMT (high-electron-mobility transistors) is reported. Its design is based on theoretical and experimental studies including low- and high-field transport characterization of heterostructures with different strains. The intrinsic DC transconductance and cutoff frequence of 1.4-μm-long gate HEMTs are 574 mS/mm and 38.6 GHz, respectively. The increased indium (In) composition in the channel enhances the drift velocity from 1.35×10⁷ to 1.55×10⁷ cm/s at 300 K     

A novel and effective PECVD SiO2/SiN antireflectioncoating for Si solar cells

It is shown that sequential plasma-enhanced chemical vapor deposition (PECVD) of SiN and SiO₂ can produce a very effective double-layer antireflection (AR) coating. This AR coating is compared with the frequently used and highly efficient MgF₂/ZnS double layer coating. The SiO₂/SiN coating improves the short-circuit current (J_SC) by 47%, open-circuit voltage (V_OC) by 3.7%, and efficiency (Eff) by 55% for silicon cells with oxide surface passivation. The counterpart MgF₂/ZnS coating gives similar but slightly smaller improvement in V_OC and Eff. However, if silicon cells do not have the oxide passivation, the PECVD SiO₂/SiN gives much greater improvement in the cell parameters, 57% in J_SC, 8% in V_OC, and 66% in efficiency, compared to the MgF₂/ZnS coating which improves J_SC by 50%, V_OC by 2%, and cell efficiency by 54%. This significant additional improvement results from the PECVD deposition-induced surface/defect passivation. The internal quantum efficiency (IQE) measurements showed that the PECVD SiO₂/SiN coating a absorbs fair amount of photons in the short-wavelength range (<500 nm); however, the improved surface/defect passivation more than compensates for the loss in J_SC and gives higher improvement in the cell efficiency compared to the MgF₂/ZnS coating     

Low-pressure rapid thermal chemical vapor deposition of oxynitridegate dielectrics for n-channel and p-channel MOSFETs

The properties of oxynitride gate dielectrics formed using a low-pressure, rapid thermal chemical vapor deposition (RTCVD) process with SiH₄, NH₃, and N₂O as the reactive gases are presented. Material analyses show an increase of uniform nitrogen and interfacial hydrogen content with increasing NH₃/N₂O flow rate ratio. MOS capacitors with both n-type and p-type substrates and both n-channel and p-channel MOSFETs were analyzed electrically. The results show increasing fixed oxide charge and interface state density with increasing nitrogen and hydrogen content in the film. A decrease in peak transconductance and improved high-field transconductance was observed for n-channel MOSFETs. Improved resistance to hot-carrier interface state generation was also observed with increasing nitrogen concentration in the films. The results suggest that an optimal nitrogen concentration of approximately 3 at.% can be considered for further development of this technology     

The observation of negative transconductance effect caused byreal-space-transfer of electrons in metal oxide semiconductor fieldeffect transistors fabricated with Ta2O5 gatedielectric

N-channel metal oxide semiconductor field effect transistors (MOSFETs) with Ta₂O₅ gate dielectric were fabricated. An intrinsic Ta₂O₅/silicon barrier height of 0.51 eV was extracted from the gate current. The effective Ta ₂O₅/silicon barrier height including image force barrier lowering is about 0.37 eV with drain to source voltage V_DS ranging from 1.5 V to 4.0 V. Due to the low barrier height, negative transconductance effect was observed in the linear region. The decrease of drain current is due to the real space transfer of electrons from the drain terminal to the gate electrode     

Fluorine Passivation in Gate Stacks of Poly-Si/TaN/HfO2 (and HfSiON/HfO2)/Si Through Gate Ion Implantation

Fluorine passivation in poly-Si/TaN/HfO₂/p-Si and poly-Si/TaN/HfSiON/HfO₂/p-Si gate stacks with varying TaN thickness through gate ion implantation has been studied. It has been found that when TaN thickness was less than 15 nm, mobility and subthreshold swing improved significantly in HfO₂ nMOSFETs; while there was little performance improvement in HfSiON/HfO₂ nMOSFETs due to the blocking of F atoms by the HfSiON layer in gate dielectrics, as has been proved by the electron energy loss spectroscopy mapping