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基于0.5μmCMOS工艺设计了一种具有快速瞬态响应的高性能比较器电路。利用大带宽前级放大器与后级高增益放大器的有机结合,实现高精度比较的同时保证比较器具有快速的瞬态响应。此外,提出了一种有源箝位电路,通过对比较器中间结点电压的变化范围加以限制,从而进一步提升了比较器的瞬态响应速度。仿真验证结果表明,该比较器电路仅需10μA电流即可实现33ns以内的瞬态响应时间,增益高达110dB,分辨率在1.5μV左右。 相似文献
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本文研究了外接电阻和外接电压源在电磁脉冲对双极晶体管注入过程中的影响。研究表明:基极外接电阻Rb的增大使器件的烧毁时间略有减小;在注入电压幅度较低时,基极外接电压源Vbe的增大有助于器件的损伤,当注入电压幅度足够高时,器件发生PIN结构击穿,基极外接电压源Vbe对器件损伤的影响变小;发射极外接电阻Re的增大能够明显降低注入脉冲加在器件上的电压降,从而提高器件的耐受性。外接电路元件对双极晶体管损伤的影响,归根结底都是对构成器件发生电流模式二次击穿的条件的影响。 相似文献
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提出一种电磁脉冲辐射系统设计方案,此系统由Marx发生器、短路-锐化组合开关型脉冲形成线和带低频补偿的高功率超宽带横向电磁波(TEM)喇叭天线组成。Marx发生器产生的单极脉冲经过短路-锐化组合开关型脉冲形成线锐化成双极脉冲,然后馈入天线进行辐射。仿真结果表明,在充电电压为10 kV时,电磁脉冲源可产生脉冲宽度1.41 ns、峰值功率7.69 MW的双极脉冲,此双极脉冲频谱主要分布在0~1.6 GHz频率范围内;高功率超宽带TEM喇叭天线带宽为0.625~2.9 GHz(相对带宽为129%),功率容量可达10 MW,能有效地将电磁脉冲源产生的双极脉冲辐射出去。 相似文献
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分析了目前几种高性能连续时间CMOS电流比较器的优缺点,提出了一种新型CMOS电流比较器电路.它包含一组具有负反馈电阻的CMOS互补放大器、两组电阻负载放大器和两组CMOS反相器.由于CMOS互补放大器的负反馈电阻降低了它的输入、输出阻抗,从而使电压的变化幅度减小,所以该电流比较器具有较短的瞬态响应时间和较快的速度.电阻负载放大器的使用减小了电路的功耗.利用1.2μm CMOS工艺HSPICE模型参数对该电流比较器的性能进行了模拟,结果表明该电路的瞬态响应时间达到目前最快的CMOS电流比较器的水平,而功耗则低于这些比较器,具有最大的速度/功耗比.此外,该CMOS电流比较器结构简单,性能受工艺偏差的影响小,适合应用于高速/低功耗电流型集成电路中. 相似文献
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提出一种应用在降压型DC-DC变换器的自调节斜坡补偿电路。该电路通过动态判断系统占空比的变化,自动调节斜坡补偿量,同时用限流比较器代替误差电压箝位,从而消除了斜坡补偿对带载能力的影响。此电路基于0.18μm CMOS工艺,已应用于一款大电流DC-DC Buck型变换器,仿真和测试结果表明,系统具有良好的瞬态响应和较大的带载能力,当系统占空比在35%~85%变化时,该芯片的峰值电流变化量小于4.5%。 相似文献
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一种新型的高性能CMOS电流比较器电路 总被引:4,自引:0,他引:4
分析了目前几种高性能连续时间 CMOS电流比较器的优缺点 ,提出了一种新型 CMOS电流比较器电路 .它包含一组具有负反馈电阻的 CMOS互补放大器、两组电阻负载放大器和两组 CMOS反相器 .由于 CMOS互补放大器的负反馈电阻降低了它的输入、输出阻抗 ,从而使电压的变化幅度减小 ,所以该电流比较器具有较短的瞬态响应时间和较快的速度 .电阻负载放大器的使用减小了电路的功耗 .利用 1.2 μm CMOS工艺 HSPICE模型参数对该电流比较器的性能进行了模拟 ,结果表明该电路的瞬态响应时间达到目前最快的 CMOS电流比较器的水平 ,而功耗则低于这些比较器 ,具有最大的速 相似文献
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针对电磁脉冲防护器件的防护效果测试方法,国内外现有测试标准中均是通过传导注入(直接注入或耦合注入)标准试验波形的方式,对防护器件性能进行评估测试.文章对比介绍了现有的测试方法及注入的脉冲波形参数,并从防护器件的实际应用场景出发,提出了一种利用实验室EMP(强电磁脉冲)辐照试验系统评估防护器件的防护效果的新方法.通过高空核电磁脉冲(HEMP)试验模拟装置在实验室内获得要求的均匀场分布,使用射频天线模拟系统前端耦合路径,产生GJB 151 B-2013要求的瞬态脉冲电流,通过对比耦合路径中串入防护器件前后的电压值评估其防护性能.该方法注入的脉冲波形具有较高的逼真度,可为武器装备的电磁脉冲防护设计提供有效的参考,避免出现"过设计"或"欠设计".两型防护样机的测试验证表明:空间耦合注入法得到的测试结果一致性较好,具有可行性. 相似文献
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Marián Stofka 《电子设计技术》2011,18(8):63-63
脉冲发生器经常需要有精确滞后值的电压比较器,而这类比较器需要双极性电压基准。大多数电压基准IC均是以其低侧电源轨为基准。如果你的电路用正负两种电压,可以在一个IC基准的输出端接一个-1增益的转换器,就能获得负的基准电压。但如果你的模拟电路采用的是单一电源,就必须将共模电压转换到一个特殊电平上。图1中的电路可以用来完成这... 相似文献
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本文对异质结双极晶体管(HBT)电压比较器进行了理论分析,设计并制作了国内第一个AlGaAs/GaAs HBT电压比较器电路。首先,分析了HBT的基本工作原理;然后比较详细地分析了ECL电压比较器的工作原理并进行了设计。随后介绍了HBT的E-M模型,提取了模型参数,并对电路进行了模拟;最后全面介绍了AlGaAs/GaAs HBT电压比较器的制作过程。测试结果表明,HBT器件直流电流增益大于100,f_T为15.2GHz,f_(max)为14.8GHz;电路具有取样和锁存能力,并具有电压比较器的初步功能。 相似文献
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This paper presents the design of a low-power, low-voltage latched comparator, suitable for current-mode interpolation, using transconductors instead of current mirrors. Thanks to this approach, higher immunity to device mismatch and overall improved dynamic performance were achieved. The proposed comparator was integrated in a 0.8 μm bipolar complementary metal-oxide-semiconductor technology and implemented in a 200 Ms/s analog/digital converter with 8 bit resolution on a 1 V differential range at 3.3 V supply 相似文献
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《Microelectronics Journal》2002,33(5-6):479-486
A novel nonautonomous chaotic oscillator based on the passive structure of Chua's circuit is proposed. Unlike most of the available members of this class of chaotic oscillators, the proposed circuit is driven by a periodic bipolar pulse-train rather than by sinusoidal excitation. This results in equilibrium points which have fixed positions in space. The circuit employs self feedback via a single comparator, which is the only nonlinear device involved. The output of this comparator is a chaotic bipolar pulse-train. A mathematical model which captures the behavior of the circuit is derived and experimental results are presented. Also, a version of the circuit with a practical realization of the driving pulse generator is considered and a variant structure with an alternatively excited node is discussed. 相似文献
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Pehkonen J. Palojarvi P. Kostamovaara J. 《IEEE transactions on circuits and systems. I, Regular papers》2006,53(3):569-577
An integrated receiver channel for a pulsed time-of-flight laser range finder is presented. The receiver operates in a wide dynamic range without gain control. This is achieved by converting the received unipolar pulse to a bipolar waveform already after the optical detector before the signal is fed to amplifier blocks. Thus the nonlinearities of the amplifiers have the minimum effect on the timing point, which is located in the zero crossing of the bipolar pulse. A parallel resonant circuit is used to shape the pulse in the input of the channel, which consists of a cascade of limiting voltage amplifiers followed by a comparator. The measurements show that the receiver has a walk error of 74 ps in the dynamic range of 1:1280. This corresponds to 11 mm in distance. The minimum usable input signal is limited by the noise of the receiver and equals 1.9 /spl mu/A. 相似文献
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A novel CMOS synchronized photoreceiver is proposed for conversion of optical input pulses to digital output signals. The photoreceiver circuit consists of a photoDarlington used as a detector of input light followed by a current-mirror comparator used as a converter to electronic signals. A combination of two p-n-p vertical CMOS bipolar junction transistors controlled by an external clock is designed to achieve the first clocked photoDarlington structure. The generated photocurrent is amplified and digitized by the current-mirror comparator in a return to-zero format. The synchronized photoreceiver has been implemented in a standard digital 0.7 μm, 5 V n-well CMOS technology with an effective area of 100×60 μm2. It was measured to operate at 100 MHz with an external input light of 13.3 fJ/pulse (-18.8 dBm/beam) 相似文献
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《Solid-State Circuits, IEEE Journal of》1982,17(6):1088-1094
Describes a novel monolithic high-speed comparator which senses the polarity of the input current rather than voltage. The new approach greatly reduces overall system conversion time for a successive approximation 12-bit A/D converter. The circuit features a single input pin for polarity discrimination, dual complementary outputs, and fast response time of 72 ns to 0.5 LSB overdrive (500 nA). The sum of the total error due to the comparator is 0.2 LSB with respect to the input. The comparator is manufactured on a bipolar, ion-implanted base, 9 /spl mu/m epi, junction-isolated process. 相似文献
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Thin silicon oxide films were stressed with bipolar pulses in which the magnitudes of both the positive and negative pulses were independently varied, The time-to-breakdown, the charge-to-breakdown, and the number of traps generated inside of the oxides during the stresses were measured and compared with oxides that had been stressed with unipolar pulses or stressed with constant dc voltages. For the bipolar stresses it was found that the time-to-breakdown, the charge-to-breakdown, and the number of traps generated inside of the oxide all increased as the magnitude of the opposite polarity, nonstressing pulse was increased, until the opposite polarity pulse became large enough to become the stressing pulse. The time-to-breakdown reached a maximum when the magnitude of the stressing pulse was approximately 1 V larger than the magnitude of the nonstressing pulse. The model that was used to explain these increases involved generation of traps inside of the oxide and the lack of spatial correlation between the traps generated by injection from one interface with the traps generated by injection from the other interface 相似文献