Statistical Characterization and Performance Evaluation of $$\alpha -\eta -\mu$$ /Inverse Gamma and $$\alpha -\kappa -\mu$$ /Inverse Gamma Channels

Wireless Personal Communications - In this paper, two new shadowed fading distributions $$\alpha -\eta -\mu$$ /Inverse Gamma and $$\alpha -\kappa -\mu$$ /Inverse Gamma are proposed to model...     

Analysis of GSM-SM Over $$\kappa -\mu$$ κ - μ , $$\eta -\mu$$ η - μ and $$\alpha -\mu$$ α - μ Fading Channels

Wireless Personal Communications - Spatial multiplexing increases the throughput by sending multiple data bits parallelly while generalized spatial modulation (GSM) increases the spectral...     

All-digital gated ring oscillator $$\Delta \Sigma$$ modulators

This paper presents all-digital time-mode \(\Delta \Sigma\) modulators. The proposed modulators consist of a voltage-to-time integrator, a seven-stage gated ring oscillator functioning as a 3-bit quantizer, and seven digital differentiators. A detailed analysis of the nonlinear characteristics of the modulators is provided. Designed in IBM 130 nm 1.2 V CMOS technology with a 100 mV 100 kHz sinusoidal input and a 4.4 MHz frequency clock, the first-order modulator provides 47 dB SNR over 0–150 KHz bandwidth while consuming 1.1 mW while the second-order modulator provides 55 dB SNR over the same bandwidth while consuming consumes 1.45 mW.     

A comparison between high-pass and low-pass \Updelta\Upsigma modulators

In this paper, high-pass (HP) $\Updelta\Upsigma$ modulators are compared against the traditional low-pass (LP) $\Updelta\Upsigma$ modulators. The objective of this comparison is to point out the advantages and drawbacks of the two modulators thereby allowing choosing the most suited for a given application. The metrics of comparison are the noise floor, power consumption, area and the effect of the non-idealities of all the basic blocks (i.e., operational transconductance amplifier, quantizer, switches and clocks). The comparative analysis shows that HP modulators are more suited for narrow band applications because of their immunity against DC-offset and flicker noise. For medium and wide band applications, LP modulators are preferred because of their higher robustness against switch imperfections and clock jitter.     

Exploiting effects of imperfect-CSI and SIC,and intercell interference on the outage performance of NOMA over $$\kappa -\mu , \alpha -\kappa -\mu$$ shadowed faded channels

Wireless Networks - Non-orthogonal multiple access (NOMA) is very promising for the future wireless communication systems. The primary goal of this paper is to provide precise outage probability...     

Design and modeling of high-resolution multibit log-domain \Delta \Sigma modulators

Log-domain Delta-Sigma ( $\Delta \Sigma$ ) modulators are attractive for implementing analog-to-digital (A/D) converters (ADCs) targeting low-power low-voltage applications. Previously reported log-domain $\Delta \Sigma$ modulators were limited to 1-bit quantization and, hence, could not benefit from the advantages associated with multibit quantization (namely, reduced in-band quantization noise, and increased modulator stability). Unlike classical $\Delta \Sigma$ modulators, directly extending a log-domain $\Delta \Sigma$ modulator with a 1-bit quantizer to a log-domain $\Delta \Sigma$ modulator with a multibit quantizer is challenging, in terms of CMOS circuit implementation. Additionally, the realization of log-domain $\Delta \Sigma$ modulators targeting high-resolution applications necessitates minimization of distortion and noise in the log-domain loop-filter. This paper discusses the challenges of multibit quantization and digital-to-analog (D/A) conversion in the log-domain, and presents a novel multibit log-domain $\Delta \Sigma$ modulator, practical for CMOS implementation. SIMULINK models of log-domain $\Delta \Sigma$ modulator circuits are proposed, and the effects of various circuit non-idealities are investigated, including the effects of log-domain compression–expansion mismatch. Furthermore, this paper proposes novel low-distortion log-domain analog blocks suitable for high-resolution analog-to-digital (A/D) conversion applications. Circuit simulation results of a proposed third-order 3-bit class AB log-domain $\Delta \Sigma$ loop-filter demonstrate 10.4-bit signal-to-noise-and-distortion-ratio (SNDR) over a 10 kHz bandwidth with a $0.84\,V_{pp}$ differential signal input, while operating from a 0.8 V supply and consuming a total power of $35.5\,\upmu \hbox {W}.$      

Optimization Analysis of Cooperative Spectrum Sensing System over Generalized $$\kappa -\mu $$ κ - μ and $$\eta -\mu $$ η - μ Fading Channels

Wireless Personal Communications - This paper presents, optimization analysis of energy detection based cooperative spectrum sensing system (CSSS) with hard-decision combining. Several system...     

Experimental implementation of $$\Delta \Sigma $$AD modulator with dynamic analog components

This paper presents an experimental prototype of 2nd-order multi-bit \(\Delta \Sigma \)AD modulator with dynamic analog components for low power and high signal to noise and distortion (SNDR) application. The integrators in the modulator are realized by ring amplifier without static current. Multi-bit quantizer and analog adder in the feed-forward modulator is realized by a passive-adder embedded successive approximation register analog to digital converter which consists of capacitor array and a dynamic comparator. The dynamic comparator does not dissipate static power at all when a pre-amplifier is not used. Proposed modulator is fabricated in TSMC 90 nm CMOS technology. Measurement results of the modulator dynamic range is over 84 dB. Measured peak SNDR = 77.51 dB, SNR = 80.08 dB are achieved for the bandwidth of BW = 94 kHz while a sinusoid differential \(-1\) dBFS input is sampled at 12 MS/s. The total analog power consumption of the modulator is 0.37 mW while the supply voltage is 1.1 V.     

70-MHz IF 10-MHz bandwidth bandpass \Upsigma\Updelta modulator for WCDMA applications

A MASH bandpass $\Upsigma\Updelta$ modulator for wide-band code division multiple access (WCDMA) applications is presented. The signal bandwidth of the proposed modulator is 10?MHz centered around an intermediate frequency (IF) of 70.5?MHz. Two two-path second-order bandpass $\Upsigma\Updelta$ modulators make the MASH architecture, which realizes a noise transfer function with four couples of complex conjugate zeros. The proposed circuit, fabricated with a 0.18???m CMOS technology, uses a sampling frequency of 180?MHz to obtain a resolution of about 12?bits in the 10?MHz bandwidth around the IF. The measured modulator power consumption is 95?mW with a supply voltage of 1.8?V. The achieved figure-of-merit (FoM _BP ) is 0.37?pJ/conversion-level.     

A new interpolation technique for time interleaved \Upsigma\Updelta A/D converters

Time interleaved sigma-delta converter is a potential candidate for multi-mode wideband analog to digital (A/D) converters dedicated for multistandard receivers. However, the interpolation by zeros to compress the useful signal bandwidth at the input of the sigma-delta modulator imposes constraints on the implementation of the analog part leading to a very large die area due to the high value required for the sampling capacitor. This paper proposes a new interpolation technique using extra samples instead of zeros resulting from the oversampling of the input signal. This new technique not only reduces the die area and the order of the anti-alias filter but also improves A/D converter performance. The proposed technique was simulated and implemented in a four channel time interleaved sigma-delta designed in a 1.2 V 65?nm CMOS process.     

Graphene-Based\ Waveguide Terahertz Wave Attenuator

We design an electrically controllable terahertz wave attenuator by using graphene. We show that terahertz wave can be confined and propagate on S-shaped graphene waveguide with little radiation losses, and the confined terahertz wave is further manipulated and controlled via external applied voltage bias. The simulated results show that, when chemical potential changes from 0.03 into 0.05 eV, the extinction ratio of the terahertz wave attenuator can be tuned from 1.28 to 39.42 dB. Besides the simplicity, this novel terahertz wave attenuator has advantages of small size (24?×?30 μm²), a low insertion loss, and good controllability. It has a potential application for forthcoming planar terahertz wave integrated circuit fields.