ULSI中Cu互连线的显微结构及可靠性

观察了ULSI中大马士革结构的Cu互连线的晶粒生长和晶体学取向.分析了线宽及退火对Cu互连线显微结构及电徙动的影响.Cu互连线的晶粒尺寸随着线宽的变窄而减小.与平坦Cu膜相比,Cu互连线形成微小的晶粒和较弱的 (111) 织构.300℃、30min退火促使Cu互连线的晶粒长大、(111) 织构发展,从而提高了Cu互连线抗电徙动的能力.结果表明,Cu的扩散涉及晶界扩散与界面扩散,而对于较窄线宽的Cu互连线,界面扩散成为Cu互连线电徙动失效的主要扩散途径.     

Relationship between texture and electromigration lifetime in sputtered AI-1% Si thin films

The relationship among the grain structure, texture, and electromigration lifetime of four Al-1% silicon metallizations produced under similar sputtering conditions was explored. The grain sizes and distributions were similar and the grain structure was near-bamboo for all metallizations. All metallizations exhibited a near-(111) fiber texture, as determined by the pole figure technique. Differences in electromigration behavior were noted. Three of the metallizations exhibited a bimodal failure distribution while the fourth was monomodal and had the longest electromigration lifetime. The electromigration lifetime was directly related to the strength of the (111) fiber texture in the metallization as anticipated. However, whereas the grain size distribution has an effect on the electromigration lifetime when metallization lines are several grains wide, the electromigration lifetime of these near-bamboo metallizations appeared independent of the grain structure. It was also observed that a number of failures occurred in the 8 μm interconnect supplying the 5 μm wide test lines. This apparently reflects an increased susceptibility of the wider interconnect lines to electromigration damage.     

具有冗余设计的铜互连线电迁移可靠性评估

铜互连的电迁移可靠性与晶粒结构、几何结构、制造工艺以及介质材料等因素有着密切的关系。分别试制了末端有一定延伸的互连线冗余结构设计的样品,以及无冗余结构的互连线样品,并对样品进行了失效加速测试。测试结果显示,采用冗余结构设计的互连线失效时间更长,具有更好的抗电迁移可靠性。对冗余结构的失效模式进行了讨论,并结合互连线的制造工艺,指出采用冗余结构设计的互连线可以在有效改善互连线的电迁移特性,而且不会引入其他影响可靠性的因素,是一种有效提高铜互连电迁移可靠性的方法。     

Surface Morphology of Sn-Rich Solder Interconnects After Electrical Loading

Morphological changes from electromigration were examined on microsized Sn-Ag-Cu, pure Sn, and single-crystal Sn solder interconnects. It was found that both grain structure and alloying had a strong influence on the form of electromigration damage. In polycrystal Sn, grain boundary grooves were the primary form of electromigration damage, while in single-crystal Sn interconnects wavy surface relief appeared following electromigration. Alloying with Ag and Cu encouraged formation of Sn hillocks and Cu₆Sn₅ intermetallic compound (IMC) segregation. The grain boundary grooves were related to the divergence of the vacancy concentration at grain boundaries, which induced Sn grain tilting or sliding. Removal of the grain boundaries in the single-crystal interconnect made surface diffusion the primary electromigration mechanism, resulting in wavy surface relief after long electromigration time. In Sn-Ag-Cu alloy, directional flow of Cu caused Cu₆Sn₅ IMC segregation, which produced large compressive stress, driving the stressed grains to grow into hillocks.     

Electromigration characteristics of copper interconnects

The electromigration characteristics of electroless plated copper interconnects have been investigated under DC and time-varying current stressing. A scheme for selected electroless Cu plating by using 150-Å Co as the seeding layer is reported. The Cu DC and pulse-DC lifetimes are found to be one and two orders of magnitude longer than that of Al-4% Cu/TiW and Al-2% Si interconnects at 275°C, and the extracted Cu lifetime at 75°C is about three and five orders of magnitude longer than that of Al-4% Cu/TiW and Al-2% Si, respectively. As previously reported for Al metallization, the Cu bipolar lifetimes were found to be orders of magnitude longer than their DC lifetimes under the same peak stressing current density because of the partial recovery of electromigration damage during the opposing phases of bipolar stressing     

Effect of annealing on the surface microstructural evolution and the electromigration reliability of electroplated Cu films

This paper presents the effects of annealing, performed over a temperature range from 200°C to 400°C, on the surface microstructural evolution and the electromigration reliability of electroplated Cu films. After annealing, a substantial increase in surface roughness was observed, while variations in mean grain size and nanoindentation hardness were minor. Given the annealing temperature, the surface roughness was larger for the films annealed in forming gas, due to the existence of hydrogen. In particular, the films annealed at 400°C in forming gas demonstrated severe grain-boundary grooving and surface voiding. The defective nature of the annealed surface can be alleviated by chemical-mechanical polishing (CMP), when annealing is conducted prior to the CMP. However, it appears that a sequential thermal excursion at relatively high temperatures re-aggravates the integrity of the Cu surface. This argument may be supported by the electromigration-test results on dual-damascene interconnects fabricated using two different thermal profiles. The electromigration lifetimes were longer by more than a factor of two for the interconnects that skipped a post-passivation anneal at 400°C. The experimental evidence presented in this work suggests that controlling the integrity and quality of the Cu surface is an important step in ensuring good electromigration reliability.     

大马士革铜互连线织构的研究

采用EBSD研究了不同线宽和退火前后Cu互连线的织构和晶界特征分布.Cu互连线均具有多重织构,其中(111)织构强度最高.沉积态样品在室温下发生了自退火现象,并出现了一些异常长大的晶粒.随高宽比降低和退火处理,Cu互连线晶粒尺寸变大,(111)织构得到加强,而具有较低应变程度的织构与(111)织构强度的比例下降.沉积态样品出现了(111)<112>和(111)<231>织构组分.退火后,出现了(111)<110>组分,而且(111)<112>和(111)<231>组分得到增强.Cu互连线以大角度晶界为主,其中具有55°～60°错配角的晶界和∑3晶界比例最高,35°～40°的错配角和∑9晶界次之.随高宽比增加和退火处理,∑3晶界比例逐渐升高,∑9晶界比例下降.     

Electromigration failure in ultra-fine copper interconnects

This paper presents experimental evidence suggesting that electromigration (EM) can be a serious reliability threat when the dimension of Cu interconnects approaches the nanoscale range. To understand the failure mechanism prevailing in nanoscale Cu interconnects, single-level, 400-μm long interconnects with various effective widths, ranging from 750 nm to 80 nm, were made, EM tested, and characterized in this investigation. The results indicate that interface EM (Cu/barrier) may be the predominant EM mechanism in all line widths. The evidence supporting the active Cu/barrier interface EM includes the fact that the EM lifetime is inversely proportional to the interface area fraction. Microscopic analysis of the failure sites also supports the conclusion of interface EM because voids and hillocks are found at the ends of the test strip, which is not possible if lines fail by grain-boundary EM in the test structure used in this study. In addition, our study finds evidence that failure is assisted by a secondary mechanism. The influence of this factor is particularly significant when the feature size is small, resulting in more uniform distribution of failure time in narrower lines. Although limited, evidence suggests that the secondary factor is probably attributed to pre-existing defects or grain boundaries.     

Electromigration in sputtered copper film on plasma-treated hydrogen silsesquioxane dielectric

Electromigration (EM) damage is one of the major causes for the failure of interconnects. Plasma treatment, such as dry etching, is frequently employed in the fabrication of multilevel interconnection patterns. This work investigates the hydrogen silsesquioxane (HSQ) and copper integrated systems and the effect of H₂ plasma treatment on the EM of Cu. Hydrogen plasma bombardment induces a rough HSQ surface and results in a coarse morphology of the Cu film deposited on HSQ. The crystallographic texture of Cu is also affected by the plasma treatment. A decrease in the Cu I(111)/I(200) peak ratio is observed for a specimen treated with H₂ plasma. The activation energy for EM in Cu and the EM lifetime of the Cu interconnect decreases with an increased degree of plasma treatment. The activation energies obtained, ranging from 0.76 eV to 0.94 eV, suggest that the electromigration in copper proceeds via an interfacial diffusion path. Possible mechanisms for the effects of plasma treatment are explored. The rough surface and the retarded Cu (111) orientation induced by H₂ plasma bombardment are the major causes for the decrease of activation energy and EM lifetime.     

Electromigration performance of electroless platedcopper/Pd-silicide metallization

The electromigration reliability of Cu interconnects has been studied under DC, pulse-DC, and bipolar current stressing conditions. Electroless plating was used to selectively deposit Cu in oxide trenches by using Pd silicide as a catalytic layer at the bottom of the trenches to initiate copper deposition. The DC and pulse-DC lifetimes of Cu are found to be about two orders of magnitude longer than that of Al-2%Si at 275°C, and about four orders of magnitude longer than that of Al-2%Si when extrapolated to room temperature. On the other hand, Cu AC lifetimes are found to be comparable to the AC lifetimes of Al-2%Si. The pulse-DC lifetime of copper interconnects follows the similar frequency and duty factor dependence as aluminium and the prediction of the vacancy relaxation model     

Copper interconnect electromigration behaviors in various structures and lifetime improvement by cap/dielectric interface treatment

Copper interconnect electromigration performance was examined in various structures and three low-k materials (k = 2.65–3.6) using advanced BEOL technology. Strong current dependence effect on electromigration lifetime in three levels via terminated metal lines structure was shown. Moreover, different process approach will lead to different EM behavior and related failure mode. Multi-modality electromigration behavior of Cu dual damascene interconnects were studied. Both Superposition and Weak-Link models were used for statistical determination of lifetimes of each failure models (Statistical method). Results were correlated to the lifetimes of respective failure models physically identified according to resistance time evolution behaviors (Physical method). Good agreement was achieved. Various testing structures are designed to identify the EM failure modes. Extensive failure analysis was carried out to understand the failure phenomena of various test structures. The activation energies of failure modes were calculated. The weak links of interconnect system were also identified. A significant improvement of electromigration (EM) lifetime is achieved by modification of the pre-clean step before cap-layer deposition and by changing Cu cap/dielectric materials. A possible mechanism for EM lifetime enhancement was proposed. Cu-silicide formation before cap-layer deposition and adhesion of Cu/cap interface were found to be critical factors in controlling Cu electromigration reliability. The adhesion of the Cu/cap interface can be directly correlated to electromigration MTF and activation energy. Results of present study suggest that interface of Cu interconnects is the key factor for EM performance for advanced BEOL technology design rules.     

Correlation of electromigration lifetime distribution to failure mode in dual Damascene Cu/SiLK interconnects

The electromigration cumulative percent lifetime probability of dual Damascene Cu/SiLK interconnects was fitted using three, individual lognormal functions where the functional populations were grouped by void growth location determined from focused ion beam failure analysis of all 54 of the stressed structures. The early, first mode failures were characterized by small voids in the bottom of the vias. The intermediate mode failures had voids in the line and via bottom while the late mode failures had voids that formed in the line only. The three, individual lognormal functions provided good fits of the data. Failure mode population separation using comprehensive failure analysis suggested that only the first mode failures should be used in the prediction of the chip design current.     

Relationship between microstructure and electromigration damage in unpassivated PVD copper damascene interconnects

The microstructure of unpassivated PVD copper interconnects has been determined by electron backscatter diffraction technique (EBSD) inside a scanning electron microscope (SEM), and the appearance and growth of voids and hillocks during the electromigration testing has been observed in situ inside the SEM. The EBSD measurement indicates a strong <111 > texture for the tested line and a high angle boundary fraction of more than 70%. The comparison of the EBSD maps and the SEM images of the defect formation due to electromigration shows that the voids are formed mainly at the sidewall and after blocking grains. These images indicate that the diffusion paths are both the interface and the grain boundaries.     

Metal electromigration damage healing under bidirectional currentstress

The AC electromigration lifetime, without DC component, has been studied in a wide frequency range (mHz to 200 MHz) and found to be linearly proportional to the repetition frequency of the AC stressing current. This behavior is observed in both of the metallization systems (Al-2% Si and Cu) investigated. This provides further confirmation that AC lifetime is orders of magnitude longer than DC lifetime and that CMOS signal lines may be called upon to carry much larger current than allowed in present practice     

Comparative study of novel barrier layers in ULSI copper interconnects

As ULSI dimensions shrink, conventional Ta/TaN barriers will not meet the future demands for ULSI interconnects, i.e. thin conformal layer without overhangs. In this paper, we have compared the material properties of TaN/Ta barriers with Ta only and W based barriers by means of XRD, AFM, Stress and SEM imaging. We found that using a conformal CVD W based barriers has great potential for future ULSI interconnects. It grain size and tensile stress improve resistance to both electromigration and stress migration, extending conductor lifetime.     

Impact of Al in Cu alloy interconnects on electro and stress migration reliabilities

The reliability of Cu interconnects was successfully improved by applying a CuAl alloy seed. However, the effect of additive Al on the reliability is not fully understood. In order to reveal the reliability improvement mechanism, Cu films using CuAl alloy seed were investigated in detail. As stress induced voiding (SIV) as well as electromigration is caused by migration of vacancies and/or Cu atoms, the measured activation energy value of electromigration using CuAl indicates that the fast diffusion paths are Cu grain boundaries. The analysis using high lateral resolution scanning type secondary ion mass spectrometry (nano-SIMS) clarifies that additive Al in ECP-Cu film is mainly localized at grain boundaries. Furthermore, positron annihilation was used to probe vacancy-type defects in Cu films. The CuAl films before recrystallization contain larger and higher density vacancy-type defects. Whereas, the recrystallized CuAl films after annealing above 250 °C contain smaller and lower density defects. Furthermore, CuAl films with annealing above 350 °C contain less Al inside the grains. These results represent that Al atoms in Cu films with annealing above 350 °C are exhausted from inside grains to the grain boundaries, and the spewed Al atoms existing at Cu grain boundary effectively prevents the diffusion of Cu and/or vacancies.     

Electromigration-Induced Plasticity: Texture Correlation and Implications for Reliability Assessment

Plastic behavior has previously been observed in metallic interconnects undergoing high-current-density electromigration (EM) loading. In this study of Cu interconnects, using the synchrotron technique of white-beam x-ray microdiffraction, we have further found preliminary evidence of a texture correlation. In lines with strong (111) textures, the extent of plastic deformation is found to be relatively large compared with that of weaker textures. We suggest that this strong (111) texture may lead to an extra path of mass transport in addition to the dominant interface diffusion in Cu EM. When this extra mass transport begins to affect the overall transport process, the effective diffusivity, D _eff, of the EM process is expected to deviate from that of interface diffusion only. This would have fundamental implications. We have some preliminary observations that this might be the case, and report its implications for EM lifetime assessment herein.     

Atomic bonding and properties of Al-Cu alloy with ϑ(Al2Cu)

Atomic bonding of ϑ (Al₂Cu) in an Al-Cu thin-film alloy is calculated by using empirical electron theory (EET) in solids. Results show that the Cu-Cu bond in the ϑ phase is the strongest, while the second strongest bond is the Al-Cu bond. All of these bonds are stronger than the strongest Cu-Cu bond in pure Cu metal. This is the reason that only ϑ precipitation in the Al-Cu thin-film alloy can be found and not ϑ″ and ϑ′ phases. The electromigration lifetime of Al-Cu thin-film alloy for interconnects is influenced by the stronger atomic bonding in ϑ particles, which are dispersed in the matrix of the alloy. The ϑ precipitation in the Al-Cu thin-film alloy can enhance the strength of the alloy by the stronger bond net and increase the electromigration lifetime for interconnects.     

The applicability of logarithmic extreme value distributions in electomigration induced failures of Al/Cu thin-film interconnects

In electromigration failure studies it is in general assumed that electromigration induced failures may be adequately modelled by a log normal distribution. Further to this it has been argued that a log normal distribution of failure times is indicative of electromigration mechanisms. We have combined post processing of existing life-data from Al/Cu+TiW bilayer interconnects with our own results from Al/Cu interconnects to show that the Log Extreme Value distribution is an equally good statistical model for electromigration failures, even in cases where grain size exceeds the line width. The significance of such a modelling is particularly apparent in electromigration failure rate prediction.     

Electromigration characteristics of tungsten plug vias under pulseand bidirectional current stressing

Using Kelvin test structures, electromigration performances of selective CVD tungsten filled vias under DC, pulsed DC, and AC current signals have been studied. The metallization consists of Al-Cu/TiW multilevel metals. The via electromigration lifetime exhibits a current polarity dependence. The via AC lifetimes are found to be much longer (more than 1000×) than DC lifetimes under the same peak stressing current density. The via lifetimes under pulsed DC stress of 50% duty factor are twice the DC lifetimes at low-frequency regions (<200 Hz) and 4-5 times the DC lifetimes at high-frequency regions (>10 kHz). The results are in agreement with the vacancy relation model