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1.
In this work we investigate the effects of NO annealing and forming gas (FG) an-nealing on the electrical properties of SiO2/SiC interface by low-temperature con-ductance measurements. With nitrogen passivation, the density of interface states (DIT) is significantly reduced in the entire energy range, and the shift of flatband voltage, ΔVFB, is effectively suppressed to less than 0.4 V. However, very fast states are ob-served after NO annealing and the response frequencies are higher than 1 MHz at room temperature. After additional FG annealing, the DIT and ΔVFB are further re-duced. The values of the DIT decrease to less than 1011 cm-2eV-1 for the energy range of EC-ET≥0.4 eV. It is suggested that the fast states in shallow energy levels origi-nated from the N atoms accumulating at the interface by NO annealing. Though FG annealing has a limited effect on these shallow traps, hydrogen can terminate the re-sidual Si and C dangling bonds corresponding to traps at deep energy levels and im-prove the interface quality further. It is indicated that NO annealing in conjunction with FG annealing will be a better post-oxidation process method for high perfor-mance SiC MOSFETs.  相似文献   

2.
This paper presents the fabrication and modeling for capacitance-voltage characteristics of multi-layer metal-insulator-metal capacitors.It is observed that,due the applied electric field,the effective dielectric constant of the stack was increased due to the accumulation of charges at the interface of high-to-low conductance materials.It is observed that the Maxwell-Wagner polarization is dominant at low frequencies (<10 kHz).By introducing carrier tunneling probability of the dielectric stack,the model presented in this paper shows a good agreement with experimental results.The presented model indicates that the nonlinearity can be suppressed by choosing the similar permittivity dielectric materials for fabrication ofmultilayer metal insulator metal capacitors.  相似文献   

3.
Defect evolution in a single crystal silicon which is implanted with hydrogen atoms and then annealed is investigated in the present paper by means of molecular dynamics simulation. By introducing defect density based on statistical average, this work aims to quantitatively examine defect nucleation and growth at nanoscale during annealing in Smart-Cut~ technology. Research focus is put on the effects of the implantation energy, hydrogen implantation dose and annealing temperature on defect density in the statistical region. It is found that most defects nucleate and grow at the annealing stage, and that defect density increases with the increase of the annealing temperature and the decrease of the hydrogen implantation dose. In addition, the enhancement and the impediment effects of stress field on defect density in the annealing process are discussed.  相似文献   

4.
A new gate dielectric material HfTiON is deposited by reactive co-sputtering of Hf and Ti targets in N2/O2 ambient, followed by annealing in N2 at 600 ℃ and 800 ℃ respectively for 2 min. Capacitance-voltage and gate-leakage properties are characterized and compared for different anneal conditions. The results indicate that the sample annealed at 800 ℃ exhibits lower interface-state and oxide-charge densities, and better device reliability. This is attributed to the fact that the rapid thermal annealing at the higher temperature of 800 ℃ can effectively remove the damage-induced precipitation, forming a hardened dielectric/Si interface with high reliability.  相似文献   

5.
许高博  徐秋霞 《半导体学报》2009,30(2):023002-5
We investigate the thermal stability of HfTaON films prepared by physical vapor deposition using high resolution transmission electronic microscope (HRTEM) and X-ray photoelectron spectroscopy (XPS). The results indicate that the magnetron-sputtered HfTaON films on Si substrate are not stable during the post-deposition annealing (PDA). HfTaON will react with Si and form the interfacial layer at the interface between HfTaON and Si substrate. Hf-N bonds are not stale at high temperature and easily replaced by oxygen, resulting in significant loss of nitrogen from the bulk film. SiO2 buffer layer introduction at the interface of HfraON and Si substrate may effectively suppress their reaction and control the formation of thicker interfacial layer. But SiO2 is a low k gate dielectric and too thicker SiO2 buffer layer will increase the gate dielectric's equivalent oxide thickness. SiON prepared by oxidation of N-implanted Si substrate has thinner physical thickness than SiO2 and is helpful to reduce the gate dielectric's equivalent oxide thickness.  相似文献   

6.
韩锴  王晓磊  杨红  王文武 《半导体学报》2015,36(3):036004-3
The formation of an electric dipole at the high-k/SiO2 interface is quantitatively analyzed. The band lineups and physical origin of dipole formation at the high-k/SiO2 interface are explained by the dielectric contact induced gap states(DCIGS). The charge neutrality level(CNL) of the DCIGS, which represents a distribution of high-k and SiO2 contact induced gap states, is utilized to study the dipole moment. The charge transfer due to different CNLs of high-k and SiO2 is considered as the dominant origin of dipole formation. The theoretically calculated dipole strengths of high-k/SiO2 systems based on this model are in good agreement with the experimental data.  相似文献   

7.
The Schottky barrier junction parameters and structural properties of Zr/p-GaN Schottky diode are explored at various annealing temperatures. Experimental analysis showed that the barrier height (BH) of the Zr/pGaN Schottky diode increases with annealing at 400℃ (0.92 eV (I-V)/1.09 eV (C-V)compared to the asdeposited one (0.83 eV (I-V)/0.93 eV (C-V). However, the BH decreases after annealing at 500℃. Also, at different annealing temperatures, the series resistance and BH are assessed by Cheung''s functions and their values compared. Further, the interface state density (NSS)of the diode decreases after annealing at 400℃ and then somewhat rises upon annealing at 500℃. Analysis reveals that the maximum BH is obtained at 400℃, and thus the optimum annealing temperature is 400℃ for the diode. The XPS and XRD analysis revealed that the increase in BH may be attributed to the creation of Zr-N phases with increasing annealing up to 400℃. The BH reduces for the diode annealed at 500℃, which may be due to the formation of Ga-Zr phases at the junction. The AFM measurements reveal that the overall surface roughness of the Zr film is quite smooth during rapid annealing process.  相似文献   

8.
SiC granule films were fabricated onto porous glass substrate by RF-magnetron sputtering. Photoluminescence (PL) measurements show that there are light emissions at three different wavelengths. Ultraviolet emission peaked at 360 nm originated from the band-band transmission of SiC nanoparticles with relatively small size. The 370 nm light emission was due to the luminescence of the nano-skeletons of porous glass that was formed during the etching of the glass substrate. The blue emission at about 460 nm was associated with the recombination of the excited electron and O-deficient defects appeared at the interface between SiC nanoparticles and the porous glass. Furthermore, the optimal PL performance was obtained when SiC deposited time was I h and the glass substrate was etched for 20 min in the annealing sample (450 ℃).  相似文献   

9.
SiC granule films were fabricated onto porous glass substrate by RF-magnetron sputtering. Photoluminescence (PL) mea-surements show that there are light emissions at three different wavelengths. Ultraviolet emission peaked at 360 nm origi-nated from the band-band transmission of SiC nanoparticles with relatively small size. The 370 nm light emission was due to the luminescence of the nano-skeletons of porous glass that was formed during the etching of the glass substrate. The blue emission at about 460 nm was associated with the recombination of the excited electron and O-deficient defects appeared at the interface between SiC nanoparticles and the porous glass. Furthermore,the optimal PL performance was obtained when SiC deposited time was 1h and the glass substrate was etched for 20 min in the annealing sample (450℃).  相似文献   

10.
The effects of low temperature annealing,such as post high-k dielectric deposition annealing(PDA),post metal annealing(PMA)and forming gas annealing(FGA)on the electrical characteristics of a metal–oxide–semiconductor(MOS)capacitor with a TiN metal gate and a HfO2dielectric are systematically investigated.It can be found that the low temperature annealing can improve the capacitance–voltage hysteresis performance significantly at the cost of increasing gate leakage current.Moreover,FGA could effectively decrease the interfacial state density and oxygen vacancy density,and PDA could make the flat band positively shift which is suitable for P-type MOSs.  相似文献   

11.
Cu and Cu/ITO films were prepared on polyethylene terephthalate (PET) substrates with a Ga2O3 buffer layer using radio frequency (RF) and direct current (DC) magnetron sputtering. The effect of Cu layer thickness on the optical and electrical properties of the Cu film deposited on a PET substrate with a Ga2O3 buffer layer was studied, and an appropriate Cu layer thickness of 4.2 nm was obtained. Changes in the optoelectrical properties of Cu(4.2 nm)/ITO(30 nm) films were investigated with respect to the Ga2O3 buffer layer thickness. The optical and electrical properties of the Cu/ITO films were significantly influenced by the thickness of the Ga2O3 buffer layer. A maximum transmission of 86%, sheet resistance of 45 Ω/□ and figure of merit of 3.96 × 10^-3 Ω^ -1 were achieved for Cu(4.2 nm)/ITO(30 nm) films with a Ga2O3 layer thickness of 15 nm.  相似文献   

12.
The characteristics of TDDB (time-dependent dielectric breakdown) and SILC (stress-induced leakage current) for an ultra-thin SiO2/HfO2 gate dielectric stack are studied. The EOT (equivalent-oxide-thickness) of the gate stack (Si/SiO2/HfOz/TiN/TiA1/TiN/W) is 0.91 am. The field acceleration factor extracted in TDDB experi- ments is 1.59 s.cm/MV, and the maximum voltage is 1.06 V when the devices operate at 125 ℃ for ten years. A detailed study on the defect generation mechanism induced by SILC is presented to deeply understand the break- down behavior. The trap energy levels can be calculated by the SILC peaks: one S1LC peak is most likely to be caused by the neutral oxygen vacancy in the HfO2 bulk layer at 0.51 eV below the Si conduction band minimum; another SILC peak is induced by the interface traps, which are aligned with the silicon conduction band edge. Fur- thermore, the great difference between the two SILC peaks demonstrates that the degeneration of the high-k layer dominates the breakdown behavior of the extremely thin gate dielectric.  相似文献   

13.
Indium sulfide (InzS3) thin films were prepared by chemical spray pyrolysis technique from solutions with different [S]/[In] ratios on glass substrates at a constant temperature of 250 ~C. Thin films were characterized by X-ray diffraction (XRD), scanning electron microscopy (SEM), atomic force microscopy (AFM), energy disper- sive X-ray spectroscopy (EDS), Raman spectroscopy and optical transmittance spectroscopy. All samples exhibit a polycrystalline structure with a preferential orientation along (0, 0, 12). A good stoichiometry was attained for all samples. The morphology of thin film surfaces, as seen by SEM, was dense and no cracks or pinholes were ob- served. Raman spectroscopy analysis shows active modes belonging to j3-1naS3 phase. The optical transmittance in the visible range is higher than 60% and the band gap energy slightly increases with the sulfur to indium ratio, attaining a value of 2.63 eV for [S]/[In] : 4.5.  相似文献   

14.
刘小龙  张雷  张莉  王燕  余志平 《半导体学报》2014,35(7):075002-7
A wideband low-phase-noise LC voltage-controlled oscillator (VCO) with low VCO gain (Kvco) vari- ation for WLAN fractional-N frequency synthesizer application is proposed and designed on a 0.13-μm CMOS process. In order to achieve a low Kvco variation, an extra switched varactor array was added to the LC tank with the conventional switched capacitor array. Based on the proposed switched varactor array compensation technique, the measured Kvco is 43 MHz/V with only 6.29% variation across the entire tuning range. The proposed VCO provides a tuning range of 23.7% from 3.01 to 3.82 GHz, while consuming 9 mA of quiescent current from a 2.3 V supply. The VCO shows a low phase noise of-121.94 dBc/Hz at 1 MHz offset, from the 3.6 GHz carrier.  相似文献   

15.
Atom layer deposition (ALD)-Al2O3 thin films are considered effective passivation layers for p-type silicon surfaces. A lower surface recombination rate was obtained through optimizing the deposition parameters. The effects of some of the basic substrate characteristics including material type, bulk resistivity and surface morphology on the passivation performance of ALD-Al2O3 are evaluated in this paper. Surface recombination velocities of 7.8 cm/s and 6.5 cm/s were obtained for p-type and n-type wafers without emitters, respectively. Substrates with bulk resistivity ranging from 1.5 to 4 Ω · cm were all great for such passivation films, and a higher implied Voc of 660 mV on the 3 Ω · cm substrate was achieved. A minority carrier lifetime (MCL) of nearly 10 μs higher was obtained for cells with a polished back surface compared to those with a textured surface, which indicates the necessity of the polishing process for high-efficiency solar cells. For n-type semi-finished solar cells, a lower effective front surface recombination velocity of 31.8 cm/s was acquired, implying the great potential of (ALD)-Al2O3 thin films for high-efficiency n-type solar cells.  相似文献   

16.
Abstract: The pristine In2O3 nanotubes were synthesized by electrospinning and subsequent calcination. Scanning electron microscope, X-ray powder diffraction and transmission electron micrograph were employed to analyze the morphology and crystal structure of the as-synthesized nanotubes. Gas-sensing properties of the as-synthesized In203 nanotubes were investigated by exposing the corresponding sensors to toluene, acetone, ethanol, formalde- hyde, ammonia and carbon monoxide at 340 ℃. The results show that the gas sensor possesses a good selectivity to toluene at 340 ℃. The response of the In2O3 nanotube gas sensor to 40 ppm is about 5.88. The response and recovery times are about 3 s and 17 s, respectively.  相似文献   

17.
Abstract: Surface roughness by peaks and depressions on the surface of titanium dioxide (TiO2) thin film, which was widely used for an antireflection coating of optical systems, caused the extinction coefficient increase and affected the properties of optical system. Chemical mechanical polishing (CMP) is a very important method for surface smoothing. In this polishing experiment, we used self-formulated weakly alkaline slurry. Other process parameters were working pressure, slurry flow rate, head speed, and platen speed. In order to get the best surface roughness (1.16 A, the scanned area was 10 × 10 μm2) and a higher polishing rate (60.8 nm/min), the optimal parameters were: pressure, 1 psi; slurry flow rate, 250 mL/min; polishing head speed, 80 rpm; platen speed, 87 rpm.  相似文献   

18.
The Ni/Ti/Ni multilayer ohmic contact properties on a 4H-SiC substrate and improved adhesion with the Ti/Au overlayer have been investigated. The best specific contact resistivity of 3.16 × 10^-5 Ω.cm^2 was obtained at 1050 ℃. Compared with Ni/SiC ohmic contact, the adhesion between Ni/Ti/Ni/SiC and the Ti/Au overlayer was greatly improved and the physical mechanism under this behavior was analyzed by using Raman spectroscopy and X-ray energy dispersive spectroscopy (EDS) measurement. It is shown that a Ti-carbide and Ni-silicide compound exist at the surface and there is no graphitic carbon at the surface of the Ni/Ti/Ni structure by Raman spectroscopy, while a large amount of graphitic carbon appears at the surface of the Ni/SiC structure, which results in its bad adhesion. Moreover, the interface of the Ni/Ti/Ni/SiC is improved compared to the interface of Ni/SiC.  相似文献   

19.
陈亮  李智群  曹佳  吴晨健  张萌 《半导体学报》2014,35(1):015002-7
A new broadband low-noise amplifier (LNA) is proposed. The conventional common gate (CG) LNA exhibits a relatively high noise figure, so active gin-boosting technology is utilized to restrain the noise generated by the input transistors and reduce the noise figure. Theory, simulation and measurement are shown. An implemented prototype using 0.13 μm CMOS technology is evaluated using on-wafer probing. S11 and S22 are below -10 dB across 0.1-5 GHz. Measurements also show a gain of 18.3 dB with a 3 dB bandwidth from 100 MHz to 2.1 GHz and an ⅡP3 of-7 dBm at 2 GHz. The measured noise figure is better than 2.5 dB below 2.1 GHz, is better than 4.5 dB below 5 GHz, and at 500 MHz, it gets its minimum value 1.8 dB. The LNA consumes 9 mA from 1.5 V supply and occupies an area of 0.04 mm^2.  相似文献   

20.
The AC-electronic and dielectric properties of different phthalocyanine films(ZnPc,CuPc,FePc,and H2Pc)were investigated over a wide range of temperature.Both real and imaginary parts of the dielectric constant("D"1–i"2/were found to be influenced by temperature and frequency.Qualitatively the behavior was the same for those compounds;however,the central atom,film thickness,and the electrode type play an important role in the variation of their values.Therelaxationtime,,wasstronglyfrequency-dependentatalltemperaturesandlowfrequencies,whileaweak dependency is observed at higher frequencies.The relaxation activation energy was derived from the slopes of the fitted lines of ln and the reciprocal of the temperature(1/T).The values of the activation energy were accounted forthehoppingprocessatlowtemperatures,whileathermallyactivatedconductionprocesswasdominantathigher temperatures.Themaximumbarrierheight,Wm,wasfoundtobetemperatureandfrequencydependentforallphthalocyanine compounds.The value Wm depends greatly on the nature of the central atom and electrode material type.The correlated barrier hopping model was found to be the appropriate mechanism to describe the charge carrier’s transport in phthalocyanine films.  相似文献   

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