在Rayleigh衰落信道中结合迭代多级译码和交织技术的多级编码调制方案

在基于“信道容量规则”的多级编码系统中采用交织技术与迭代多级译码相结合的方法，进一步提高其在Rayle曲衰落信道中的系统性能。     

一种简化的多级译码方法

文中提出了一种简化的多级译码方法。这种译码方法能够在不损害编码系统传输性能的情况下有效地减少译码器的运算量，从而减少译码时延，使高速译码的实时实现成为可能。     

移动衰落信道中多级编码的多级译码与并行译码的性能比较

本文在计算了多级编码系统中各等价信道的信道容量的基础上^[1],选用BCH码为分量码,比较了两种不同的译码方法:多级译码(MSD)和并行译码(PDL)在AWGN和Rayleigh衰落信道中、采取三种集分割方案、8ASK调制方式下的性能.     

联合LDPC码的多级编码调制迭代判决仿真分析

论文介绍了多级编码调制的基本原理和译码算法,以LDPC码作为多级编码调制的分量码,在译码过程中引入了迭代思想,分析了一种适用于多级编码调制的迭代判决算法,并建立了MLCM-ID系统模型.计算机仿真表明,该算法能够有效地提高系统性能,具有一定的应用价值.     

一种多级用户访问控制和信息广播方案

本文介绍一种在用户层次系统中实现多级动态访问控制和在分布式系统中进行信息广播的密码学方案。     

多级视频监控流媒体服务系统设计方案

多级视频监控系统是一种具有实际需要和应用价值的视频监控系统,其特点是视频流数据传输时间长,客户请求并发规模大,实时性能高,决定其诸多性能的关键和核心是流媒体(Streaming Media,SM)转发服务。介绍了多级视频监控系统中一种高效的流媒体转发服务设计和实现技术,内容涵盖流媒体转发服务、多级视频监控系统、调阅客户和调阅视频源等概念,流媒体转发服务网络拓扑、数据传输和模块设计等关键技术,以及系统应用与仿真测试结果。     

数字调幅广播中多级编码的译码方案

数字调幅广播采用了基于码率匹配的删除卷积码的多级编码调制技术,结合 OFDM信道估计,研究了其译码方案。提出基于软判决的并行译码、多级译码和迭代多级译码 3种译码方案,仿真了其在长、中、短波段各信道的性能。试验结果表明,迭代多级译码方案性 能最优,但从实现的复杂度和性能改善程度来看,在AWGN信道采用迭代多级译码方案,中短 波信道采用多级译码方案更合适。     

大型宽带相控阵天线多级子阵延时应用研究

在采用子阵延时方案的大型宽带相控阵天线系统设计中,子阵划分结构和实时延时器使用方式将直接决定系统的宽带性能、工程实现复杂度以及研制成本。本文基于阵列方向图合成的基础理论模型,推导得出多级子阵延时方案与传统单级子阵延时方案具有相近的阵列辐射性能。通过一维大型线阵多级子阵方案的应用示例,说明多级子阵延时方案可显著降低系统总体复杂度,在此基础上分析并总结阵列宽带性能与子阵规模和时延步进量之间的关系。     

一种基于虚拟化技术的多级安全机制研究

多级安全机制是指能在计算机系统中处理多个不同敏感级别信息的方法,传统的多级安全机制一般需要可信操作系统支持,但这不仅在实现上难度大,而且还会导致应用兼容性问题和难以克服的安全隐通道问题。这里提出一种基于虚拟化技术的多级安全机制结构,它通过强安全隔离机制避免不同安全级别信息之间的交叉污染和隐通道问题,通过无缝支持商用操作系统和既有应用的设计机制降低多级安全系统的应用难度和实现成本。基于虚拟化技术的多级安全机制还通过采用显式安全标记和隐式安全标记相结合的方法,简化了系统的安全管理。     

基于可信平台的多级安全访问控制模型研究

针对现有的多级安全访问控制模型过于复杂而不利于实际部署以及在密钥管理中存在的漏洞,文章在改良密钥生成算法,紧密结合可信计算技术支持的信任验证机制,提出了一种新的多级安全访问控制方案。与传统的方案相比,新方案不仅更加简洁、灵活,便于与原有系统进行整合,同时,克服了密钥管理上的漏洞。     

A fast two-stage classification method for high-dimensional remotesensing data

Classification for high-dimensional remotely sensed data generally requires a large set of data samples and enormous processing time, particularly for hyperspectral image data. In this paper, the authors present a fast two-stage classification method composed of a band selection (BS) algorithm with feature extraction/selection (FSE) followed by a recursive maximum likelihood classifier (MLC). The first stage is to develop a BS algorithm coupled with FSE for data dimensionality reduction. The second stage is to design a fast recursive MLC (RMLC) so as to achieve computational efficiency. The experimental results show that the proposed recursive MLC, in conjunction with BS and FSE, reduces computing time significantly by a factor ranging from 30 to 145, as compared to the conventional MLC     

基于8PSK的MLC-STBC在瑞利衰落信道中的性能

文章提出了在瑞利信道中,8PSK调制模式下多级编码空时分组编码级联的MLC-STBC方案,并在系统码率为2.032bit/s、发射天线为2、接收天线数目为1的条件下,分别对多级编码和MLC-STBC级联编码进行了仿真。仿真结果表明,基于8PSK,在瑞利衰落下利用旋转距离度量规则选择分量码码率的MLC-STBC系统,能获得比较理想的系统增益。     

银钯内电极与多层陶瓷电容器(MLC)的可靠性

银钯合金广泛用作多层陶瓷电容器的内电极。从一个失效分析实例出发，讨论了不同银钯内电极对多层陶瓷电容器可靠性的不同影响。     

衰落信道下多级编码方案的软判决译码

研究Rayleigh衰落信道下,软判决译码对三种不同映射方案多级编码系统性能的影响.基于信道容量规则,构造卷积码为分量码的8ASK多级编码系统,在多阶段译码中提出利用信道状态信息的软判决支路度量计算公式,并探讨系统的误码传播特性,研究结果可为衰落信道编码调制方案的最佳设计度量提供参考.     

Multilevel coding for multiple-antenna transmission

The application of powerful coding for transmission over multiple-input/multiple-output channels is discussed. The authors emphasize that as an immediate consequence of the mutual information chain rule, multilevel coding (MLC) constitutes the optimum coded modulation scheme. On the other hand, simple bit-interleaved coded modulation (BICM) is only a convenient alternative for the case of two transmit and one receive antennas when combined with orthogonal space-time block codes. Starting from MLC, the authors further propose a hybrid coded modulation scheme, which favorably combines the advantages of MLC and BICM.     

A Bipolar-Selected Phase Change Memory Featuring Multi-Level Cell Storage

In this paper, a 90-nm 128-Mcell non-volatile memory based on phase-change Ge₂-Sb₂-TeB alloy is presented. Memory cells are bipolar selected, and are based on a /xtrench architecture. Experimental investigation on multi-level cell (MLC) storage is addressed exploiting the chip MLC capability. To this end, a programming algorithm suitable for 2 bit/cell storage achieving tightly placed inner states (in terms of cell current or resistance) is proposed. Measurements showed the possibility of placing the required distinct cell current distributions, thus demonstrating the feasibility of the MLC phase-change memory (PCM) storage concept. Endurance tests were also carried out. Cumulative distribu tions after 2-bit/cell programming before cycling and after 100 k program cycles followed by 1 h/150 degC bake are presented. Experimental results on MLC endurance are also provided from a 180-nm 8-Mb PCM demonstrator with the same mutrench cell structure.     

Routing,modulation level and spectrum allocation with dynamic modulation level conversion in elastic optical networks

Elastic optical network is introduced as a promising technology to provide multi-bitrate-friendly data transmission in the optical layer. Elastic optical networks are based on flexible modulation format conversion, which can make more efficient use of spectrum resources than current fix-grid WDM networks. In this paper, we define the routing, modulation level and spectrum resource allocation (RMLSA) problem and then propose two novel dynamic modulation level conversion (MLC) enabled RMLSA algorithms. Numerical simulations are conducted to compare the performance of the path modulation level conversion (Path-MLC) and link modulation level conversion (Link-MLC) with different MLC thresholds with K-shortest paths RSA in terms of blocking rate, occupied spectrum and the number of MLCs across two topologies. The results verify that the Link-MLC with unlimited MLC achieves the lowest blocking rate and moderate spectrum utilization at the expense of intermediate node modulation conversions in two topologies. Smaller MLC threshold has higher blocking rate and occupied less spectrum resource. The results also suggest that the Path-MLC approach is more resource efficient than the Link-MLC with relatively higher blocking rate, and this method maybe more preferable in the networks with tight budget and/or energy constraints.     

A dual-mode NAND flash memory: 1-Gb multilevel and high-performance512-Mb single-level modes

A 116.7-mm² NAND flash memory having two modes, 1-Gb multilevel program cell (MLC) and high-performance 512-Mb single-level program cell (SLC) modes, is fabricated with a 0.15-μm CMOS technology. Utilizing simultaneous operation of four independent banks, the device achieves 1.6 and 6.9 MB/s program throughputs for MLC and SLC modes, respectively. The two-step bitline setup scheme suppresses the peak current below 60 mA. The wordline ramping technique avoids program disturbance. The SLC mode uses the 0.5-V incremental step pulse and self-boosting program inhibit scheme to achieve high program performance, and the MLC mode uses 0.15-V incremental step pulse and local self-boosting program inhibit scheme to tightly control the cell threshold voltage V_th distributions. With the small wordline and bitline pitches of 0.3-μm and 0.36-μm, respectively, the cell V_th shift due to the floating gate coupling is about 0.2 V. The read margins between adjacent two program states are optimized resulting in the nonuniform cell V_th distribution for MLC mode     

Nondestructive defect detection in multilayer ceramic capacitorsusing an improved digital speckle correlation method with wavelet packetnoise reduction processing

The nondestructive detection of defects in multilayer ceramic capacitors (MLCs) in-surface mount printed circuit board assemblies has been demonstrated by using an improved digital speckle correlation method (DSCM). The internal cracks in MLCs that contribute to the thermal displacements on the MLC surface after dc electrical loading may be uniquely identified using this improved DSCM combined with double lens optical arrangement. However, it is found that Joule heating of the MLC sample takes time, and therefore the thermal displacements on the MLC surface are not obvious at the beginning of the dc electrical loading. In order to shorten the detection time and increase the resolution of the DSCM, a wavelet packet noise reduction process is introduced into the DSCM technique. This new algorithm is used to reduce the background noise in the signal so as to improve the accuracy of detection of defect locations and reduce the detection time. By introducing wavelet packet noise reduction processing, the DSCM is found to be more sensitive to and faster at detecting defects in MLC samples. Furthermore, the DSCM with wavelet packet noise reduction process can cope with the problems of edge effect, rough and warped surface, which are the limitations of the scanning acoustic microscope (SAM)     

A mobility-based load control scheme in Hierarchical Mobile IPv6 networks

By introducing a mobility anchor point (MAP), Hierarchical Mobile IPv6 (HMIPv6) reduces the signaling overhead and handoff latency associated with Mobile IPv6. In this paper, we propose a mobility-based load control (MLC) scheme, which mitigates the burden of the MAP in fully distributed and adaptive manners. The MLC scheme combines two algorithms: a threshold-based admission control algorithm and a session-to-mobility ratio (SMR)-based replacement algorithm. The threshold-based admission control algorithm gives higher priority to ongoing mobile nodes (MNs) than new MNs, by blocking new MNs when the number of MNs being serviced by the MAP is greater than a predetermined threshold. On the other hand, the SMR-based replacement algorithm achieves efficient MAP load distribution by considering MNs’ traffic and mobility patterns. We analyze the MLC scheme using the continuous time Markov chain in terms of the new MN blocking probability, ongoing MN dropping probability, and binding update cost. Also, the MAP processing latency is evaluated based on the M/G/1 queueing model. Analytical and simulation results demonstrate that the MLC scheme outperforms other schemes and thus it is a viable solution for scalable HMIPv6 networks.