IC卡安全的基础——IC卡用芯片的安全

IC卡是轨道交通自动售检票（AFC）系统中的车票介质,IC卡用芯片是一种集成电路芯片,除了IC卡的特殊应用环境要求IC卡用芯片具有较小的体积及环境适应性外,更重要的就是IC卡用芯片的安全性。文章阐述了IC卡用芯片的安全是IC卡安全性的基础,对在AFC系统中产生安全问题的几方面进行了分析,讨论了从芯片的设计阶段起就采用的必要的安全保护措施。     

IC卡及其应用

70年代，随着超大规模集成电路和大容量存储芯片技术的发展，出现一种存储容量大、安全、可靠的集成电路卡，即IC卡，又称其为智能卡。由于具有以上许多明显优越于磁卡等存储卡的优点，IC卡的应用在随后的一段时间里飞速发展。虽然目前世界上磁卡仍在广泛使用，但其逐步被IC卡取代是必然的趋势。在当今这个信息时代，IC卡的应用将不断深入到人们生活的各个领域，成为人们处理各种事务的必不可少的工具。     

一种基于电磁旁路分析的硬件木马检测方法

为探究利用电磁辐射旁路信号检测集成电路芯片中硬件木马的可行性,分析了芯片电磁旁路信号的组成,构建了信号泄漏模型。在阐释霍特林（K-L）变换原理及特点的基础上,提出了利用K-L变换对芯片电磁辐射旁路信号进行信号特征提取的方法,分析含硬件木马芯片（木马芯片）与不含硬件木马芯片（原始芯片）对应特征信号的差异来检测芯片中是否含有硬件木马。通过在针对基于FPGA密码芯片中植入硬件木马并进行对比检测实验的结果表明,利用上述方法能有效分辨出木马芯片与原始芯片所泄漏电磁信号间的差异,达到检测出芯片中硬件木马的目的。     

Automatic optical inspection system for IC molding surface

Success or failure of an IC product hinges on the quality of molding process which protects chips from the harm done by external force and moisture. Defects such as cracks, dilapidations or voids may be embedding on the molding surface while a chip was being molded. Human inspection often neglects a very tiny crack or a low-contrast void. Hence an automatic optical inspection system for the integrated circuit (IC) molding surface cannot be over emphasized. The proposed system is composed of a charged coupled device, a coaxial light, a back light and a motion control unit. Based on the characteristics of statistical textures of the molding surface, a series of digital image processing is carried out, including normalization, shrinking, segmenting and Fourier based image restoration and defect identification. Training of the parameter associated with defect inspection algorithm is also discussed. Results of the experiment suggest that the inspection system works effectively with high accuracy rate of 94.2 %, contributing to the inspection quality of IC molding surface.     

三维芯片中TSV链式冗余修复电路的设计与实现

由于具有高集成度、高性能及低功耗等优点,三维芯片结构逐渐成为超大规模集成电路技术中的热门研究方向之一。TSV是三维芯片进行垂直互连的关键技术,然而在TSV的制作或晶圆的减薄和绑定过程中都可能产生TSV故障,这将导致与TSV互联的模块失效,甚至整个三维芯片失效。提出了一种基于TSV链式结构的单冗余/双冗余修复电路,利用芯片测试后产生的信号来控制该修复电路,将通过故障TSV的信号转移到相邻无故障的TSV中进行传输,以达到修复失效TSV的目的。实验结果表明,该电路结构功能正确,在面积开销较低的情况下,三维芯片的整体修复率可达91.97%以上。     

基于非线性插值的IC芯片检测算法

提出把Jensen非线性插值算法用于对IC芯片引脚的长、宽及脚间距等尺寸的计算机视觉检测中，同时结合划分子区域检测策略，能使检测精度达到子象素级，检测速度达到在线检测的要求。实验证明了这种方法的可行性。     

钢板表面缺陷检测光学系统的设计

为满足钢板表面缺陷在线检测系统宽幅面、高速、高分辨率的检测要求,优化设计了钢板表面缺陷视觉检测系统的光学部分.采用了一种新型LED线光源获得高强度均匀照明,多线阵CCD拼接成像完成幅面分割.明、暗域相结合的成像模式确保了大部分缺陷的有效检出.综合考虑光源、镜头与线阵CCD的影响,计算并优化选取了光学镜头的焦距、f数和视场角等参数以满足检测需要,整个光学系统设计满足在线检测需要并在样机中得以应用.     

Toward on-chip datacenters: a perspective on general trends and on-chip particulars

Due to economical reasons, the traditional philosophy in data centers was to scale out, rather than scaling up. However, the advances in CMP technology enabled chip multiprocessors to become more prevalent and they are expected to become more affordable and power-efficient in the coming years. Current trend towards more densely packaged systems and increasing demand for higher performance push the market towards placing datacenters on highly powerful chips that have many cores on a single platform. However, increasing the number of cores on a single chip brings along very important problems to be addressed at the chip level regarding the use of shared resources and QoS satisfaction. After briefly exploring current datacenter perspective, this paper captures the current state of the art in the field of chip multiprocessors through a detailed discussion of different studies that pave the way to the datacenters on-chip. Finally, a number of open research issues are highlighted with the intention of inspiring new contributions and developments in the field of datacenters on-chip.     

Wafer‐scale monolithic hybrid integration of Si‐based IC and III–V epi‐layers—A mass manufacturable approach for active matrix micro‐LED micro‐displays

Hybridization of silicon integrated circuits (ICs) with compound semiconductor device arrays are crucial for making functional hybrid chips, which are found to have enormous applications in many areas. Although widely used in manufacturing hybrid chips, the flip‐chip technology suffers from several limitations that are difficult to overcome, especially when the demand is raised to make functional hybrid chips with higher device array density without sacrificing the chip footprint. To address those issues, Beida Jade Bird Display Limited has developed its unique wafer‐level monolithic hybrid integration technology and demonstrated its advantages in making large‐scale hybrid integration of functional device arrays on Si IC wafers. Active matrix micro‐light‐emitting diode micro‐displays with a resolution of 5000+ pixel per inch were successfully fabricated using Beida Jade Bird Display Limited's monolithic hybrid integration technology. The general fabrication method is described, and the result is presented in this paper. The fabricated monochromatic micro‐light‐emitting diode micro‐displays exhibit improved device performance than do other micro‐display technologies and have great potentials in applications such as portable projectors and near‐to‐eye projection for augmented reality. More importantly, the wafer‐scale monolithic hybrid integration technology offers a clear path for low‐cost mass production of hybrid optoelectronic IC chips.     

SO型元件贴装过程中的视觉形位检测

针对不同的IC封装类型,在贴片机系统中需要一种能够高效地对IC元件进行形位检测的视觉检测系统,以保证其能够快速准确地完成贴装任务;介绍了一种针对SO型元件在贴装过程中的形位检测方法;实验结果表明该方法可以满足中高速贴片机的精度和速度要求;通过区分引脚的细长度方向将两边带引脚推广到四边带引脚,该方法对QFP、QFN等封装类型的形位检测也是有效的。     

不对称光阑对相干衍射成像缺陷检测效果的影响

微电子器件生产中的缺陷对于最终的产品质量是一个重大的关键因素。因此需要发展和提升一系列缺陷检测技术。无透镜的相干衍射成像技术提供了一种灵活的、高分辨的、无损的方式用于检测微电子器件的内部缺陷。然而在相干衍射成像中仍存在着一些问题。针对相位恢复过程中的孪生像问题提出了一种改变光阑形状的方法。仿真表明这种方法是可行的。仿真还表明这种改变光阑形状的方法有更快的收敛速度。不仅如此,这种新的改进对迭代过程中的光阑尺寸误差也不敏感。这将为相干衍射成像用于测量奠定技术基础。     

Automated visual inspection in the semiconductor industry: A survey

Automated visual inspection is an image-processing technique for quality control and production line automation. This paper reviews various optical inspection approaches in the semiconductor industry and categorize the previous literatures by the inspection algorithm and inspected products. The vision-based algorithms that had been adopted in the visual inspection systems include projection methods, filtering-based approaches, learning-based approaches, and hybrid methods. To discuss about the practical applications, the semiconductor industry covers the manufacturing and production of wafer, thin-film transistor liquid crystal displays, and light-emitting diodes. To improve the yield rate and reduce manufacturing costs, the inspection devices are widely installed in the design, layout, fabrication, assembly, and testing processes of production lines. To achieve a high robustness and computational efficiency of automated visual inspection, interdisciplinary knowledge between precision manufacturing and advanced image-processing techniques is required in the novel system design. This paper reviews multiple defect types of various inspected products which can be referenced for further implementations and improvements.     

A feasibility study of ic chip wire bond inspection

Product inspection, which is an important step in industrial manufacturing, has depended on human inspectors whose performance is generally inadequate and variable. In the past few years, automated machines for wire bonding have been developed and integrated in the production of quality IC chips for the electronic industry. However, inspection of the wire bonds has not been automated as yet. This article describes a feasibility study for the automated visual inspection of IC chip wire bonds conducted in the Computer Vision Research Laboratory at Arizona State University. Both the system setup and algorithms for detecting some of the typical wire bonding defects such as ball bond, stitch bond placement, and size defects, and connecting wire defects such as missing and shorted wires using two-dimensional digital images are described.     

Flip chip solder bump inspection using vibration analysis

Flip chip technology is an attractive choice for high-density packaging and complex microsystem architectures. A critical element in the successful application of flip chip technology is the reliability of solder bumps. In this paper a nondestructive detection method is presented for the flip-chip solder bump inspection using ultrasonic excitation and vibration analysis. Simulations are implemented to explore the feasibility of this method, and experimental investigations are also performed, where the flip chips are excited by continuous ultrasonic waves and their vibration velocities are measured by a laser scanning vibrometer for further analysis. The results reveal that the defective chips can be distinguished from the good chips by the chip vibration velocities with the feature coefficient α, which proves the effectiveness of this method. Therefore, it may provide a new path for the improvement and innovation of flip chip on-line inspection systems.     

CMOS technology trends and economics

CMOS has become the mainstream IC technology. Extending well into the sub-0.1-μm regime, its potential provides enormous chip complexities for integration of complete systems on one chip. A number of general trends in the development and manufacturing of CMOS technologies and ICs are discussed. It is argued that unrestricted availability of this technology is of strategic importance for the European high-technology industry. Exploding development costs and investments per technology generation require global cooperation, particularly for the relatively small European IC manufacturers to survive in this key technology. Trends in the development of 64-Mb and 256-Mb DRAMs, optical lithography processes, multilayer resist technologies, retrograde-well structures for CMOS device isolation, low-resistive and dense interconnection systems with low capacitances and silicon-on-insulator technology for the development of CMOS devices are described     

IC真实缺陷的边界提取和缺陷尺寸与形状的表征

为了对ＩＣ制造中真实多余物缺陷进行分类与识别,ＩＣ多余物缺陷的特征提取是非常重要的一步,文中首先提出一种基于数学形态学的ＩＣ真实多余物缺陷边界的检测方法,其次对边界进行了链码描述,最后对边界所表示的多余物缺陷进行了尺寸测量与形状分析,在预处理阶段,利用彩色ＨＳＶ模型分割原ＩＣ图像,然后用图形学开运算消除背景噪音,对开后的结果图像进行形态膨胀及形态腐蚀运算,消除多余物缺陷中的小洞噪音以获得从复杂背景     

基于二值投影的PCB元件安装缺陷检测算法研究

研究分析了适用于AOI设备的PCB表面安装元件的缺陷检测算法.使用二值投影分析方法对2种元件类型的缺陷检测方法进行了研究,包括针对贴片电阻电容类型的chip元件和集成电路芯片类型的IC元件的缺陷检测方法.使用VC++6.0编写MFC程序实现算法,并制作了各种元件图像进行实验测试.实验结果表明,提出的方法能够快速有效的对两种类型的元件安装缺陷进行检测.     

印刷品缺陷检测的初步方案

印刷品缺陷检测技术有着重要的实际意义。介绍了基于数字图像处理的印刷品缺陷检测系统的设计,并对主要模块即图像采集及预处理、模板制作、图像对准、缺陷检测进行了分析研究。实验结果表明,充分考虑人眼视觉特性,将动态阈值法引入缺陷检测,能够显著提高印刷质量检测系统的检测精度。