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通过对Schaake和Chen腐蚀剂在HgCdTe外延材料(111)B面腐蚀坑特性的研究,揭示了HgCdTe液相外延材料中的缺陷特征及其密度分布规律.深度腐蚀实验显示外延材料中确实存在着通常认为的具有定向穿越特性的穿越位错.将两种腐蚀剂作用于同一样品后发现,Schaake和Chen腐蚀剂形成的具有穿越特性的腐蚀坑有一一对应的关系.除了穿越位错外,在两种腐蚀方法揭示出的腐蚀坑中都还存在着一种不具备穿越特性的腐蚀坑,两者在密度分布以及界面处密度增值方面具有相同的特性,但前者在宏观缺陷附近密度出现明显的增值,而后者则没有出现类似的现象. 相似文献
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通过对Schaake和Chen腐蚀剂在HgCdTe外延材料(111)B面腐蚀坑特性的研究,揭示了HgCdTe液相外延材料中的缺陷特征及其密度分布规律.深度腐蚀实验显示外延材料中确实存在着通常认为的具有定向穿越特性的穿越位错.将两种腐蚀剂作用于同一样品后发现,Schaake和Chen腐蚀剂形成的具有穿越特性的腐蚀坑有一一对应的关系.除了穿越位错外,在两种腐蚀方法揭示出的腐蚀坑中都还存在着一种不具备穿越特性的腐蚀坑,两者在密度分布以及界面处密度增值方面具有相同的特性,但前者在宏观缺陷附近密度出现明显的增值,而后者则没有出现类似的现象. 相似文献
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通过对材料减薄,并采用红外透射显微镜观察的手段,实现了对A面和B面腐蚀坑的同时观察.结果发现采用标准腐蚀剂在同一晶片的(111) A和(111) B面上形成的腐蚀坑大都不存在对应关系,深度腐蚀的实验也发现,表面腐蚀坑所对应的缺陷只局限于10μm的表层内,这表明大部分腐蚀坑所对应的不是通常认为的穿越位错. 进一步分析的结果表明,不同腐蚀剂形成的腐蚀坑所对应的缺陷有可能是不同类型的位错,甚至也可能起源于微沉淀物,通常将碲锌镉材料的腐蚀坑所对应的缺陷简单地归结为材料的位错是缺乏实验依据的. 相似文献
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大面积、高质量碲锌镉单晶是制备碲镉汞红外焦平面器件的理想衬底材料,而腐蚀法是常用的揭示碲锌镉晶体缺陷和评价晶体质量的方法之一。对碲锌镉晶体常用的Nakagawa、Everson、EAg1和EAg2四种腐蚀剂在碲锌镉材料(111)晶面上的腐蚀坑坑形进行了研究,结果发现,EAg2腐蚀剂在(111)B面上的腐蚀坑为平底坑,Everson腐蚀剂在 (111)B面上产生的腐蚀坑包括平底坑和带有不同倾斜方向坑底的三角锥形坑,进一步的研究还表明,三角锥形坑并未沿着坑底的倾斜方向向下延伸。实验中也首次观察到了EAg腐蚀剂的黑白平底坑。对常用腐蚀剂的坑形特性研究,将有助于更好地利用腐蚀剂开展碲锌镉材料缺陷研究和晶体质量评价工作。 相似文献
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通过研究碲锌镉衬底(112)B面缺陷腐蚀坑和(111)B面缺陷腐蚀坑之间的关系,揭示了(112)B面腐蚀坑与材料缺陷之间的关系。结果显示,Everson腐蚀剂在碲锌镉材料(112)B面上揭示的棒状腐蚀坑起源于材料中的体缺陷,或由延伸缺陷腐蚀坑在缺陷终止后演变而成,三种典型形状的锥形腐蚀坑分别来自延伸方向为110、112和123的延伸缺陷。研究结果同时显示,Everson腐蚀剂对部分取向的延伸缺陷所形成的腐蚀习性面在(112)B表面不能构成锥形腐蚀坑,通过观察(112)B面锥形坑随腐蚀深度发生横向移动的方向,进一步证实Everson腐蚀剂只能揭示延伸方向位于(112)极图上[011]和[101]连线附近区域的延伸缺陷。基于上述实验结果,文章进一步讨论了(112)B面Everson腐蚀坑密度与材料缺陷密度的关系,其结果将有助于碲镉汞分子束外延识别源自衬底的材料缺陷,并对碲锌镉(112)B衬底的质量进行更好的控制。 相似文献
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跟踪观察了Everson腐蚀剂在碲锌镉晶体(111)B面形成的腐蚀坑的形貌特征和空间延伸特性,并分析了各种腐蚀坑所对应的缺陷的特征.研究表明:碲锌镉材料的腐蚀坑具有三角锥型坑、平底三角坑、彗星状腐蚀坑和不规则腐蚀坑4种类型,其中三角锥型坑的坑尖又有5种不同的空间取向.彗星状腐蚀坑、三角锥型坑和不规则腐蚀坑具有定向移动特性.这表明这类腐蚀坑所对应的缺陷与材料的位错相关,但其穿越深度都不超过18μm,即缺陷同时具有局域化的特性.没有观测到平底三角坑的空间延伸特性,其所对应的缺陷可能是材料中的微沉淀缺陷.研究还发现:对于不同样品,各类腐蚀坑的数量和比例可有很大差异.而且,有些腐蚀坑所揭示的缺陷在被观察位置已经消失.因此,简单地用腐蚀坑密度(EPD)来描述碲锌镉材料表面缺陷密度和性能是不准确的. 相似文献
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P. Lamarre C. Fulk D. D’Orsogna E. Bellotti F. Smith P. LoVecchio M. B. Reine T. Parodos J. Marciniec S. P. Tobin J. Markunas 《Journal of Electronic Materials》2009,38(8):1746-1754
Dislocations are known to influence the electrical and optical properties of long-wavelength infrared (LWIR) HgCdTe detectors
and have been shown to limit the performance of arrays fabricated on heteroepitaxial substrates. To help better understand
dislocations in HgCdTe, a new method for preparing HgCdTe diagnostic epitaxial single-crystal samples by chemically removing
the supporting CdZnTe substrate has been developed. Using this new sample preparation technique, the behavior of misfit and
threading dislocations in HgCdTe epitaxial layers has been investigated by using a defect etch to reveal the dislocations
present in the thin HgCdTe films. In most cases etch pits on the surface of the film are spatially correlated with etch pits
on the bottom of the HgCdTe film. The small displacements of the related etch pits were used to obtain crystallographic information
concerning the paths followed by threading dislocations on allowed slip planes in the HgCdTe crystal. In addition, transmission
electron microscopy (TEM) is used to obtain more specific information regarding the Burgers vector of the dislocation. While
this new sample preparation technique is useful for studying dislocations in HgCdTe epitaxial layers, it can also be used
to study stress from ohmic contacts and passivation layers. The technique can be used for both liquid-phase epitaxy (LPE)-
and molecular-beam epitaxy (MBE)-grown HgCdTe on CdZnTe substrates. 相似文献
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High precision bulk micromachining of silicon is a key process step to shape spatial structures for fabricating different type of microsensors and microactuators. A series of etching experiments have been carried out using KOH, TMAH and dual doped TMAH at different etchant concentrations and temperatures wherein silicon, silicon dioxide and aluminum etch rates together with <100> silicon surface morphology and <111>/<100> etch rate ratio have been investigated in each etchant. A comparative study of the etch rates and etched silicon surface roughness at different etching ambient is also presented.From the experimental studies, it is found that etch rates vary with variation of etching ambient. The concentrations that maximize silicon etch rate is 3% for TMAH and 22 wt.% for KOH. Aluminum etch rate is high in KOH and undoped TMAH but negligible in dual doped TMAH. Silicon dioxide etch rate is higher in KOH than in TMAH and dual doped TMAH solutions. The <111>/<100> etch rate ratio is highest in TMAH compared to the other two etchants whereas smoothest etched silicon surface is achieved using dual doped TMAH. The study reveals that dual doped TMAH solution is a very attractive CMOS compatible silicon etchant for commercial MEMS fabrication which has superior characteristics compared to other silicon etchants. 相似文献
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Traces of HgCdTe Defects as Revealed by Etch Pits 总被引:2,自引:0,他引:2
The characteristics of defects in HgCdTe liquid-phase epitaxy (LPE) epilayers were investigated by using Schaake’s and Chen’s
etches. By tracking the etch pits (EP), two kinds of threading dislocations with <110> and <211> orientations were observed
for the first time in HgCdTe LPE epilayers. They are ascribed to perfect 60 deg dislocation and Shockley partial screw dislocations.
The kinds of dislocation etch pits revealed by Schaake’s and Chen’s etches were experimentally confirmed to be correlated
one-to-one. In addition to the threading dislocation etch pits, another kind of etch pits without the threading feature was
also observed using both etch methods. The density of the nonthreading etch pits increases in the regions close to epilayer-substrate
interfaces, scratched areas, and melt droplets. The etch pit density (EPD) varies from 104 cm−2 to 107 cm−2 from sample to sample or at different places on the same sample, indicating that they are correlated to stresses and should
be considered in the assessment of HgCdTe epilayers. 相似文献
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Heinrich Figgemeier Martin Bruder Karl-Martin Mahlein Richard Wollrab Johann Ziegler 《Journal of Electronic Materials》2003,32(7):588-591
HgCdTe detector performance and yield are strongly dependant on CdZnTe substrate and HgCdTe epilayer properties, and on key
device processes, especially for 8–12 μm application. Due to the correlation and optimization between these figures and diode
performance, AIM has developed a mature HgCdTe technology for superior detector performance and high production rate. To meet
high yield and performance for long wavelength (LW) HgCdTe diodes, dislocation densities of < 1 × 10t cm−2 both in substrate and epilayer have to be ensured. By a unique AIM substrate growth process, dislocation densities of 2 ×
104-9 × 104 cm−2 are achieved for all substrates and epilayers (100% yield). The etch pit density (EPD) on 〈111〉 epilayers is revealed by
an AIM proprietary etching procedure. One critical effect is the dislocations in the diode area, which can originate from
the substrate and epilayer growth and the subsequent device processes, respectively. Our studies have shown that device processes
can cause additional dislocations in the diode area.
Diode yield was clearly improved by a combination of wet and dry etching for diode contact etching. 相似文献
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用原子力显微镜和扫描电镜研究GaN外延层中的位错腐蚀坑 总被引:1,自引:1,他引:0
用原子力显微镜和扫描电镜相结合的方法表征了KOH腐蚀后的Si掺杂GaN外延层中的位错腐蚀坑.根据腐蚀坑的不同形状和在表面的特定位置可将其分成三种类型,它们的起源可由一个关于腐蚀机制的模型加以解释.纯螺位错易于沿着由它结束的表面阶梯被腐蚀,形成一个小的Ga极性面以阻止进一步的纵向腐蚀,因而其腐蚀坑是位于两个表面阶梯交结处的截底倒六棱椎.纯刃位错易于沿位错线被腐蚀,因而其腐蚀坑是沿着表面阶梯分布的尖底倒六棱椎.极性在GaN的腐蚀过程中起了重要作用. 相似文献
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