共查询到19条相似文献,搜索用时 578 毫秒
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以FPGA和QUARTUS为基础平台的EHW环境实现 总被引:4,自引:0,他引:4
在讨论了EHW运行机制的基础上,论述了基于FPGA芯片和QUARTUS Ⅱ开发工具的EHW平台,详细介绍了Tcl脚本语言以及利用批处理技术实现VHDL程序自动处理和配置数据流文件自动下载的具体技术方法。进而,设计并实现了能以闭环方式进行系统演化的实验环境,并在此基础上有效地进行了多种演化策略和进化方式的研究。 相似文献
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基于动态可重构FPGA的自演化硬件概述 总被引:3,自引:0,他引:3
演化硬件研究如何利用遗传算法进行硬件自动设计,或者设计随外界环境变化而自适应地改变自身结构的硬件,在电子设计自动化、自主移动机器人控制器、无线传感器网络节点等领域都有潜在的应用价值. 自演化硬件是在硬件内部完成遗传操作和适应度计算,利用支持动态部分可重构的FPGA芯片上的微处理器核实现遗传算法,模拟生物群体演化过程搜索可能的电路设计并配置片上的可重构逻辑,找到最优或较优的设计结果,从而实现自适应硬件. 当电路发生故障时,自演化硬件自动搜索新的配置,利用片上冗余资源取代故障区域,从而实现自修复硬件. 介绍了基于动态部分可重构FPGA的自演化硬件的基本思想、体系结构以及研究现状,总结并提出了亟待解决的关键技术,指出高效的电路染色体编码表示与可重构逻辑配置位串之间的映射方式是当前研究的重点之一. 相似文献
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基于虚拟可重构电路的演化平台设计 总被引:1,自引:0,他引:1
在讨论了电磁仿生和演化硬件内进化运行机制的基础上,针对复杂电磁环境下电子系统的可靠性问题进行研究.为实现系统功能自修复,引进虚拟可重构电路技术,设计并实现了演化平台.在传统CGP模型上改进加入(1+λ)演化策略,采用内进化方式,完成了2位乘法器的演化,实验得出的平均演化代数约在550代左右,证明了此平台的可行性和快速性.从而为研究电路的演化生成和自修复工作提供有效的实验环境,为提高电子系统在复杂电磁环境下的抗扰和防护能力验证了新的途径. 相似文献
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一种实现演化硬件的软硬件协同工作模式 总被引:1,自引:0,他引:1
演化硬件是一个新兴的研究领域。文章讨论了演化硬件的基本原理,提出了演化硬件实现的四个条件,并对广泛用于实现演化硬件的一种FPGA-XC6200就其特点和结构以及它在实现演化硬件中的应用进行了介绍,并基于这种FPGA芯片给出了一种演化硬件的软硬件协同工作模式。文章最后就演化硬件进一步的研究方向进行了一个总结。 相似文献
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用遗传算法实现逻辑函数的化简 总被引:3,自引:2,他引:3
在硬件设计中引入演化计算,在可编程逻辑器件上通过对基本硬件元器件进行演化而自动生成人工难以设计出的硬件结构,称为演化硬件设计。代数法和卡诺图法用来化简给定的逻辑函数,但它们难以化简规模很大的逻辑函数。这里用演化硬件设计方法实现了区别于传统的代数化简法和卡诺图化简法的一种新的对给定的某一逻辑函数进行化简的方法。实验表明演化硬件设计方法能够化简规模很大的逻辑函数。 相似文献
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一种CPU芯片硬件验证调试平台的设计与实现 总被引:7,自引:0,他引:7
给出了CPU芯片硬件验证调试平台的一种具体设计方案.该验证调试平台在设计方法上采用了程序性在线测试方法.该平台构建了CPU芯片的运行环境,能够控制CPU芯片输入脉冲单拍/多拍或连续运行,并且在CPU芯片的运行过程中可以监测CPU芯片内部寄存器的内容.该平台的实现不仅有益于CPU芯片的设计和调试,而且能够作为CPU芯片设计教学系统以及嵌入式系统开发平台. 相似文献
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Real-world applications of analog and digital evolvable hardware 总被引:1,自引:0,他引:1
Higuchi T. Iwata M. Keymeulen D. Sakanashi H. Murakawa M. Kajitani I. Takahashi E. Toda K. Salami N. Kajihara N. Otsu N. 《Evolutionary Computation, IEEE Transactions on》1999,3(3):220-235
In contrast to conventional hardware where the structure is irreversibly fixed in the design process, evolvable hardware (EHW) is designed to adapt to changes in task requirements or changes in the environment, through its ability to reconfigure its own hardware structure dynamically and autonomously. This capacity for adaptation, achieved by employing efficient search algorithms based on the metaphor of evolution, has great potential for the development of innovative industrial applications. This paper introduces EHW chips and six applications currently being developed as part of MITI's Real-World Computing Project; an analog EHW chip for cellular phones, a clock-timing architecture for Giga hertz systems, a neural network EHW chip capable of autonomous reconfiguration, a data compression EHW chip for electrophotographic printers, and a gate-level EHW chip for use in prosthetic hands and robot navigation 相似文献
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Emanuele Stomeo Tatiana Kalganova Cyrille Lambert 《IEEE transactions on systems, man, and cybernetics. Part B, Cybernetics》2006,36(5):1024-1043
Evolvable hardware (EHW) refers to self-reconfiguration hardware design, where the configuration is under the control of an evolutionary algorithm (EA). One of the main difficulties in using EHW to solve real-world problems is scalability, which limits the size of the circuit that may be evolved. This paper outlines a new type of decomposition strategy for EHW, the "generalized disjunction decomposition" (GDD), which allows the evolution of large circuits. The proposed method has been extensively tested, not only with multipliers and parity bit problems traditionally used in the EHW community, but also with logic circuits taken from the Microelectronics Center of North Carolina (MCNC) benchmark library and randomly generated circuits. In order to achieve statistically relevant results, each analyzed logic circuit has been evolved 100 times, and the average of these results is presented and compared with other EHW techniques. This approach is necessary because of the probabilistic nature of EA; the same logic circuit may not be solved in the same way if tested several times. The proposed method has been examined in an extrinsic EHW system using the (1 + lambda) evolution strategy. The results obtained demonstrate that GDD significantly improves the evolution of logic circuits in terms of the number of generations, reduces computational time as it is able to reduce the required time for a single iteration of the EA, and enables the evolution of larger circuits never before evolved. In addition to the proposed method, a short overview of EHW systems together with the most recent applications in electrical circuit design is provided. 相似文献
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Evolvable hardware (EHW) combines the powerful search capability of evolutionary algorithms with the flexibility of reprogrammable devices, thereby providing a natural framework for reconfiguration. This framework has generated an interest in using EHW for fault-tolerant systems because reconfiguration can effectively deal with hardware faults whenever it is impossible to provide spares. But systems cannot tolerate faults indefinitely, which means reconfiguration does have a deadline. The focus of previous EHW research relating to fault-tolerance has been primarily restricted to restoring functionality, with no real consideration of time constraints. In this paper, we are concerned with EHW performing reconfiguration under deadline constraints. In particular, we investigate reconfigurable hardware that undergoes intrinsic evolution. We show that fault recovery done by intrinsic reconfiguration has some restrictions, which designers cannot ignore. 相似文献
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Yasser Baleghi Damavandi Karim Mohammadi 《Computers & Mathematics with Applications》2009,57(11-12):1730
Evolvable Hardware (EHW) is a new concept that applies evolutionary algorithms to hardware design. Based on previous work on co-evolutionary communication of EHW modules, this paper investigates the new feature of fault tolerance for this model. A fault model is built for the communication line between EHW modules. The experiment demonstrated in the presentation is the simulation of injecting stuck/bridging faults into an EHW-based serial adder that has been previously developed. The outcomes imply an outstanding feature of fault tolerance in this system with 100% fault coverage, which paves the way for bio-inspired approaches to fault tolerant design instead of the classic ones. 相似文献
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演化硬件研究将进化思想应用于电子系统内部结构的设计和调整,以实现硬件电路的自组织、自适应和自修复,从而提高系统的可靠性.介绍演化硬件的概念、基本原理和实现方法,指出目前研究存在的主要问题,给出进一步研究的设想与建议. 相似文献
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演化硬件以其速度快、灵活性强、实时适应等特点,在模式识别应用中易于建立学习时间短、识别速度快、精确分类的高效识别系统。在论述基于演化硬件模式识别技术的体系结构基础上,总结了不同的演化模型和各自的特性,并对各模型适合的应用领域进行了对比分析。介绍了国内外演化硬件模式识别技术研究的主要方向和发展现状,讨论了演化硬件在模式识别应用中的未来发展趋势和亟需解决的问题。 相似文献