倒装焊陶瓷封装失效模式分析及失效机理研究

随着封装技术的发展,倒装焊技术得到广泛的应用,倒装焊的研究也越来越广泛深入。文章阐述了倒装焊封装的失效模式,主要有焊点疲劳失效、填充胶分层开裂失效、电迁移失效、腐蚀失效、机械应力失效等。并分析了陶瓷基板倒装焊温度循环试验后的失效模式,陶瓷倒装焊封装失效的机理主要是倒装芯片焊点与UBM界面金属间化合物应力开裂失效。根据失效机理分析,进行陶瓷倒装焊工艺优化改进,试验达到了JESD22-A104C标准规定的温度循环:-65℃～+150℃、500次循环、3只样品无失效的要求。     

塑封倒装焊器件DPA试验流程研究

倒装焊器件与常规的引线键合结构不同,现行的DPA标准不能完全适用于倒装焊结构.结合现有标准和倒装焊器件结构特点,以某塑封倒装焊集成电路器件为例,提出一套经过试验验证的、实用性强的倒装焊器件DPA试验流程.在原来标准的基础上提出了对BGA焊球材料成分分析、底充胶检查的超声扫描要求、芯片凸点结构检查等一些新的DPA要求.BGA焊球材料成分分析是使用能谱分析实现的,而芯片凸点结构检查则是通过对器件进行研磨开封实现的.经过试验验证,该流程方案可用于倒装焊集成电路器件的实际DPA工作.     

硅基梳齿式MEMS器件及封装的失效调查

对典型硅基梳齿式MEMS器件进行失效调查和分析,验证其主要失效模式,分析其失效机理.利用电子扫描显微镜(SEM),X射线透视系统、扫描声学显微镜(SAM),X射线能谱成份分析(EDX)、金相切片分析、封装气体分析及电性能测试等分析技术,发现在工艺制造中的机械失效是造成此类器件失效的主要原因.另外,此类器件的封装失效主要表现为气密性失效和装配工艺失效.     

FCBGA封装集成电路在实际应用中的失效研究

FCBGA封装集成电路在实际应用中会出现多种多样的失效模式和失效机理。介绍了在FCBGA封装集成电路失效分析中常用的检测设备与技术,包括X射线检测系统、声学扫描显微镜、 OBIRCH背面定位技术和扫描电子显微镜等,并结合实际应用中的失效案例,对芯片开裂、凸点重熔、凸点开裂和过电应力4种失效机理展开了分析,为后续FCBGA封装集成电路的失效分析提供了参考方向。     

3D-MCM的X射线检测分析

X射线检测技术是一种能对不可视部位进行检测的技术。本文利用X射线对3D—MCM中的BGA焊点、基板和隔板之间的焊料凸点、叠层基板间的垂直互连和陶瓷-金属封装等进行检测;对存在于焊点和凸点中的气孔、垂直互连中的开路和封装中的孔洞等进行了分析。     

倒装焊器件封装结构设计

倒装焊是今后高集成度半导体的主要发展方向之一。倒装焊器件封装结构主要由外壳、芯片、引脚(焊球、焊柱、针)、盖板(气密性封装)或散热片(非气密性封装)等组成。文章分别介绍外壳材料、倒装焊区、频率、气密性、功率等方面对倒装焊封装结构的影响。低温共烧陶瓷(LTCC)适合于高频、大面积的倒装焊芯片。大功率倒装焊散热结构主要跟功率、导热界面材料、散热材料及气密性等有关系。倒装焊器件气密性封装主要有平行缝焊或低温合金熔封工艺。     

集成电路封装级失效及其定位

失效分析中有许多类型的封装级失效.由于封装材料限制或者无损检测要求,无法从外观直接观察到失效点,需要借助于设备进行失效定位才能快速、准确地进行分析.总结了集成电路封装级失效的几种常见失效机理和失效原因,提出三种有效的分析手段和分析方法进行失效定位:X射线检测、超声扫描声学显微镜以及热激光激发光致电阻变化(OBIRCH)技术,分别用于元器件结构观察、不同材料界面特性分析和键合损伤位置定位.从倒装芯片封装、陶瓷封装、塑料封装和金铝键合短路四个失效分析的实际案例出发,阐明三种封装级失效定位手段应用的领域、特点和局限性.结果表明在封装级失效中,通孔断裂开路、焊料桥连短路、键合损伤和界面分层等缺陷能够准确地被定位进而分析.     

3.4 GHz频率的S波段SAW滤波器

该文研制了一款频率3.4 GHz的S波段声表面波(SAW)滤波器.该滤波器采用一种由新型谐振器构成的阻抗元结构,能提升抗热释电静电损伤能力,用时可在一定程度上提升器件的功率承受能力.同时研制了尺寸为2.0 mm×1.6 mm的芯片级封装(CSP)基板.采用倒装焊工艺实现了芯片与CSP基板的电连接,降低了电磁寄生影响.结...     

倒装焊结构对太赫兹对数周期天线的影响（英文）

设计了一种倒装焊结构,用于340 GHz的肖特基二极管探测器.探测单元是基于砷化镓(GaA s)工艺设计的.薄膜陶瓷支撑层旨在为太赫兹检测单元提供封装.通常,导电胶用作天线和输出电路之间的附接.分别对倒装焊结构和无倒装焊结构(类引线键合结构)模型对太赫兹接收天线性能的影响进行研究.为了比较的目的,使用相同的测试系统表征FC结构模型和无FC结构模型(引线键合结构).通过引线键合与倒装焊测试增益的结果比较,表明倒装焊结构可以作为大规模太赫兹检测阵列封装的低成本解决方案.     

圆片级封装的板级跌落可靠性研究

圆片级封装(WLP)具有尺寸小、散热性能好、封测成本低等优点,广泛应用于便携式电子产品,其在跌落、碰撞等环境下的可靠性越来越受到重视。将WLP器件组装到PCB基板上,按照JEDEC电子产品板级跌落实验标准进行实验,研究了WLP元件引脚节距、焊球尺寸、PCB焊盘工艺等因素对样品可靠性的影响。对失效样品进行了切片制样,通过金相显微镜、能量色散X射线光谱(EDX)和扫描电子显微镜进行了分析,研究了WLP器件失效机理及其与器件焊球尺寸、节距之间的关系,讨论了底部填充料对WLP封装可靠性的改进作用。     

陶瓷封装倒装焊器件Sn-Pb微焊点的电迁移行为

高密度陶瓷封装倒装焊器件的焊点尺寸已降低至100μm以下,焊点电流密度达到10~4 A/cm~2以上,由此引发的电迁移失效成为不可忽视的问题。以陶瓷封装菊花链倒装焊器件为研究对象,开展了Sn10Pb90、Sn63Pb37焊点热电环境可靠性评估试验,通过电连接检测及扫描电子显微镜(SEM)等方法对焊点互连情况进行分析。结果表明,Sn63Pb37焊点阴极侧金属间化合物(IMC)增长明显,表现出明显的极化现象,IMC厚度的平方与通电时间呈线性关系。通电时间达到576 h后Sn63Pb37焊点阴极侧产生微裂纹,而Sn10Pb90焊点在通电576 h后仍未出现异常,表现出优异的电迁移可靠性。研究结果对于直径100μm微焊点的陶瓷封装倒装焊器件的应用具有重要的意义。     

Flip-chip packaging solution for CMOS image sensor device

Chip scaled opto-electronic packaging is introduced as a cost and size effective packaging solution for mobile phone with built in camera. The chip scaled assembly includes gold bumped CMOS image sensor device and its flip-chip bonding on substrate using the anisotropic conductive material. Two types of flip-chip module were designed to have flip-chip on flex and flip-chip on glass. It is shown that well controlled bumping process of thin film deposition and wet etching gives no damage to image sensing surface during the deposition and stripping of metal film. As results, smart and high degree miniaturized image sensor module is actualized for mobile phone and the reliability test results proved the robustness of module structure having flip-chip. Solder bumping was also reviewed and successfully introduced to verify the alternative of image sensor bumping.     

超声扫描显微镜检查在倒装器件检测中的应用

随着倒装器件在型号产品中使用越来越广泛,倒装器件在使用过程中也暴露出一些问题,如底充胶分层、焊点空洞以及裂纹等,这些缺陷均能导致倒装器件失效。总结了几种倒装器件超声扫描的缺陷,重点对底充胶以及焊点进行分析。同时,论述了倒装器件超声检测中内部界面缺陷的辨别以及原理。     

倒装焊器件的密封技术

倒装焊的底部填充属非气密性封装,并且受倒装焊凸点焊料熔点、底部填充有机材料耐温限制,使得倒装焊器件的密封结构设计和工艺设计受限。文章结合气密性器件使用要求,设计了两种不改变现行倒装焊器件制造工艺、器件总体结构[3]的密封技术,经过分析论证以及工艺实验,确认其是可行的。密封的器件能够满足MIL-883G中有关气密性、内部水汽含量、耐腐蚀(盐雾)、耐湿以及机械试验等[6~7],密封结构、密封工艺均是在现有封装工艺条件基础上进行,具有非常强的可行性。     

基于LCD的扫描显微镜扫描机理

为改进扫描显微镜,提出了一个新的光电扫描方法与装置。此装置采用了一个液晶显示器(LCD),它形成偏相位空间光调制器。该电寻址液晶显示器可形成不同的衍射光学元件。利用相移,可以完全控制扫描束的位置与焦点。当它被放入扫描显微镜中试用后,发现其效果良好,这表明液晶显示器可作为扫描显示镜扫描装置的关键部件。     

No-flow underfill flip chip assembly––an experimental and modeling analysis

In the flip-chip assembly process, no-flow underfill materials have a particular advantage over traditional underfill: the application and curing of the former can be undertaken before and during the reflow process. This advantage can be exploited to increase the flip-chip manufacturing throughput. However, adopting a no-flow underfill process may introduce reliability issues such as underfill entrapment, delamination at interfaces between underfill and other materials, and lower solder joint fatigue life. This paper presents an analysis on the assembly and the reliability of flip-chips with no-flow underfill. The methodology adopted in the work is a combination of experimental and computer-modeling methods. Two types of no-flow underfill materials have been used for the flip chips. The samples have been inspected with X-ray and scanning acoustic microscope inspection systems to find voids and other defects. Eleven samples for each type of underfill material have been subjected to thermal shock test and the number of cycles to failure for these flip chips have been found. In the computer modeling part of the work, a comprehensive parametric study has provided details on the relationship between the material properties and reliability, and on how underfill entrapment may affect the thermal–mechanical fatigue life of flip chips with no-flow underfill.     

气密性陶瓷封装PIND失效分析及解决方案

气密性陶瓷封装腔体内的自由粒子会严重影响到器件的可靠性。减少封装腔体内自由粒子数量,提高PIND合格率是气密性封装的主要技术之一。文章就陶瓷外壳封装集成电路PIND失效进行了分析,指出其主要原因,如外壳内部有瓷颗粒、芯片边缘未脱落的硅碴(屑)、芯片边沿的粘接材料卷起、脱落的粘接材料碎片、键合丝(或尾丝)、悬伸的合金焊料、封帽飞溅的合金焊料、平行缝焊打火飞溅的焊屑等,并提出了在封装工艺过程中如何对可能产生自由粒子的因素采取有效预防措施。最终使电路的粒子碰撞噪声检测合格品率达到98%以上,达到实际应用要求。     

Reliability test and failure analysis of high power LED packages

A new type application specific light emitting diode(LED) package(ASLP) with freeform polycarbonate lens for street lighting is developed,whose manufacturing processes are compatible with a typical LED packaging process.The reliability test methods and failure criterions from different vendors are reviewed and compared.It is found that test methods and failure criterions are quite different.The rapid reliability assessment standards are urgently needed for the LED industry.85℃/85 RH with 700 mA is used to test our LED modules with three other vendors for 1000 h,showing no visible degradation in optical performance for our modules,with two other vendors showing significant degradation.Some failure analysis methods such as C-SAM,Nano X-ray CT and optical microscope are used for LED packages.Some failure mechanisms such as delaminations and cracks are detected in the LED packages after the accelerated reliability testing.The finite element simulation method is helpful for the failure analysis and design of the reliability of the LED packaging.One example is used to show one currently used module in industry is vulnerable and may not easily pass the harsh thermal cycle testing.     

Reliability issues for flip-chip packages

In this article, we review the reliability issues for plastic flip-chip packages, which have become an enabling technology for future packaging development. The evolution of area-array interconnects with high I/O counts and power dissipation has made thermal deformation an important reliability concern for flip-chip packages. Significant advances have been made in understanding the thermo-mechanical behavior of flip-chip packages based on recent studies using moiré interferometry. Results from moiré studies are reviewed by focusing on the role of the underfill to show how it reduces the shear strains of the solder balls but shifts the reliability concern to delamination of the underfill interfaces. The development of the high-resolution moiré interferometry based on the phase-shift technique provided a powerful method for quantitative analysis of thermal deformation and strain distribution for high-density flip-chip packages. This method has been applied to study plastic flip-chip packages and the results and impacts on delamination at the die/underfill interface and in the underfill region above the plated through-hole via are discussed. Here a related reliability problem of die cracking during packaging assembly and test is also discussed. Finally, we discuss briefly two emerging reliability issues for advanced flip-chip packages, one on the packaging effect on Cu/low k interconnect reliability and the other on electromigration of solder balls in flip-chip packages.     

扫描探针声显微镜原理及其应用

将声学检测技术与扫描探针显微术相结合,构成的扫描探针声显微镜,不仅可以检测材料表面、亚表面和内部的微小缺陷,还可以分析样品的弹性特性、电特性等物理性能,同时还具有分辨率高的特点,在材料科学和生命科学等领域具有很高的应用价值.目前,得到实际应用的扫描探针声显微镜主要有扫描隧道声显微镜和原子力声显微镜.本文介绍了这两类显微镜的基本工作原理,并对扫描探针声显微镜今后的发展方向进行了探讨.