基于CORDIC算法并行FFT设计与硬件实现

讨论了复杂128点FFT处理器的并行和旋转结构。VLSI实现FFT适用于超高速数据处理。随着新的VLSI技术的发展，高速处理和低功耗设计成为现实。使用CORDIC旋转处理器可以优化面积和速度的设计，在不降低数据处理速度的基础上，这种FFT仅仅使用了5．3万等效逻辑门。

Parallel FFT with CORDIC Design and Hardware Implementation

In this paper, the architecture of a complex 128-point FFT processor using parallel and rotation structure is presented. The FFT VLSI implementation is suitable to uhm data processing speed. With the development of new VLSI technology, the fast speed and low power are also realized. The rotated processor based on CORDIC is applied to optimize the area and speed design. The FFT only uses 53K equivalent gates without reducing the data processing speed.