Design and frequency/phase-noise analysis of a 10-GHz CMOS ring oscillator with coarse and fine frequency tuning

A 10-GHz CMOS ring oscillator that employs a multi-pass technique for boosting its frequency is proposed in this paper. The proposed circuit allows the tuning gain to be lowered by deploying the coarse/fine frequency tuning whilst maintaining wide frequency coverage. The small signal model of the proposed delay stage and the circuit operation are discussed in this paper. The time-variant analysis presented permits accurate prediction of the frequency tuning characteristic and the results have been verified by simulation. The phase noise analysis is also discussed in detail to provide better insight to the noise that is contributed by each transistor. The calculated results agreed well with that of the simulations. Hai Qi Liu was born in Jiangsu, China, in 1979. He received the B.S. and M.Sc. degrees, both in electrical engineering from the Tianjin University, Tianjin, China, in 2000, and Tongji University, Shanghai, China, in 2003, respectively. He is currently working toward the Ph.D. degree at the Nanyang Technological University, Singapore. His research focuses mainly on the design of fully integrated oscillators and Phase-Locked Loops for optical communication applications. His research interests also include RF frequency synthesizers and RF front-end designs for wireless applications. Wang Ling Goh obtained both her B.Eng and Ph.D. degrees from the department of Electrical and Electronic Engineering at the Queen’s University of Belfast (QUB) in United Kingdom. When working on her Ph.D., she was also engaged as a research associate at the Northern Ireland Semiconductor Research Centre (NISRC) at QUB. Dr Goh joined the School of Electrical and Electronic Engineering at the Nanyang Technological University (NTU) in Singapore as a lecturer in January 1996. She is now an Associate Professor in the Division of Circuits and Systems, School of Electrical & Electronic Engineering. Dr Goh has to-date co-authored 1 book, filed 13 patents (granted), and published about 60 research papers in international conferences and journals. Her research interests are in areas of silicon device processing technologies as well as digital and mixed-signal IC designs. Liter Siek received the B.A.Sc. degree from University of Ottawa, Ontario, Canada; the M.Eng.Sc. from University of New South Wales, Sydney, Australia; and the Ph.D. from Nanyang Technological University, Singapore. From 1981 to 1983 he was employed in several companies in the area of automation and control. From 1983 to 1985, he was with SGS, currently known as ST Microelectronics situated in Castelletto, Milan, Italy, where he worked in the central R&D Laboratories for Linear IC. From 1985 to 1987, he was with the same company situated in Singapore’s Asia Pacific Design Center. Since October 1988, he has been with Nanyang Technological University. His research interests are in the design of bipolar, CMOS and BiCMOS analog/mixed signal ICs. In addition, he has authored and co-authored 53 international journal/conference technical papers.