| 低压低功耗模拟集成电路设计技术及展望 |
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| 引用本文： | 邹志革,邹雪城,黄峰.低压低功耗模拟集成电路设计技术及展望[J].微电子学,2006,36(1):60-65,69. |
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| 作者姓名： | 邹志革 邹雪城 黄峰 |
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| 作者单位： | 华中科技大学,电子科学与技术系,湖北,武汉,430074 |
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| 摘 要： | 低压、低功耗模拟集成电路设计受到多种因素的制约。围绕这些制约因素,回顾了国内外在模拟集成电路低压、低功耗设计领域的方法和技术的发展现状,主要涉及:轨对轨设计技术、亚阈值工作区技术、阈值电压降低技术、组合晶体管技术、横向BJT技术、SOI技术等。分析并比较了各种设计方法的优劣;并对模拟电路低压低功耗设计技术的发展趋势进行了展望。
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| 关 键 词： | 低压低功耗 模拟集成电路 轨对轨 亚阈值工作区 SOI |
| 文章编号： | 1004-3365（2006）01-0060-06 |
| 收稿时间： | 2005-04-20 |
| 修稿时间： | 2005-04-202005-06-23 |
Low-Voltage/Low-Power Technology for Analog IC's and Its Prospect |
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| ZOU Zhi-ge,ZOU Xue-cheng,HUANG Feng.Low-Voltage/Low-Power Technology for Analog IC''''s and Its Prospect[J].Microelectronics,2006,36(1):60-65,69. |
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| Authors: | ZOU Zhi-ge ZOU Xue-cheng HUANG Feng |
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| Affiliation: | Dept. of Elec. Sci. and Technol. , Huazhong University of Science and Technology, Wuhan, Hubei 430074, P. R; China |
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| Abstract: | Development of low voltage and low power design methodologies and technologies for analog IC's(around) the world is reviewed,which include rail-to-rail,subthreshold operation,threshold voltage reduction,composed transistor,lateral BJT,SOI and so on.Their advantages and disadvantages are analyzed and compared.And finally,the future development trend of the low-voltage and low-power technology for analog IC's is discussed. |
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| Keywords: | Low-power/low-voltage Analog IC Rail-to-Rail Subthreshold operation SOI |
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