| 应用于JPEG2000的5/3提升小波的VLSI结构设计 |
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| 引用本文： | 吴平,陈心浩.应用于JPEG2000的5/3提升小波的VLSI结构设计[J].光电技术应用,2006,21(2):47-50. |
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| 作者姓名： | 吴平 陈心浩 |
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| 作者单位： | 中南民族大学电子信息工程学院,湖北,武汉,430074 |
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| 摘 要： | 提出一种基于提升算法（lifting scheme）实现JPEG2000编码系统中的二维离散小波变换（Discrete Wavelet Transform）的并行阵列式的VLSI结构设计方法.该结构由一个行处理器和一个列处理器组成,行、列处理器通过时分复用同时进行滤波,用优化的移位加操作替代乘法操作,采用嵌入式数据延拓算法处理边界延拓.整个结构采用流水线设计方法,减少了运算量,提高了硬件资源利用率,该结构可应用于JPEG2000图像编码芯片中.
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| 关 键 词： | 二维离散小波变换 5/3小波提升方法 |
| 文章编号： | 1673-1255(2006)02-0047-04 |
| 修稿时间： | 2005年1月27日 |
VLSI Architecture Design of 5/3 Lifting-Based Wavelet Transform for JPEG2000 |
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| WU Ping,CHEN Xin-hao.VLSI Architecture Design of 5/3 Lifting-Based Wavelet Transform for JPEG2000[J].Electro-Optic Technology Application,2006,21(2):47-50. |
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| Authors: | WU Ping CHEN Xin-hao |
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| Abstract: | A real-time parallel array architecture is proposed to perform the discrete wavelet transform(DWT) by using 5/3 lifting scheme recommended in JPEG2000.It consists of one row processor and one column processor.And the row processor which is time-multiplexed performs in parallel with the column processor.Optimized shift-add operations are substituted for multiplications,and edge extension is implemented by embedded extension algorithm.The whole architecture which is optimized in the pipeline design way to speed up and achieve higher hardware utilization.The architecture can be used for JPEG2000 VLSI implementation. |
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| Keywords: | VLSI JPEG2000 |
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