| 面向SoC的系统级并行划分方法 |
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| 引用本文： | 徐宝宇,吴悦,杨洪斌.面向SoC的系统级并行划分方法[J].计算机工程与设计,2008,29(11):2788-2790. |
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| 作者姓名： | 徐宝宇 吴悦 杨洪斌 |
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| 作者单位： | 上海大学,计算机工程与科学学院,上海,200072 |
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| 基金项目： | 上海市应用材料研究与发展项目 |
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| 摘 要： | 为缩短复杂SoC系统的设计周期,降低系统设计的复杂性,提出了一种SoC系统级的并行划分方法.引入带有信号激活率和输入输出延时的过程模型图,为SoC系统构建模型.设计一启发式算法对该过程模型图进行并行划分,同时,该算法能解决有环图的划分问题.通过大量的实验证明,划分结果同要求吻合,说明该划分方法是可行、有效的.
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| 关 键 词： | 片上系统 过程模型图 复杂度 并行划分 启发式算法 |
| 文章编号： | 1000-7024(2008)11-2788-03 |
| 修稿时间： | 2007年6月18日 |
Method of SoC-oriented parallel partitioning at system-level |
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| XU Bao-yu,WU Yue,YANG Hong-bin.Method of SoC-oriented parallel partitioning at system-level[J].Computer Engineering and Design,2008,29(11):2788-2790. |
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| Authors: | XU Bao-yu WU Yue YANG Hong-bin |
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| Affiliation: | XU Bao-yu,WU Yue,YANG Hong-bin (School of Computer Engineering , Science,Shanghai University,Shanghai 200072,China) |
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| Abstract: | To reduce the design time of complex SoC and degree of complexity in the system design process, a method of SoC parallel partitioning at the system-level is presented. A process model graph appended rate estimation and I/O delay is introduced to model for SoC system, and a new heuristic algorithm is proposed to partition the model. At the same time, the algorithm can partition the cyclic graphs. Results from many examples show that the method is not only feasible but also effective. |
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| Keywords: | SoC process model graph complexity parallel partitioning heuristic algorithm |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
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