一种用于开关电容电路的高性能运算放大器

设计了一种高性能BCMOS全差分运算放大器.该运放采用复用型折叠式共源共栅结构、开关电容共模反馈以及增益增强技术,在相同功耗和负载电容条件下,与传统CM0S增益增强型运算放大器相比,具有高单位增益带宽、高摆率及相位裕度改善的特点.在Cadence环境下,基于Jazz 0.35μm BiCMOS标准工艺模型,对电路进行Spectre仿真.在5 V电源电压下,驱动6pF 负载时,获得开环增益为115.3 dB、单位增益带宽为161.7 MHz、开环相位裕度为77.3°、摆率为327.0 V/μm、直流功耗(电流)为1.5 mA.     

基于0．5μmCMOS工艺的一款新型BiCMOS集成运算放大器设计

为了提高运算放大器的驱动能力,依据现有CMOS集成电路生产线,介绍一款新型BiCMOS集成运算放大电路设计,探讨BiCMOS工艺的特点。在s_Edit中进行“BiCMOS运放设计”电路设计,并对其电路各个器件参数进行调整,包括M0s器件的宽长比和电客电阻的值。完成电路设计后,在Tspice中进行电路的瞬态仿真,插入CMOS,PNP和NPN的工艺库,对电路所需的电源电压和输入信号幅度和频率进行设定调整,最终在W—Edit输出波形图。在MCNC0．5μm工艺平台上完成由MOs、双极型晶体管和电容构成的运算放大器版图设计。根据设计的版图,设计出BiCMOS相应的工艺流程,并提取各光刻工艺的掩模版。     

应用于TD-LTE的SiGe BiCMOS功率 放大器的设计

针对准第四代无线通信技术TD-LTE中2.570~2.620 GHz频段的应用,设计了一款基于IBM SiGe BiCMOS7WL工艺的射频功率放大器。该功率放大器工作于AB类,采用单端结构,由两级共发射极电路级联构成,带有基极镇流电阻,除两个谐振电感采用片外元件外,其他全部元件均片上集成,芯片面积为(1.004×0.736)mm2。测试结果表明,在3.3 V电源电压下,电路总消耗电流为109 mA,放大器的功率增益为16 dB,输出1 dB增益压缩点为15 dBm。该驱动放大器具有良好的输入匹配,工作稳定。     

一种用于地面和有线接收机的宽带低噪声放大器

提出并设计了一种用于数字电视接收调谐芯片的宽带低噪声放大器.该设计采用0.35μm SiGe BiCMOS工艺,器件的主要性能为:增益等于18.8dB,增益平坦度小于1.4dB,噪声系数小于5dB,1dB压缩点为-2dBm,输入三阶交调为8dBm.在5V供电的情况下,直流功耗为120mW.     

可自校正失调电压的BiCMOS锁存比较器设计

在对传统CMOS锁存比较器分析的基础上,设计了一种可自校正失调电压的BiCMOS锁存比较器,它既具有双极型电路快速、输入失调电压低和大电流驱动能力,又具备CMOS电路低功耗和高集成度的特性,因而它们特别适用于高速缓冲数字信息系统和其它便携式数字设备.     

一种BiCMOS过热保护电路

提出了一种集成于电源管理芯片内部的过热保护电路。采用0．6μm BiCMOS工艺参数，对电路进行模拟仿真，并与先前提出的过热保护电路进行比较。结果表明，该电路具有关断和开启阈值点的准确性强、对温度灵敏度高、超低静态电流和低功耗等特点。     

A Large 16*16 IF Analog Switch Matrix for Personal Communications Satellites

A 16 input and 16 output channels single chip intermediate frequency range (160 MHz) analog switch matrix for personal communication satellites has been designed and processed by using a commercial 1.2 µm BiCMOS technology. The circuit has low power consumption (,2W) and low insertion loss with maximum output power of 0 dBm.     

Wide dynamic range parallel feedback transimpedance amplifier for 10 Gb/s optical links

This paper presents the design and implementation of a new wide dynamic range parallel feedback (PF) transimpedance amplifier (TIA) for 10 Gb/s optical links. The wide dynamic range is attributed to the novel TIA architecture employing both shunt-shunt and shunt-series feedback networks. The outstanding features of the TIA are wide dynamic range, high gain, low power consumption and design simplicity. A prototype implemented in a 0.5 μm SiGe BiCMOS technology and operating at −3.3 V power supply features an 18.4 dBm dynamic range with a BER less than 10⁻¹², an optical sensitivity of −16 dBm, optical overload of +2.4 dBm, a bandwidth of 8.27 GHz, a gain of 950 Ω and a power consumption of 189 mW. The new parallel feedback architecture offers improved overload and noise performance when compared to previously reported, state of the art, single feedback TIA designs and meets all the 10 Gigabit Ethernet and short-reach OC-192 SONET specifications. Ricardo Andres Aroca received the B.S. (Hons) degree in electrical engineering from the University of Windsor, Canada, and the M.S. degree from the University of Toronto, Canada, in 2001 and 2004, respectively. In 2000 he spent two 4 month internships with Nortel Networks in the Microelectronics Department. Mr. Aroca received the Natural Sciences and Engineering Research Counsel of Canada (NSERC) Postgraduate Scholarship award in 2002. He is currently working toward the Ph.D. degree at the University of Toronto where his research interests lie in the area of high-frequency integrated circuits for wireless and wireline communication systems. C. Andre T. Salama received the B.A.Sc. (Hons.) M.A.Sc. and Ph. D. degrees, all in Electrical Engineering, from the University of British Columbia in 1961, 1962 and 1966 respectively. From 1962 to 1963 he served as a Research Assistant at the University of California, Berkeley. From 1966 to 1967 he was employed at Bell Northern Research, Ottawa, as a Member of Scientific Staff working in the area of integrated circuit design. Since 1967 he has been on the staff of the Department of Electrical and Computer Engineering, University of Toronto where he held the J.M. Ham Chair in Microelectronics from 1987 to 1997. In 1992, he was appointed to his present position of University Professor for scholarly achievements and preeminence in the field of microelectronics. In 1989-90, he was awarded the ITAC/NSERC Research Fellowship in information technology. In 1994, he was awarded the Canada Council I.W. Killam Memorial Prize in Engineering for outstanding career contributions to the field of microelectronics. In 2000, he received the IEEE Millenium Medal. In 2003, he received the Outstanding Lifetime Achievement Award from the Canadian Semiconductor Technology Conference for seminal and outstanding contributions to semiconductor device research and promotion of Canadian University research in microelectronics. In 2004, he received the NSERC Lifetime Achievement Award of Research Excellence for outstanding and sustained contributions to the field of microelectronics and the Networks of Centres of Excellence (NCE) Recognition Award for research excellence and outstanding leadership.He was associate editor of the IEEE Transactions on Circuits and Systems in 1986–88 and a member of the International Electron Devices Meeting (IEDM) Technical Program Committeein 1980–82, 1987–89 and 1996–98. He was the chair of the Solid State Devices Subcommittee for IEDM in 1998 and was a member of the editorial board of Solid State Electronics from 1984 to 2002. He is presently a member of the editorial board of the Analog IC and Signal Processing Journal and the Technical Program Committee of the International Symposium on Power Semiconductor Devices and ICs (ISPSD) and the Technical ProgramCommittee of the International Symposium on Low Power Electronics and Design (ISLPED). He chaired the technical program committee of ISPSD in 1996 and was the general chair for the conference in 1999.Dr. Salama is the Scientific Director of Micronet, a network of centres of excellence focussing on microelectronics research and funded by the Canadian Government and Industry. He has published extensively in technical journals, is the holder of eleven patents and has served as a consultant to the semiconductor industry in Canada and the U.S. His research interests include the design and fabrication of semiconductor devices and integrated circuits with emphasis on deep submicron devices as well as circuits and systems for high speed, low power signal processing applications. Dr. Salama is a Fellow of the Institute of Electrical and Electronics Engineers, a Fellow of the Royal Society of Canada, a Fellow of the Canadian Academy of Engineering, a member of the Association of Professional Engineers of Ontario, the Electrochemical Society and the Innovation Management Association of Canada.     

一种BiCMOS过温保护电路

在分析现有过温保护电路的基础上，针对它们电路结构复杂、功耗较高、工作电压高等缺点提出了一种用于集成电路内部的采用BiCMOS工艺的过温保护电路，电路结构简单、功耗较低、工作电压低、抗干扰能力强，对温度的迟滞特性避免了热振荡对芯片带来的危害。采用0．6μm BiCMOS工艺的HSPICE仿真结果表明，该电路对因电源电压、和工艺参数变化而引起的温度迟滞特性的漂移具有很强的抑制能力。     

An 8-bit, 200 MSPS Folding and Interpolating ADC

An 8-bit, 200 MSPS folding and interpolating analog-to-digitalconverter, ADC, has been implemented in a 1.2 µmBiCMOS-process. It achieves 7.5 effective bits with a power dissipationof 575mW. The active area is 4mm². The implementationand measured results are presented. A simple analytical modelfor the interpolation-induced nonlinearity in a folding and interpolatingADC using sinusoidal folding is presented. The bowing of thereference ladder due to interaction with the input stages isanalyzed, and analytical models are derived.