多进制基带信号功率谱密度的仿真分析

随着信息技术的发展,多进制数字基带信号的应用越来越广泛.而分析其频谱特性对多进制数字基带信号的应用十分必要.以二进制数字基带信号为基础,利用交变波和稳态波分解法首先分析了三进制数字基带信号的功率谱密度,然后推广分析了M(M≥2)进制数字基带信号的功率谱密度特性.最后分别选取二进制、三进制和四进制数字基带信号用Mat-hb平台仿真分析了其功率谱密度,结果显示多进制数字基带信号的频谱一般由离散谱和连续谱组成,但在特定的条件下,其频谱中将只存在连续谱成分,而不存在离散谱.仿真结果为多进制数字基带信号的分析和应用提供了有益的参考.     

一种DVB-T/H信号强度检测系统的设计与实现

检测无线视频传输的信号强度,既可以检测信号质量,还能为信号传输选择最佳可用频率段。文章提出了一种基于DSP和MAX2165的DVB-T/H信号强度检测方法,并给出了系统设计方案。该方案先扫描频段内的信号,将其下变频到基带,然后对基带信号进行功率测量,最后获得信号强度。测试结果的分析,验证了该方案的可行性和有效性。     

高铁移动通信的特殊性讨论

简要介绍了高铁通信遇到的特殊环境技术问题,如快速功控失效、无线信号包络莱斯分布、多普勒效应使基带信号频谱展宽、车厢窗户穿透损耗和入射角损耗加大、智能天线作用受限、小区硬切换信令开销增大等,并提出了适于高铁通信的无线覆盖方案。     

A Strong Anti-Jamming Algorithm Based on FPGA for Estimating Loop Delay in Digital Predistortion System

At present what are the key points focused in the research of loop-delay estimation for the digital predistorter in the radio frequency (RF) power amplifier system is reducing its complexity of engineering realization and improving anti-jamming ability and computational speed. Besides, opening up its application scope should be contained. For these targets, a novel method including integer loop delay estimation and fractional part is proposed. The integer part applies amplitude-difference summation function and the fractional one adopts the method of finite impulse response (FIR) linear interpolation. The algorithm finds wide applications. What is more, strong anti-jamming ability and low complexity are also its merits. Simulation results support the above opinion. Digital predistortion (DPD) system based on this algorithm achieves good performance.     

基于ARM9的GPS接收机设计

本文介绍了一种基于ARM9微处理器的GPS接收机的设计。该GPS接收系统采用Zarlink公司生产的专用芯片GP2015，配合外围电路作为接收机的超小型射频前端，应用GP2021芯片和S3C2410处理器作为接收机的数字基带处理器。     

BBU基带池集中设置的探讨和建议

针对底层网络的特点，分析BBU＋RRU站点集中化建设的优缺点，给出了集中化建设“分片、选点、保障”的新思路，并总结了BBU集中化建设的工程经验，提出了建设建议。     

MT—2B2B一种新型线路码的研究

本文以三角波为传输波变形，以差分双相码为基础提出了一种新型的线路码－MT－2B2B。文章描述了码的构成，计算了码的频谱结构，分析了码的特点。码对于高速近距离基带传输系统具有较大的实用价值。     

Performance of A prioritized on-board baseband switch for A multiservice multibeam satellite

In this paper, we study the performance of a prioritized on-board baseband switch in conjunction with a multibeam satellite handling integrated services. The services considered for the analysis include voice, video, file transfer and interactive data. The prioritized switch uses both input and output buffering, switch speed-up as well as a two-phase head-of-line resolution algorithm, in order to reduce the buffer loss while maintaining acceptable user delays. The minimum required buffer capacity and switch speed-up for each service in a prioritized environment are found under uniform traffic conditions. It is shown that under uniform traffic conditions, only minimal buffering and switch speed-up are needed even for the lowest priority users. The performance dependence on the switch size is also substantially reduced with head of line resolution and buffering even in a prioritized environment.     

超宽带系统数字基带处理器设计

本文研究基于多带－正交频分复用（MB-OFDM）技术超宽带系统的数字基带处理器设计。该数字基带处理器采用可配置多通路流水线结构实现高达480Mbps的数据率以及从53．3Mbps到480Mbps的多数据率模式。本文采用SMIC0．13um标准CMOS工艺进行芯片设计,芯片核心面积为5mm^2。设计的基带系统在典型室内多径信道环境下（CM1-CM4）进行了仿真验证,综合考虑多径衰落、加性高斯白噪声、以及±50ppm的载波频偏、采样频偏。仿真结果验证了系统的可行性和可靠性。     

一种新的MIMO无线通信空时分组码方案

从MIMO(多入多出)引出空时分组码背景;针对实际MIMO应用提出了一种利用广义复正交方法新设计的满分集的码率为1/2的6个发射天线4个接收天线(6×4)和8个发射天线4个接收天线(8×4)结构的空时分组码系统,仿真结果表明该系统具有良好性能。