可配置非幂方分频器的全新设计方法

本文采用基于计数空间完全划分和周期插入控制计数过程方法设计了非幂方分频器,采用这种全新思路设计的非幂方分频器分频范围很宽,分频输出对后续分频支持好,非常适用于通讯接口中的波特率时钟设计.此外,这种设计思路对系统定时电路和节拍控制电路设计也有一定的借鉴意义.     

An Elastic Architecture Adaptable to Various Application Scenarios

The quantity of computer applications is increasing dramatically as the computer industry prospers. Meanwhile, even for one application, it has different requirements of performance and power in different scenarios. Although various processors with different architectures emerge to fit for the various applications in different scenarios, it is impossible to design a dedicated processor to meet all the requirements. Furthermore, dealing with uncertain processors significantly aggravates the burden of programmers and system integrators to achieve specific performance/power. In this paper, we propose elastic architecture （EA） to provide a uniform computing platform with high elasticity, i.e., the ratio of worst-case to best-case performance/power/performance-power trade-off, which can meet different requirements for different applications. It is achieved by dynamically adjusting architecture parameters （instruction set, branch predictor, data path, memory hierarchy, concurrency, status~zcontrol, and so on） on demand. The elasticity of our prototype implementation of EA, as Sim-EA, ranges from 3.31 to 14.34, with 5.41 in arithmetic average, for SPEC CPU2000 benchmark suites, which provides great flexibility to fulfill the different performance and power requirements in different scenarios. Moreover, Sim-EA can reduce the EDP （energy-delay product） for 31.14% in arithmetic average compared with a baseline fixed architecture. Besides, some subsequent experiments indicate a negative correlation between application intervals＇ lengths and their elasticities.     

Tracking Configurable Culture From the Margins to the Mainstream

In this study, we analyze data from surveys conducted in 2006 and 2010, tracking changes in awareness, engagement and attitudes surrounding emerging digital cultural forms over this 5‐year period. Our analysis, based on results from thousands of adults around the globe, shows that not only have remixes, mashups and other forms of “configurable culture” become mainstream phenomena, but also that the attitudes surrounding their cultural legitimacy are shifting. While copyright industries still promote a binary theft/permission framework, many people acknowledge the validity of some appropriation, and are actively negotiating the law's limitations. Yet, those most engaged in challenging dominant copyright narratives and exploring these emergent forms are those who hold the reins of cultural power: the young, educated and wealthy.     

冷连轧过程控制数据管理系统的研究

数据管理系统逐渐成为冷连轧过程控制中的重要组成部分。介绍了一种基于组态软件的数据管理系统,重点介绍了过程数据的采集和存储,及其在冷连轧过程控制中的应用等。     

可配置流处理器核心级指令设计及相关编译技术研究

针对目前微处理器面对通用性、高性能、功耗效率的矛盾,我们提出了可配置流处理器的解决方案。本文重点研究了可配置流处理器中核心级指令设计及相关的编译技术,其核心设计思想是根据应用的计算特征设计流处理器中的核心级指令集,从而降低指令集硬件资源的需求。     

支持SMDA服务建模工具的设计与实现

讨论了支持服务模型驱动体系结构(SMDA)的建模工具的设计和实现方法,对SMDA的服务模型规范作了简介,对建模工具的系统结构和功能进行了详细描述,介绍了基于JHotDraw的实现方法,并给出了服务系统建模的一个实例.     

紫金桥组态软件在输煤监控仿真系统中的应用

介绍了输煤监控仿真系统的设计思想及系统组成;并以紫金桥组态软件为操作平台,模拟100MW机组容量的火电厂输煤监控系统的控制逻辑,实现仿真监控。该系统技术先进、结构合理、功能齐全、开放性好,为电厂运行人员在职培训和高校实验教学提供良好工具。     

C64x+DSP内核分析及其性能评价

C64x+是德州仪器(TI)公司最新推出的高性能定点DSP内核,它在指令集体系结构和片内存储系统等方面有了很大的改进.TI最新的高性能DSP芯片及SOC平台都采用C64x+内核.研究C64x+DSP内核及其片内存储系统的特点,重点分析了指令集、软件流水机制和特权系统以及片内存储系统等方面的改进.最后用一些典型的应用程序测试了C64x+内核在代码大小和程序运行时间等方面的性能提升.     

基于用户描述的可配置汇编器

针对传统固定指令集处理器的汇编器开发周期长、无法及时适应可配置处理器指令集需求变化的问题,提出一种基于用户描述的可配置汇编器的设计和实现方法,高度抽象汇编器中依赖指令集的部分,通过对指令集高层次描述,快速将指令集的变化映射到汇编器源代码上。实验结果表明,该方法可降低汇编器50％左右的开发工作。     

基于FPGA的可配置FFT_IFFT处理器的设计与实现

设计实现了一种用于P2P移动无线通信手持终端产品。该设计采用优化的单碟形4路并行结构,兼容802.11g协议,可配置完成64点、256点、1 024点的FFT-IFFT处理器,设计以Xilinx公司的Virtex-2系列的XC22V500芯片为硬件平台。通过大量实际信号与数据的联合调试,表明了设计的正确性及实用性。