一种超宽带CMOS除二电路及其优化方法

本文提出了一种新型的基于轮换触发的除二电路及其基于大信号分析的优化方法。通过减小跟随相输出节点的RC常数,增大锁存相输出节点的RC常数,减小内部信号摆幅和补偿锁存相输出节点漏电流的损失等电路技术,大大拓宽了其工作频带。本论文在SMIC 0.13μm RF CMOS工艺条件下设计了一款原型电路,其后仿工作频率可以达到320MHz到29.6GHz。此外,这款除二电路还应用于两款整数分频锁相环芯片中,分别对频率为4224MHz和10GHz的信号进行分频。测试结果表明,这款除二电路可以对其进行正确分频,而且整体锁相环的带内相噪分别为-94dBC/Hz@10kHz和-84dBc/Hz@10kHz.     

Design and optimization of an ultra-wide frequency range CMOS divide-by-two circuit

A novel toggled flip-flop(TFF) divide-by-two circuit(DTC) and its optimization method based on a large-signal analysis approach are proposed.By reducing the output RC constant in tracking mode and making it large in latching mode,compressing the internal signal swing as well as compensating the current leaked in the latching mode, the operating frequency range is greatly expanded.Implemented in a SMIC 0.13μm RF CMOS process with a 1.2 V power supply,it can work under an ultra-wide frequency band ranging ...     

MEMS薄膜纵向断裂强度的静电测试结构模型与模拟

根据Bore提出的一种MEMS薄膜断裂强度静电测试结构,给出了一种改进的数学模型,根据此数学模型可以很简单地测出MEMS薄膜的断裂强度.对各种不同尺寸的结构用Coventor软件对所给模型进行了验证,结果表明所得出的数学模型比原文中所给出的数学模型更为准确.     

A low spur,low jitter 10-GHz phase-locked loop in 0.13-μm CMOS technology

This paper presents a 10-GHz low spur and low jitter phase-locked loop(PLL).An improved low phase noise VCO and a dynamic phase frequency detector with a short delay reset time are employed to reduce the noise of the PLL.We also discuss the methodology to optimize the high frequency prescaler's noise and the charge pump's current mismatch.The chip was fabricated in a SMIC 0.13-μm RF CMOS process with a 1.2-V power supply.The measured integrated RMS jitter is 757 fs(1 kHz to 10 MHz);the phase noise is-89 ...     

一种8.75-11.2 GHz适用于802.11a/b/g零中频收发机系统低噪声分数频率综合器

介绍了一种适用于802.11a/b/g零中频接收机的超宽带分数频率综合器。文章详细推导了分数频率综合器相位噪声和杂散的数学模型,并给出了降低噪声和杂散的优化方法。实验结果表明,输出频率二分频后,在4.375GHz时积分噪声低于1度（1kHz 到100MHz);参考频率33-MHz处杂散低于-60dBc。芯片基于标准0.13微米RF CMOS工艺,电路工作电压1.2V,功耗39.6mW。     

CMOS high linearity PA driver with an on-chip transformer for W-CDMA application

A fully integrated high linearity differential power amplifier driver with an on-chip transformer in a standard 0.13-μm CMOS process for W-CDMA application is presented.The transformer not only accomplishes output impedance matching,but also acts as a balun for converting differential signals to single-ended ones.Under a supply voltage of 3.3 V,the measured maximum power is larger than 17 dBm with a peak power efficiency of 21%.The output power at the 1-dB compression point and the power gain are 12.7 dBm and 13.2 dB,respectively. The die size is 0.91×1.12 mm~2.     

采用balun低噪声放大器的5GHz 7.2-dB NF低功耗直接转换接收机前端电路

A 5GHz low power direct conversion receiver radio frequency front-end with balun LNA is presented. A hybrid common gate and common source structure balun LNA is adopted, and the capacitive cross-coupling technique is used to reduce the noise contribution of the common source transistor. To obtain low 1/f noise and high linearity, a current mode passive mixer is preferred and realized. A current mode switching scheme can switch between high and low gain modes, and meanwhile it can not only perform good linearity but save power consumption at low gain mode. The front-end chip is manufactured on a 0.13-μm CMOS process and occupies an active chip area of 1.2 mm². It achieves 35 dB conversion gain across 4.9-5.1 GHz, a noise figure of 7.2 dB and an IIP3 of -16.8 dBm, while consuming 28.4 mA from a 1.2 V power supply at high gain mode. Its conversion gain is 13 dB with an IIP3 of 5.2 dBm and consumes 21.5 mA at low gain mode.     

基于区块链物联网的抽样检测平台

当前我国的抽样检测平台信息化智能化程度较低导致抽检工作效率低下, 且中心化平台导致了数据可篡改与来源不可信问题. 针对这些问题, 提出了一种面向抽样检测的区块链技术方案, 利用区块链中联盟链多中心化、不可篡改、隐私保护等特点, 结合物联网终端设备对过程的智能感知, 实现了数据安全可信, 过程可追溯可监控的抽样检测平台, 提高了抽样检测的效率与检测结果的可信性, 保障了数据的安全性.     

8.64-11.62 GHz CMOS VCO and divider in a zero-IF 802.11a/b/g WLAN and Bluetooth application

A fully integrated VCO and divider implemented in SMIC 0.13-μm RFCMOS 1P8M technology with a 1.2 V supply voltage is presented.The frequency of the VCO is tuning from 8.64 to 11.62 GHz while the quadrature LO signals for 802.11a WLAN in 5.8 GHz band or for 802.11b/g WLAN and Bluetooth in 2.4 GHz band can be obtained by a frequency division by 2 or 4,respectively.A 6 bit switched capacitor array is applied for precise tuning of all necessary frequency bands.The testing results show that the VCO has a phas...     

具有片上巴伦的CMOS超宽带接收机

本文介绍了一种具有片上巴伦的超宽带(UWB)3GHz～5GHz直接转换接收机。它由电容交叉耦合共栅极低噪声放大器(LNA)和改进型吉尔伯特混频器组成,采用SMIC RFCMOS技术。仿真结果表明,本文所设计的UWB接收机具有较好的输入匹配(<-9dB)、3.9dB～5.5dB的噪声系数和19dB～25dB的功率转换增益。在1.2V供电情况下消耗22mA电流,并占用0.66×0.8mm~2芯片面积(包括焊盘)。