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According to the requirement of fast-growing forest pruning operation,the pruning robot was developed.The structure and control system of pruning robot were described,the work flow of pruning robot was expounded.The type and structure of the driving motor and the compression spring were decided with force-balance analysis.The tilt problem of pruning robot was resolved by ADAMS and Matlab co-simulation,and the control scheme of climbing mechanism was determined.The experiment results of the prototype indicate that pruning robot can climb tree trunk smoothly at a speed of20 mm/s and cross the raised trunk.The pruning saw which is driven by the adjustable speed motor can cut the branches of30 rnm,And the residual amount of branches is less than5 ram.Pruning robot can meet the practical requirements of the fast-growing forest pruning work. 相似文献
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考虑地面变形特性的车辆地面耦合系统的建模与仿真 总被引:1,自引:0,他引:1
利用虚拟样机技术,在ADAMS/View环境中建立某款铰接式自卸车的刚柔耦合的多体动力学模型,并通过整车道路模拟试验验证了模型的准确性。同时以汽车地面力学为基础,综合考虑轮胎与地面的接触变形特性,建立轮胎—变形地面接触模型,并将该模型以S-函数形式描述,生成Matlab/Simulink仿真模块。通过ADAMS/Control将车辆模型输出到Simulink中形成车辆模型子模块,与轮胎—土壤接触模型进行集成,从而建立考虑地面变形特性的车辆地面耦合系统模型及其仿真平台,为研究车辆地面耦合问题以及车辆系统的优化提供有效的方法和工具。 相似文献
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以多体动力学仿真软件SIMPACK为平台,建立昌河某微型轿车的整车模型,采用模糊控制策略,在联合仿真模块SIMAT中对整车进行了随机路面输入和脉冲输入仿真试验。结果表明,与被动悬架相比,联合仿真环境下,模糊控制的半主动悬架车辆可以有效衰减车体振动,改善整车的平顺性。 相似文献
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Je-Hoon Lee Sang-Choon Kim Young Hwan Kim Kyoungrok Cho 《Microelectronics Journal》2011,42(11):1290-1298
This paper proposes a hardware–software (HW-SW) co-simulation framework that provides a unified system-level power estimation platform for analyzing efficiently both the total power consumption of the target SoC and the power profiles of its individual components. The proposed approach employs the trace-based technique that reflects the real-time behavior of the target SoC by applying various operation scenarios to the high-level model of target SoC. The trace data together with corresponding look-up table (LUT) is utilized for the power analysis. The trace data is also used to reduce the number of input vectors required to analyze the power consumption of large H/W designs through the trade-offs between the signal probability in the trace results and its effect on the power consumption. The effect of cache miss on power, occurring in the S/W program execution, is also considered in the proposed framework. The performance of the proposed approach was evaluated through the case study using the SoC design example of IEEE 802.11a wireless LAN modem. The case study illustrated that, by providing fast and accurate power analysis results, the proposed approach can enable SoC designers to manage the power consumption effectively through the reconstruction of the target SoC. The proposed framework maps all hardware IPs into FPGA. The trace based approach gets input vectors at transactor of the each IP and gets power consumption indexing a LUT. This hardware oriented technique reports the power estimation result faster than the conventional ones doing it at S/W level. 相似文献
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