振幅分割无掩模激光干涉光刻的实现方法

无掩模激光干涉光刻中的分束方法一般有波前分割和振幅分割。研究和比较了振幅分割无 掩模激光干涉光刻方法和系统,包括振幅分割双光束干涉系统、三光束干涉系统、液浸式深紫外干涉系统及全自动干涉光刻系统。建立了双光束双曝光干涉光刻实验系统。模拟和实验结果表明,对点阵或孔阵图形,在同样的图形尺度下,无掩模干涉光刻比传统光刻简单得多。     

光瞳滤波提高投影光刻成像分辨力研究

针对投影光刻成像系统在数值孔径足够大时所产生的分辨力和焦深的矛盾,详细研究了光瞳滤波对投影成像对比度的改善情况,根据不同掩模图形设计对应的最优滤波器。研究结果表明,光瞳滤波能大幅度提高投影光刻成像分辨力并增大焦深,是一种比较有效的提高光刻成像分辨力的方法。     

用于KrF准分子激光光刻的三相移掩模

讨论了相移掩模提高光刻分辨力的基本原理,提出了一种抗蚀剂相移器制作衰减相移掩模的新方法,利用自行设计、建立的ＫｒＦ准分子激光投影光刻实验曝光系统进行了实验研究,给出了实验结果,并与传统光刻方法作了比较。     

成像干涉光刻技术及其频域分析

传统光学光刻技术(OL)由于其固有的限制,虽然可对任意图形成像,但分辨力较低。无掩模激光干涉光刻技术(IL)的分辨力可达l /4,却局限于周期图形。成像干涉光刻技术(IIL)结合了二者的优点,用同一个系统分次传递物体不同的空间频率,能更有效地传递物体的信息,以高分辨力对任意图形成像。初步模拟研究表明,在同样的曝光波长和数值孔径下,对同样特征尺寸的掩模图形,IIL得到的结果好于OL。在CD=150nm时,IIL相对于OL把分辨力提高了1.5倍多。     

微光刻相移掩模技术研究

本文系统地论述了提高光刻分辨率的相移掩模技术的基本原理、计算模拟和光刻曝光实验 ;给出了模拟和实验结果 ;研究表明 ,只有在一定的临界参数条件下 ,相移掩模才能明显地改善分辨率和工艺宽容度 ;采用无铬相移掩模得到了 0 .2 μm的清晰抗蚀剂图形 ,证明了相移掩模在提高光刻分辨率、延长光刻技术寿命以及推进光刻技术极限发展方面的优良性能     

大数值孔径下的偏振成像分析

光刻设备的分辨率越来越高,以满足集成电路特征尺寸不断缩小的要求.根据瑞利判据,可以通过缩小曝光波长和工艺因子、增大数值孔径来提升光学投影光刻的分辨率.随着数值孔径的增加,光的偏振特性对成像的影响越来越大.通过分析偏振光的成像特性,控制照明的偏振方向,可以延伸光刻的分辨率.运用光的干涉原理分析了偏振光影响成像质量的原因,...     

相移掩模方法及其一维数值模拟

相移掩模方法是一种新的光刻技术，它可以提高现有光刻设备的分辨率，使超大规模集成电路及二元光学的制作迈上一个新台阶。本文介绍了相移掩模方法的基本原理，用部分相干光成象理论分析了用于光刻的投影照相系统的成象特性，导出了一维成象的简化公式，对一维光栅结构进行了计算机数值模拟并给出了模拟结果。     

用于KrF准分子激光光刻的衰减相移掩模

讨论了相移掩模提高光刻分辨力的基本原理,提出了一种抗蚀剂相移器制作衰减相移掩模的新方法,利用自行设计、建立的KrF准分子激光投影光刻实验曝光系统进行了实验研究,给出了实验结果,并与传统光刻方法作了比较.     

衍射光学元件灰度掩模板激光制作系统研究

根据灰度掩模的制作理论,提出了由PP8000胶片输出仪、远心成像透镜组、平行准直He-Cd激光器构成的精缩投影曝光灰度掩模制作系统。通过灰度掩模平面不同位置处提供可变的透过率,经一次光刻后得到所需的衍射光学元件。该系统不仅可采用黑白胶片制作高分辨率灰度掩模板,还可根据彩色灰度等效理论,利用彩色等效胶片实现256灰度级的扩展细分,以进一步提高灰度掩模板制作的分辨率。对于16台阶灰度掩模,其分辨率可以从0~255扩展到0~1280灰度级。利用该系统给出了二元光栅精缩后的感光图片。     

波前分割无掩模激光干涉光刻的实现方法

激光干涉光刻不受传统光学光刻系统光源和数值孔径的限制,其极限尺寸CD达到曝光波长 的1/4,研究了波前分割双光束、三光束方法及四光束无掩模激光干涉光刻方法,提出了可用于五光束和多种多光束和多次曝光的梯形棱镜波前分割干涉光刻方法。用自行建立的梯形棱镜波前分割系统进行了多光束干涉曝光实验,得到孔尺寸约220nm的阵列图形。     

采用双向偏置曝光的成像干涉光刻技术

成像干涉光刻技术(IIL)具有干涉光刻技术(IL)的高分辨力和光学光刻技术(OL)产生任意形状集成电路特征图形的能力。在IIL中,按掩模图形的不同空间频率成份分区曝光,并使其在抗蚀剂基片上非相干叠加,得到高分辨抗蚀剂图形。本文在研究一般三次曝光IIL原理基础上,提出采用沿X轴正、负方向以及沿Y轴正、负方向偏置的双向偏置照明,分别曝光 X方向、-X方向、 Y方向、-Y方向的高空间频率分量并与垂直于掩模方向的低空间频率分量曝光相结合的五次曝光IIL。理论和计算模拟表明,该方法可以提高图形对比度和分辨力,并减小因调焦误差引起的图形横向位移误差,有利于改善抗蚀剂图形质量。     

Resolution Limit in Plasmonic Lithography for Practical Applications beyond 2x‐nm Half Pitch

A theoretical model is introduced to evaluate the ultimate resolution of plasmonic lithography using a ridge aperture. The calculated and experimental results of the line array pattern depth are compared for various half pitches. The theoretical analysis predicts that the resolution of plasmonic lithography strongly depends on the ridge gap, achieving values under 1x nm with a ridge gap smaller than 10 nm. A micrometer‐scale circular contact probe is fabricated for high speed patterning with high positioning accuracy, which can be extended to a high‐density probe array. Using the circular contact probe, high‐density line array patterns are recorded with a half pitch up to 22 nm and good agreement is obtained between the theoretical model and experiment. To record the high density line array patterns, the line edge roughness (LER) is reduced to ≈17 nm from 29 nm using a well‐controlled developing process with a smaller molecular weight KOH‐based developer at a temperature below 10°C.     

Forbidden pitches in sub-wavelength lithography and their implications on design

Moore’s Law has been the most important benchmark for microelectronics development over the past four decades. It has been interpreted to mean that critical dimensions (CD) of a design must shrink geometrically over time. The chip-level integration of devices has been possible through concurrent improvement in lithographic resolution. The lithographic resolution was primarily improved by moving deeper into ultraviolet spectrum of light. However, the wavelength of the optical source used for lithography has not improved for nearly a decade. This has lead to the development of sub-wavelength lithography. The diffraction effects of sub-wavelength lithography were offset by optical proximity correction (OPC), phase shift masking (PSM) and impending move to immersion lithography. Unfortunately, one time benefits from each of these resolution enhancement techniques (RET) have nearly exhausted. In this paper, we explore one important diffraction aspect of sub-wavelength lithography viz. the forbidden pitch phenomenon and its implication on future designs. We studied Forbidden pitches in context of 65 and 45 nm technologies using aerial imaging simulation. Aerial imaging simulation is computationally expensive and is not possible to perform on entire layout structures. Based on results from our simulations on selected patterns, we observe that in absence of any other resolution enhancement technique, many of the current layout patterns will be disallowed in 45 nm technology. Such restrictions significantly mitigate the benefit of migration to 45 nm technology in terms of area, power and performance of a design. We further show that even structured gate array based designs are not immune to this problem.     

小型微纳米图形电子束曝光制作系统(英文)

为了满足科学实验过程中对制作半导体器件和微纳米结构的需要,同时避免受到昂贵的工业级电子束曝光(electron beam lithography,EBL)机的条件制约,构建了一种基于普通扫描电子显微镜(scanning electron microsco-py,SEM)的桌面级小型电子束曝光系统.建立了以浮点DSP为控制核心的高速图形发生器硬件系统.利用线性计算方法实现了电子束曝光场的增益、旋转和位移的校正算法.在本曝光系统中应用了新型压电陶瓷电机驱动的精密位移台来实现纳米级定位.利用此位移台所具有的纳米定位能力,采用标记追逐法实现了电子束曝光场尺寸和形状的校准.电子束曝光实验结果表明,场拼接及套刻精度误差小于100 nm.为了测试曝光分辨率,在PMMA抗蚀剂上完成了宽度为30 nm的密集线条曝光实验.利用此系统,在负胶SU8和双层PMMA胶表面进行了曝光实验;并通过电子束拼接和套刻工艺实现了氮化物相变存储器微电极的电子束曝光工艺.     

分步式压印光刻研究

针对微纳制造中光刻环节的光衍射限制，讨论了可能成为下一代光刻技术路线的压印光刻。通过对比热压印、微接触转印及常温压印的技术特点，设计了一套低成本、结构简单的紫外光固化常温压印光刻机构。其大行程纳米级定位、纳米级下压系统消除了压印过程中的机构热变形误差、驱动间隙、蠕动误差等，具有分步式纳米级驱动多场压印及纳米级下压加载能力，可实现多次重复高保真图形复制。     

电子束散射角限制投影光刻掩模研制

掩模制作是电子束散射角限制投影光刻(SCALPEL)的关键技术。通过优化工艺,制作出具有“纳米硅镶嵌结构”的低应力SiNx薄膜作为支撑;开发了电子束直写胶图形的加法工艺,在支撑薄膜上得到清晰的钨 / 铬散射体图形。研制出的SCALPEL掩模,其晶片尺寸为80mm,图形线宽达到0.1m,经缩小投影曝光得到78nm的图形分辨力。     

Polymer pen lithography using dual-elastomer tip arrays

Dual-elastomer tip arrays are developed as a simple and cost-effective approach to significantly improve the uniformity and precision of polymer pen lithography (PPL). Both experiment and mechanical simulation demonstrate that the hard-apex, soft-base tip structure of the dual-elastomer tip array leads to precise control of feature size and reduced variation among different tips over large areas through fine control of the tip deformation. The dual-elastomer tip array is believed to be readily applied to fabricate nano- and microstructures for fundamental study and applications such as bioassays, sensors, optical and electronic devices.     

A route to fabricate nanocontacts by X-ray lithography for the realization of single electron transistors and highly sensitive biosensors

The fabrication of single electron transistors and/or highly sensitive biosensors is still a challenging task on account of the tight control required to get proper shapes and size of the electrodes. The nanosized tips and the separation of a few nanometers between electrode pairs are critical features. Conventional lithography is not suited to obtain these features because of the resolution limits, so that previous alternative approaches have involved the use of electron beam lithography, focused ion beam lithography or scanning probe nanolithography. The novel approach presented in this letter is the exploitation of X-ray lithography in the Elettra synchrotron to fabricate arrays of nanocontacts spaced a few nanometers, devoted to the design of a new class of nanodevices based on nanoparticles and/or single molecules, including single electron transistors and highly sensitive biosensors. The method to fabricate such devices is illustrated and discussed. Experimental details of the fabrication process are given and preliminary results are presented through SEM and AFM images. It is worth noting that this paper presents a viable method to produce nanocontacts by using the X-ray lithography by synchrotron radiation source, that has not yet been reported together with experimental, though preliminary, data.     

激光LIGA工艺实验设计

文章介绍了一种用于准分子激光深层光刻实验装置的设计，并根据该设计思想进行了可行性原理实验，取得了较好的结果。