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1.
片上硅面积和功耗受到严重限制,报文缓冲区容量也受到严重限制,如何高效使用报文缓冲区是NoC设计的关键问题之一.动态划分虚通道缓冲区是高效使用报文缓冲区的有效方法之一,但会增加拥塞程度,甚至出现无限拥塞的情况.提出一种基于二步流控方法的片上动态虚通道(DAVC)路由器,该二步流控方法将报文分成报文头和报文体两部分分别运用流控算法.实验结果表明:与静态虚通道(SAVC)片上路由器相比,在缓存容量相等的情况下,DAVC路由器能提高23.2%的吞吐率,传输延迟降低27.2%;在DAVC缓存容量减半的情况下可获得相近的性能,节省28.3%的面积与23.8%的漏电流功耗.  相似文献   

2.
一种动态分配虚拟输出队列结构的片上路由器   总被引:1,自引:0,他引:1  
传统虚通道流控技术的片上路由器通过增加虚通道缓解排头阻塞引起的链路吞吐率下降以及网络拥塞的同时,面临缓冲区低利用率、仲裁开销较大等问题.而动态虚通道流控的片上路由器虽可通过动态管理缓冲单元,提高缓冲区利用率与链路吞吐率,但却不可避免流控与仲裁逻辑复杂度与开销的快速增长.为了提高链路吞吐率与缓冲区利用率,获得较好的性能与开销折中,提出一种动态分配虚拟输出队列结构的片上路由器DAVOQ,该结构通过快速链表动态组织虚拟输出队列,同时使用超前路由机制以简化仲裁逻辑,优化流水线.模拟与综合的结果表明,相比传统虚通道路由器,DAVOQ路由器改善报文传输延迟与吞吐率的同时,在0.13μm CMOS工艺下,节省了15.1%的标准单元面积与12.9%的漏电流功耗;而相比动态虚通道路由器,DAVOQ路由器能够以较小的吞吐率损失获得可观的延迟改善,同时节约15.6%的标准单元面积与20.5%的漏电流功耗.  相似文献   

3.
具有拥塞缓解策略的动态虚拟通道研究及其VLSI实现   总被引:1,自引:0,他引:1  
虚拟通道技术改善了片上网络性能,却带来了巨大的面积与功耗开销.通过分析静态虚拟通道的不足,提出了基于拥塞缓解策略的动态虚拟通道结构.它采用链表方式组织缓冲,可以自动调整通道结构来适应各种流量负载:在较低流量下,该结构扩展通道队列深度,减小了报文传输延迟;在较高流量下,它增加虚拟通道数量,消除队列头阻塞与通道不足阻塞,并缓解拥塞现象发生,减少流反馈次数,提高了网络吞吐率.在90nm CMOS工艺下完成了DVC路由器的VLSI设计,与传统路由器相比,不仅改善了报文传输延迟与吞吐率,而且有效降低了面积与功耗开销.  相似文献   

4.
多核技术已经成为现在芯片发展的主流,片上路由器成为核间通信的主要方式。在半导体技术进入深亚微米阶段,对于片上路由器的时延、面积和功耗等性能提出了更高的要求。大量文章研究新型路由器结构以满足高性能路由器的要求。根据排队论模型对交叉节点队列路由器进行了Matlab建模仿真,确定了队列深度为4及轮询算法在交叉节点队列路由器中能获得更加平衡的性能。然后,提出了交叉节点队列路由器的各主要模块结构,并以此设计了各模块RTL电路。最后,使用FreePDK45nm工艺库,对所设计的交叉节点队列路由器进行了全定制版图设计与仿真。在工作温度70℃,电源电压1.1V条件下,该路由器关键路径时延为0.271ns,版图总面积为84500μm2,平均功耗为267.5438mW。  相似文献   

5.
根据计算趋近数据的原则,提出面向MPI集合操作的定制化片上网络设计方法,通过增强现有片上路由器的硬件功能实现MPI集合操作在网络层的加速。设计MPI归约操作,将其扩展至多种集合操作,并与一种针对确定性路由算法且可动态学习消息传输路径的自适应方法相结合,使集合操作可在扩展后的片上路由器上完成,加速处理过程并减少处理器核负载。此外,提出片上路由器的微体系结构设计方法,比较不同片上网络中扩展后的片上路由器布局并评估相应性能、功耗和片上面积。测试结果表明,与基于软件的最优实现相比,该方法在仅消耗有限功耗与片上面积的基础上,可使MPI归约性能提升6.4~41.7倍,广播性能提升15.3~31.2倍,全局归约性能提升5.4~9.7倍,收集性能提升1.3~1.8倍。  相似文献   

6.
《计算机工程》2017,(2):137-143
片上网络通常使用输入输出缓存或交叉开关缓存存储微片以提高路由器性能,导致大量消耗片上资源并显著增加功耗。无缓存路由器被提出用于解决该问题,但存在低效率的偏转,不适用于中、高负载的网络。为此,设计一种基于方向向量路由策略的低偏转率微缓存路由器。采用一个旁路寄存器和一个回环寄存器的设计,通过二分图最大匹配调度算法优化微片路由。在Xilinx Vivado上的仿真结果表明,该路由器的性能与RIDER路由器相当,但寄存器使用减少55%,并且在高负载网络中性能优于CHIPPER,Min BD和RIDER路由器。  相似文献   

7.
随着集成电路工艺进入纳米时代,可靠性已成为片上网络设计的一个关键因素。本文设计实现了一种基于增强学习的片上网络容错偏转路由器,该路由器在发送包的同时采用增强学习的方法对路由表进行重配置以实现容错路由。为了提高性能,我们对路由器进行了流水线优化设计,采用2级流水线实现。在TSMC65nm工艺下综合结果表明,2级流水线路由器频率提升了近一倍达到750MHz,而面积开销仅增加了22%。在合成通信模式下的模拟结果表明,2级流水线容错偏转路由器的平均网络延迟优于无流水线路由器。  相似文献   

8.
针对片上网络典型路由器的缓冲资源利用率不高、大容量缓存设计受限等问题,在不增加缓存和虚通道的情况下,提出一种新的面向片上网络缓冲资源争用的路由器设计方案。在该路由器中,当某个输入端繁忙发生资源争用情况时,将阻塞数据包分配到其他拥有空闲缓存资源的输入端口,解决缓冲资源的争用问题,从而提高网络整体性能。SystemC仿真结果表明,相对于基本路由器,该路由器在热点模式和均衡模式下均具有较高的网络饱和率和吞吐量,尤其在热点模式下提高了约11.4%的饱和率。FPGA实现结果表明,该路由器的面积开销较小,能较好满足片上网络的应用需求。  相似文献   

9.
论文提出了面向并行DSP应用并具备基于QoS控制路由器极大功耗的双路由多层Mesh片上网络互连结构,仿真结果表明该结构与单路由Mesh结构相比可减少功耗31.4%、时延30.6%。  相似文献   

10.
自适应路由可以有效地提高片上网络性能,却导致网络中的数据传输乱序.设计了一个两级流水虚拟通道虫孔交换路由器,通过修改数据包的标记位和路由计算单元,使路由器支持确定性和自适应路由算法,简化了数据传输乱序问题;同时,将流经路由器的数据流分为东西和南北2个部分;在此基础上从经典的部分自适应路由出发,增加虚拟通道允许原本禁止的转向,实现了无死锁的自适应路由,并降低了网络延迟与硬件开销.  相似文献   

11.
In this paper, we explore the use of cluster-based software routers as a way to share hardware resources, reduce costs, and save energy. We propose ECO–ALOC, an energy-efficient resource allocation mechanism that reconfigures the router according to the traffic demands using two modules. The first module provides fine-grained energy consumption control by switching CPU operation frequencies among three special frequencies. The second module provides long-term power savings by using virtual router migration to consolidate the load and shut idle servers down. We simulate a cluster-based software router using real traffic traces to evaluate our proposal. Results show that ECO–ALOC provides power savings of up to 93% depending on the cluster load scenario.  相似文献   

12.
A delay model for router microarchitectures   总被引:1,自引:0,他引:1  
This article introduces a router delay model that takes into account the pipelined nature of contemporary routers and proposes pipelines matched to the specific flow control method employed. Given the type of flow control and router parameters, the model returns router latency in technology-independent units and the number of pipeline stages as a function of cycle time. We apply this model to derive realistic pipelines for wormhole and virtual-channel routers and compare their performance. Contrary to the conclusions of previous models, our results show that the latency of a virtual channel router doesn't increase as we scale the number of virtual channels up to 8 per physical channel. Our simulation results also show that a virtual-channel router gains throughput of up to 40 % over a wormhole router  相似文献   

13.
The design of a new adaptive virtual cut-through router for torus networks is presented in this paper. With much lower VLSI costs than adaptive wormhole routers, the adaptive Bubble router is even faster than deterministic wormhole routers based on virtual channels. This has been achieved by combining a low-cost deadlock avoidance mechanism for virtual cut-through networks, called Bubble flow control, with an adequate design of the router's arbiter.  A thorough methodology has been employed to quantify the impact that this router design has at all levels, from its hardware cost to the system performance when running parallel applications. At the VLSI level, our proposal is the adaptive router with the shortest clock cycle and node delay when compared with other state-of-the-art alternatives. This translates into the lowest latency and highest throughput under standard synthetic loads. At system level, these gains reduce the execution time of the benchmarks considered. Compared with current adaptive wormhole routers, the execution time is reduced by up to 27%. Furthermore, this is the only router that improves system performance when compared with simpler static designs.  相似文献   

14.
Current on-chip networks use a packet-switched design with a complex router at every hop, which imposes significant communication energy, delay, and throughput overhead. we propose reducing energy and delay, and increasing throughput, using express virtual channels. packets traveling along these virtual express lanes, which connect distant nodes in the network, bypass intermediate routers, significantly reducing router overhead.  相似文献   

15.
为了提高片上TCAM的摆放密度和降低功耗,基于IBM 32 nm工艺库提供的TCAM的特性和优先编码器硬核,设计出同时满足多个查找宽度的外围控制电路。相比于之前的设计和实现,该设计可以减少TCAM的块数和相关寄存器的数量,减少片上TCAM的摆放面积,降低芯片的整体功耗。该设计已经成功应用于公司第4代路由交换ASIC芯片上。  相似文献   

16.
This paper identifies performance degradation in wormhole routed k-ary n-cube networks due to limited number of router-to-processor consumption channels at each node. Many recent research in wormhole routing have advocated the advantages of adaptive routing and virtual channel flow control schemes to deliver better network performance. This paper indicates that the advantages associated with these schemes cannot be realized with limited consumption capacity. To alleviate such performance bottlenecks, a new network interface design using multiple consumption channels is proposed. To match virtual multiplexing on network channels, we also propose each consumption channel to support multiple virtual consumption channels. The impact of message arrival rate at a node on the required number of consumption channels is studied analytically. It is shown that wormhole networks with higher routing adaptivity, dimensionality, degree of hot-spot traffic, and number of virtual lanes have to take advantage of multiple consumption channels to deliver better performance. The interplay between system topology, routing algorithm, number of virtual lanes, messaging overheads, and communication traffic is studied through simulation to derive the effective number of consumption channels required in a system. Using the ongoing technological trend, it is shown that wormhole-routed systems can use up to two-four consumption channels per node to deliver better system performance  相似文献   

17.
为用户或应用提供多样性服务是网络发展的趋势,不同的服务需要相应的网络转发或交换机制支持,实现多服务交换或转发的关键是资源分配和管理,该文提出一种支持面向应用的多服务交换路由器的资源虚拟分割算法,它结合可编程路由器,根据不同应用的转发需求,为不同转发服务分配一定范围的虚拟资源区间,该虚拟分割区间能够隔离和保护不同应用网络流,为其提供一定的服务质量保障,并使服务间能够可控,动态地共享多余的资源。  相似文献   

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