Quasi‐active power factor correction on flyback‐based dc/dc converter

This paper presents a novel input current shaper based on a quasi‐active power factor correction (PFC) scheme. In this method, high power factor and low harmonic content are achieved by providing an auxiliary PFC circuit with a driving voltage which is derived from a third winding of the transformer of a cascaded dc/dc flyback converter. It eliminates the use of active switch and control circuit for PFC. The auxiliary winding provides a controlled voltage‐boost function for bulk capacitor without inducing a dead angle in the line current. Since the dc/dc converter operates at high switching frequency, the driving voltage is also of high switching frequency, which results in reducing the size of the magnetic components. Operating principles, analysis and experimental results of the proposed method are presented. Copyright © 2011 John Wiley & Sons, Ltd.     

A novel single‐stage AC–DC converter with quasi‐resonant zero‐voltage‐switching for high power factor and high efficient applications

A new single‐stage‐isolated ac–dc converter that can guarantee both high efficiency and high power factor is proposed. It is based on a new dc–dc topology that has prominent conversion ratio similar to that of boost topology so that it is adequate to deal with the universal ac input. In addition, since it utilizes the transformer more than others based on the general flyback topology, the size of whole power system can be reduced due to the reduced transformer. Moreover, the voltage stresses on the secondary rectifiers can be clamped to the output voltage by adopting the capacitive output filter and clamp diode, and the turn‐off loss in the main switch can be reduced by utilizing the resonance. Furthermore, since this converter operates at the boundary conduction mode, the line input current can be shaped as the waveform of a line voltage automatically and the quasi‐resonant zero‐voltage switching can be obtained. Consequently, it features higher efficiency, lower voltage stress, and smaller sized transformer than other topologies. A 100 W prototype has been built and tested as the validation of the proposed topology. Copyright © 2010 John Wiley & Sons, Ltd.     

A power efficient buck‐boost converter by reusing the coil inductor for wireless bio‐implants

In this paper, a buck‐boost converter circuit for wireless power transfer via inductive links in bio‐implantable systems is presented. The idea is based on reusing the power receiver coil to design a regulator. This method employs five switches to utilize the coil inductor in a frequency other than the power‐receiving signal frequency. Reusing the coil inductor decreases the on‐chip regulator area and makes it suitable for bio‐implants. Furthermore, in the proposed technique, the regulator efficiency becomes almost independent of the coil receiving voltage amplitude. The proposed concept is employed in a buck‐boost regulator, and simulation results are provided. For a 10 MHz received signal with the amplitude variation within 3 ~ 6 V and with the converter switching rate of 200 kHz, the achieved maximum efficiency is 78%. The proposed regulator can also deliver 10 μA to 4 mA to its load while its output voltage varies from 0.6 to 2.3 V. Simulations of the proposed converter are performed in Cadence‐Spectre using TSMC 0.18 μm CMOS technology. Copyright © 2017 John Wiley & Sons, Ltd.     

Single‐Inductor Dual‐Output DC–DC Converter Design Using RC Ripple Regulator Method

In this paper, we have proposed Single‐Inductor Dual‐Output (SIDO) buck–buck and boost–boost dc–dc converter using improved RC ripple regulator control. The proposed SIDO buck–buck converter has the characteristics of low‐ripple and high control frequency. RC ripple regulator control cannot be applied to SIDO boost–boost converter because RC ripple regulator undergoes self‐excited oscillation and two self‐excited oscillating controllers make the SIDO converter unstable. Thus we proposed the priority circuit for RC ripple regulator control. The proposed control circuit improves response characteristic and simplicity of the control circuit. Simulations are performed to verify the validity of the proposed SIDO converter. Simulation results indicate good performance of the proposed SIDO converter.     

Steady‐state analysis of a novel ZVT interleaved boost converter

In this paper, a novel soft‐switched interleaved boost converter composed of two‐cell boost conversion units and an auxiliary circuit is proposed and investigated. The proposed auxiliary circuit is implemented using only one auxiliary switch and a minimum number of passive components without an effective increase in the cost and the complexity of the converter. The main advantage of this auxiliary circuit is that it not only provides zero‐voltage‐transition (ZVT) for the main switches but also provides soft switching for the auxiliary switch and diodes. Though all semiconductor devices operate under soft switching, they do not have any additional voltage and current stresses. The proposed converter operates successfully in soft‐switching operation mode for a wide range of input voltage level and the load. In addition, it has advantages such as fewer structure complications, lower cost and ease of control. Since the two‐cell interleaved boost units are identical, operational analysis and design for the converter module become quite simple. In this study, the detailed steady‐state theoretical analysis of the proposed converter is presented, which is verified exactly by simulation and experiments carried out on a prototype of a 120 W and 50 kHz/cell interleaved boost converter. The practical results confirm the results obtained from theoretical analysis. Copyright © 2010 John Wiley & Sons, Ltd.     

A new topology for nonisolated multiport zero voltage switching dc‐dc converter

In this paper, a new multiport zero voltage switching dc‐dc converter is proposed. Multiport dc‐dc converters are widely applicable in hybrid energy generating systems to provide substantial power to sensitive loads. The proposed topology can operate in 3 operational modes of boost, buck, and buck‐boost. Moreover, it has zero voltage switching operation for all switches and has the ability to eliminate the input current ripple; also, at low voltage side, the input sources can be extended. In addition, it has the ability of interfacing 3 different voltages only by using 3 switches. In this paper, the proposed topology is analyzed theoretically for all operating modes; besides, the voltage and current equations of all components are calculated. Furthermore, the required soft switching and zero input currents ripple conditions are analyzed. Finally, to demonstrate the accurate performance of the proposed converter, the Power System Computer Aided Design(PSCAD)/Electro Magnetic Transient Design and Control(EMTDC) simulation and experimental results are extracted and presented.     

A ZVS‐ZCS phase shift full bridge DC‐DC converter with secondary‐side control for battery charging applications

The output power requirement of battery charging circuits can vary in a wide range, hence making the use of conventional phase shift full bridge DC‐DC converters infeasible because of poor light load efficiency. In this paper, a new ZVS‐ZCS phase shift full bridge topology with secondary‐side active control has been presented for battery charging applications. The proposed circuit uses 2 extra switches in series with the secondary‐side rectifier diodes, operating with phase shift PWM. With the assistance of transformer's magnetizing inductance, the proposed converter maintains zero voltage switching (ZVS) of the primary‐side switches over the entire load range. The secondary‐side switches regulate the output voltage/current and perform zero current switching (ZCS) independent of the amount of load current. The proposed converter exhibits a significantly better light load efficiency as compared with the conventional phase shift full bridge DC‐DC converter. The performance of the proposed converter has been analyzed on a 1‐kW hardware prototype, and experimental results have been included.     

A switch‐mode boost DC–DC converter for IR‐drop compensation of charging cable

A switch‐mode boost DC–DC converter has been developed to compensate for the IR‐drop because of the finite resistance of a charging cable. The boost ratio of the DC–DC converter is adaptively controlled by an IR‐drop sensing circuit to provide the required voltage level to a battery charger regardless of the cable resistance. Implemented in a 0.18 µm BCDMOS process, the IR‐drop compensating switch‐mode boost DC–DC converter occupies 6.2 mm² active area and shows the 93.2% peak efficiency. The proposed IR‐drop compensating boost converter can be applied to compensate for the IR‐drop of any type of charging cables. Copyright © 2014 John Wiley & Sons, Ltd.     

A novel quasi‐Z‐source indirect matrix converter

A new type of three‐phase quasi‐Z‐source indirect matrix converter (QZS‐IMC) is proposed in this paper. It uses a unique impedance network for achieving voltage‐boost capability and making the input current in continuous conduction mode (CCM) to eliminate the input filter. The complete modulation strategy is proposed to operate the QZS‐IMC. Meanwhile, a closed‐loop DC‐link peak voltage control strategy is proposed, and the DC‐link peak voltage is estimated by measuring both the input and capacitor voltages. With this proposed technique, a high‐performance output voltage control can be achieved with an excellent transient performance even if there are input voltage and load current variations. The controller is designed by using the small‐signal model. Vector control scheme of the induction motor is combined with the QZS‐IMC to achieve the motor drive. A QZS‐IMC prototype is built in laboratory, and experimental results verify the operating principle and theoretical analysis of the proposed converter. The simulation tests of QZS‐IMC based inductor motor drive are carried out to validate the proposed converter's application in motor drive. Copyright © 2013 John Wiley & Sons, Ltd.     

Output‐capacitorless segmented low‐dropout voltage regulator with controlled pass transistors

This article presents a low quiescent current output‐capacitorless quasi‐digital complementary metal‐oxide‐semiconductor (CMOS) low‐dropout (LDO) voltage regulator with controlled pass transistors according to load demands. The pass transistor of the LDO is segmented into two smaller sizes based on a proposed segmentation criterion, which considers the maximum output voltage transient variations due to the load transient to different load current steps to find the suitable current boundary for segmentation. This criterion shows that low load conditions will cause more output variations and settling time if the pass transistor is used in its maximum size. Furthermore, this situation is the worst case for stability requirements of the LDO. Therefore, using one smaller transistor for low load currents and another one larger for higher currents, a proper trade‐off between output variations, complexity, and power dissipation is achieved. The proposed LDO regulator has been designed and post‐simulated in HSPICE in a 0.18 µm CMOS process to supply a stable load current between 0 and 100 mA with a 40 pF on‐chip output capacitor, while consuming 4.8 μA quiescent current. The dropout voltage of the LDO is set to 200 mV for 1.8 V input voltage. The results reveal an improvement of approximately 53% and 25% on the output voltage variations and settling time, respectively. Copyright © 2015 John Wiley & Sons, Ltd.     

A novel active‐clamp zero‐voltage‐switching buck‐boost converter

An active‐clamp zero‐voltage‐switching (ZVS) buck‐boost converter is proposed in this paper to improve the performance of converter in light load condition. By employing a small resonant inductor, the ZVS range of switches could be adjusted to very light load condition. Moreover, 2 clamping capacitors are added in the converter to eliminate the voltage spike on the switches during transition. The operating principle of the proposed converter is analyzed, and the optimal design guide for full range ZVS is also provided. A 60‐W output prototype is experimentally built and tested in laboratory to verify the feasibility of proposed converter. The measured results show the critical ZVS operation of power switches at 1 and 0.7‐W output power for buck and boost mode, respectively. The peak conversion efficiency is up to 92.3%.     

Single‐stage single‐switch PFC converter for wide‐input extreme step‐down voltage applications

This paper presents a new single‐stage single‐switch high power factor correction AC/DC converter suitable for low‐power applications (< 150 W) with a universal input voltage range (90–265 V_rms). The proposed topology integrates a buck–boost input current shaper followed by a buck and a buck–boost converter, respectively. As a result, the proposed converter can operate with larger duty cycles compared with the existing single‐stage single‐switch topologies, hence, making them suitable for extreme step‐down voltage conversion applications. Several desirable features are gained when the three integrated converter cells operate in discontinuous conduction mode. These features include low semiconductor voltage stress, zero‐current switch at turn‐on, and simple control with a fast well‐regulated output voltage. A detailed circuit analysis is performed to derive the design equations. The theoretical analysis and effectiveness of the proposed approach are confirmed by experimental results obtained from a 100‐W/24‐V_dc laboratory prototype. Copyright © 2011 John Wiley & Sons, Ltd.     

A high-efficient fast-transient boost converter with adaptive on-time controlled and zero-current–detection techniques

A high-efficient fast-transient boost converter with adaptive on-time controlled and zero-current–detection techniques is presented in this paper. The adaptive on-time controlled technique can rapidly reach desired output voltage in two to three switching cycles. The proposed boost converter uses a zero-current–detector to detect and prevent the negative inductor current issue that can decrease the light-load power consumption and increase the light-load efficiency. Therefore, this new configuration accelerates transient response and improves light-load efficiency of the boost converter. The proposed boost converter has been fabricated with Taiwan Semiconductor Manufacturing Company (TSMC) 0.18-μm Complementary Metal-Oxide-Semiconductor (CMOS) 1P6M technology, and the chip area is only 1.148 × 1.187 mm (including personal assistant devices [PADs]). The input voltage range is from 0.5 to 1 V, and the output voltage is 1.8 V. The measured transient response time is about 2 and 3 μs, when the load current is changed from 5 to 300 mA and from 300 to 5 mA, respectively. The converter's operating frequency is 1 MHz, the maximum output current is 300 mA, and the peak power efficiency is 91.6% under 200-mA load current. The experimental results confirm that the light-load efficiency of the converter can be increased 11%.     

Soft‐switching converter with low circulating current and wide range of ZVS turn‐on

In this paper, a new hybrid dc–dc converter with low circulating current within the freewheeling interval, wide range of zero‐voltage switching and reduced output current ripple is presented. The proposed hybrid circuit includes two three‐level pulse‐width modulation converters and a series resonant converter with the shard lagging‐leg switches. Series resonant converter is operated at fixed switching frequency (close to series resonant frequency) to extend the zero‐voltage switching range of lagging‐leg switches. The output of series resonant converter is connected to the secondary sides of three‐level converters to produce a positive rectified voltage instead of zero voltage. Hence, the output inductances can be reduced. The reflected positive voltage is used to decrease the circulating current to zero during the freewheeling interval. Therefore, the circulating current losses in three‐level converters are improved. Finally, experiments are presented for a 1.44 kW prototype circuit converting 800 V input to an output voltage 24 V/60A. Copyright © 2015 John Wiley & Sons, Ltd.     

Analysis and implementation of a high‐efficiency zero‐voltage‐zero‐current‐switching DC–DC converter

A high‐efficiency zero‐voltage‐zero‐current‐switching DC–DC converter with ripple‐free input current is presented. In the presented converter, the ripple‐free boost cell provides ripple‐free input current and zero‐voltage switching of power switches. The resonant flyback cell provides zero‐voltage switching of power switches and zero‐current switching of the output diode. Also, it has a simple output stage. The proposed converter achieves high efficiency because of the reduction of the switching losses of the power switches and the output diode. Detailed analysis and design of the proposed converter are carried out. A prototype of the proposed converter is developed and its experimental results are presented for validation. Copyright © 2011 John Wiley & Sons, Ltd.     

A 300‐mA load CMOS low‐dropout regulator without an external capacitor for SoC and embedded applications

This study proposes a 300‐mA external capacitor‐free low‐dropout (LDO) regulator for system‐on‐chip and embedded applications. To achieve a full‐load range from 0 to 300 mA, a two‐scheme (a light‐load case and a heavy‐load case) operation LDO regulator with a novel control circuit is proposed. In the light‐load case (0–0.5 mA), only one P‐type metal–oxide–semiconductor input‐pair amplifier with a 10‐pF on‐chip capacitor is used to obtain a load current as low as 0. In the heavy‐load case (0.5 to 300 mA), both P‐type metal–oxide–semiconductor and N‐type metal–oxide–semiconductor differential input‐pair amplifiers with an assistant push‐pull stage are utilized to improve the stability of the LDO regulator and achieve a high slew rate and fast‐transient response. Measurements show an output voltage of 3.3 V and a full output load range from 0 to 300 mA. A line regulation of 1.66 mV/V and a load regulation of 0.0334 mV/mA are achieved. The measured power‐supply rejection ratio at 1 kHz is −65 dB, and the measured output noise is only 34 μV. The total active chip size is approximately 0.4 mm² with a standard 0.5 μm complementary metal–oxide–semiconductor process. Copyright © 2017 John Wiley & Sons, Ltd.     

Analytical multi‐parametric stability boundaries of DC‐DC buck converters under V1 control concept

Two main methods for controlling switching converters exist in the literature. The direct one is the voltage mode control, which suffers from some disadvantages such as slow response to load variations and an input voltage‐dependent total loop gain. The current mode control can overcome these problems but at the expense of extra cost and more complex control design. V¹ concept is a new promising control technique for designing voltage mode control of buck‐type converters with an optimal response similar to current mode control. In this paper, the dynamics and the stability of buck converters under V¹ control are studied. In particular, subharmonic oscillation limits in the parameter space are addressed. First, a closed‐loop state‐space model is derived and then used to formulate an analytical matrix‐form expression for predicting the stability limit of the system. Using this expression, multi‐parametric stability boundaries are obtained. It is shown that the equivalent series inductance of the output capacitor can narrow the stability region. It is also demonstrated that the integral action in the feedback loop of a V¹‐controlled buck converter has a negligible effect on the subharmonic oscillation boundary. The theoretical analysis is validated through numerical simulation of the circuit‐level switched model of the system. Copyright © 2017 John Wiley & Sons, Ltd.     

Design and implementation of a high‐efficiency bidirectional DC‐DC Converter for DC micro‐grid system applications

This paper studies the design and implementation of a non‐isolated dual‐half‐bridge bidirectional DC‐DC converter for DC micro‐grid system applications. High efficiency can be achieved under wide‐range load variations by the zero‐voltage‐switching features and an adaptive phase‐shift control method. A three‐stage charging scheme is designed to meet the fast‐charging demand and prolong the lifetime of LiFePO₄ batteries. A digital‐signal‐processing control IC is used to realize the power flow control, DC‐bus voltage regulation, and battery charging/ discharging of the studied bidirectional DC‐DC converter. Finally, a 10 kW prototype converter with Enhanced Controller Area Network communication function is built and tested for micro‐grid system applications. A light‐load efficiency over 96% and a rated‐load efficiency over 98% can be achieved. Copyright © 2013 John Wiley & Sons, Ltd.     

A new non‐isolated free ripple input current bidirectional DC‐DC converter with capability of zero voltage switching

In this paper, a new nonisolated free ripple input current bidirectional dc‐dc converter with capability of zero voltage switching (ZVS) is proposed. The free ripple input current condition at low voltage side is achieved by using third winding of a coupled inductor and a capacitor for the whole range of duty cycles. In the proposed structure, the voltage conversion ratio can be more increased by adding the turn ratio of the second winding of the coupled inductor for the whole range of duty cycles. By adjusting the value of an auxiliary inductor in the topology of the converter, according to the power, the ZVS operation of the implemented 2 switches can be achieved throughout the whole power range. The mentioned features of proposed converter are validated theoretically for both boost and buck operations. In this paper, the proposed converter is analyzed for all operating modes. Moreover, all equations of the voltages and currents of all components, voltage conversion ratio, the required conditions for ZVS operation of switches, and also required conditions for canceling input current ripple at low voltage side are obtained. Finally, the performance of the proposed converter is reconfirmed through experimental and EMTDC/PSCAD simulation results.     

Modeling and control of a cascaded multilevel converter‐based electronic power transformer

Control strategy of a cascaded multilevel converter based electrical power transformer (EPT) in a distribution system with capabilities of low voltage ride‐through and unbalanced load current management is investigated in this study. The mathematical model and decoupled control schemes of the system, including a high‐voltage side control scheme, an isolation‐stage control scheme, and a low‐voltage side control scheme, are presented in detail. A dual current control scheme is introduced to control both positive and negative sequence currents for enhancing the low voltage ride‐through capability of the high‐voltage side cascaded H‐bridge converter. Positive, negative, and zero‐sequence voltages are controlled for the low voltage side three‐phase four‐wire converter in the decoupled control scheme, respectively, for unbalanced load current management. A proportional resonant controller (PRC) is utilized to control the zero‐sequence voltage, while the root locus method is applied in the PRC design. Three‐dimensional space vector pulse width modulation (PWM) switching strategy is then used for the low voltage side converter. Simulation studies were conducted with MATLAB/Simulink to validate the coordinated control strategy. © 2016 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.