一种应用于多带正交频分复用超宽带的IFFT/FFT处理器

针对多带正交频分复用超宽带(MB-OFDM UWB)系统,提出了一种高吞吐量、混合字长、混合基、4并行数据路径的128点IFFT/FFT处理器结构.该处理器采用具有误差补偿的改进Booth定长乘法器和CSD常量乘法器,有效地提高了精度和减少了硬件的复杂度.通过分析,本方案比混合基多路径延迟反馈(MRMDF)结构减少了49%的乘法器资源,在硬件开销相当的情况下,比双并行数据路径结构减少了30%的存储器资源和提高了33%的吞吐量,使该处理器在精度、硬件开销和速度上做了最好的折衷.在0.18μm COMS工艺下,该处理器的最大工作频率达到300 MHz,吞吐量为1.2 Gsamples/s,满足了吉比特无线个人域网络(WPAN)的要求.     

应用于FFT处理器的新型串接CSD常数乘法器设计

快速傅里叶变换(FFT)广泛应用于正交频分复用(OFDM)系统的调制与解调中。FFT的输出需要输入序列与旋转因子(TF)进行复数乘法运算,由于正则有符号数(CSD)常数乘法器实现简单、硬件开销小,常用于此类复数乘法运算,但随着旋转因子常数值个数的增加,其硬件开销会成倍增长。为了降低硬件开销,利用参数分解减少常数值个数的方法,提出了一种新型串接CSD常数乘法器。仿真结果显示对比常用的布斯乘法器,该新型串接CSD常数乘法器设计方案实现与旋转因子Wi128、Wi256以及Wi512进行复数乘法运算的硬件资源消耗分别减少41%、34%和25%。     

收扩喷管设计对双S形二元排气系统气动与红外特征的影响

为了研究双S形二元收扩排气系统的气动与红外辐射特性,基于一个基准加力型轴对称排气系统,设计了三种带正尾向全遮挡收扩喷管的双S形二元排气系统模型,通过数值模拟研究了喉道与出口的中心线偏径比差,(S₈?S₉)/D=0.26~0.3,和喉道至出口的宽度扩张比,(W₉?W₈)/D=0.1~0.36,对排气系统气动与红外特征的影响。结果表明:所设计的三种双S形二元收扩排气系统,相比基准轴对称排气系统,在尾向0°~15°角域内红外辐射强度平均降幅在73.4%以上,在上方、下方和侧方90°探测角降幅在60.3%以上,红外辐射强度降幅随(S₈?S₉)/D的减小而上升,随(W₉?W₈)/D的增大而上升,且对(S₈?S₉)/D的敏感较高。三种排气系统的推力系数随(S₈?S₉)/D与(W₉?W₈)/D的降低而上升。     

有效的模(2n+1)乘算法及其VLSI设计

模乘运算在剩余数值系统、数字信号处理系统及其它领域都具有广泛的应用,模乘法器的硬件实现具有重要的作用。提出了一种改进的模(2~n 1)余数乘法器的算法及其硬件结构,其输入为通常的二进制表示,因此无需另外的输人数据转换电路而可直接用于数字信号处理应用。通过利用模(2~n 1)运算的周期性简化其乘积项并重组求和项,以及采用改进的进位存储加法器和超前进位加法器优化结构以减少路径延时和硬件复杂度。比较其它同类设计,新的结构具有较好的面积、延时性能。     

阳极刻蚀提升Ga2O3肖特基势垒二极管击穿特性

提出了一种采用阳极刻蚀提升Ga₂O₃肖特基势垒二极管(SBD)击穿特性的新方法。基于氢化物气相外延(HVPE)法生长的Ga₂O₃材料制备了Ga₂O₃纵向SBD。在完成阳极制备后，对阳极以外的Ga₂O₃漂移区进行了不同深度的刻蚀，刻蚀完成后，在器件表面生长了SiO₂介质层，随后制备了场板结构。测试结果显示，刻蚀后器件的比导通电阻小幅上升，而反向击穿电压均大幅提升。刻蚀深度为300 nm的β-Ga₂O₃ SBD具有最优特性，其比导通电阻(R_{on, sp})为2.5 mΩ·cm²,击穿电压(V_br)为1 410 V,功率品质因子(FOM)为795 MW/cm²。该研究为高性能Ga₂O₃ SBD的制备提供了一种新方法。     

基于QCA的五输入Majority门设计及应用

Majority门作为多数逻辑电路的基本逻辑单元,其性能直接影响整体电路的质量.使用量子元胞自动机（QCA）设计Majority门具有结构简单的优点.本文提出了一种三层电路实现五输入Majority门的设计,并以此设计了全加器,进一步应用于多位加法器和乘法器中,与已发表的电路设计比较表明,其版图使用面积和元胞数有明显的减少,加法器元胞数和面积改进最高可达43%和87.2%,乘法器元胞数和面积改进最高可达48.2%和100%.     

艾里-高斯光束在高斯型PT对称介质中的传输与控制

以非线性薛定谔方程为理论模型，研究了艾里-高斯光束在高斯型PT(Parity-time)对称介质中的传输与控制。详细分析了高斯型PT对称介质的特征参数(调制深度P、调制因子ω、增益/损耗系数W₀)和艾里-高斯光束的特征参数(截断系数a、分布因子χ₀)对艾里-高斯光束的传输特性的影响。结果表明：在高斯型PT对称介质中，艾里-高斯光束可以形成振荡孤子，且可稳定传输。孤子的峰值强度随P、W₀、a的增大而增大，随ω的增大而减小；振荡周期随P和ω的增大而减小，随W₀的增大而增大。当χ₀增大时，在0<χ₀<0.55范围内，孤子的峰值强度变化不明显；当χ₀>0.55时，孤子的峰值强度迅速减小。该研究结果可为孤子在复杂非均匀介质中的传输及全光控制方面的应用提供理论基础。     

基于CORDIC旋转器的基-3 FFT算法高效设计

设计出一种可以用于FPGA高效实现的基-3 FFT算法,采用改进的三端前馈延迟转换器结构,优化了延迟和运算过程。针对蝶形运算中复数乘法器占据大量内存的问题,引入了CORDIC旋转器实现输入与旋转因子相乘的运算,可以降低乘法运算的复杂度,该CORDIC旋转器采用改进的高基CORDIC算法,解决了传统的CORDIC算法迭代次数多、延迟大的问题,从而达到高吞吐率要求。该基-3 FFT算法以寻址变序、流水处理的方式,可以满足最高运行频率为404 MHz的FFT处理要求。与基于传统复数乘法器的基-3 FFT算法相比,基于CORDIC旋转器的基-3 FFT算法使功耗平均减少了22%,使总延迟平均减少了29%。     

（论坛）基于低成本FPGA的FFT设计实现

摘 要： 介绍一种采用FPGA计算2048点10bit块浮点的FFT的硬件实现方法。本设计采用递归结构实现FFT处理模块,硬件资源消耗少;采用块浮点算法实现蝶形运算中的乘加运算,有很好的速度和精度;根据旋转因子特性减少50%的ROM资源。同时,本算法在高频带内幅值和频率检测更加精确。     

基于低硬件复杂度、高速CORDIC的SVD模块设计与实现

为降低实现高阶矩阵SVD时的硬件复杂度和计算延时,本文改进了CORDIC迭代结构,设计了一种用于SVD的低硬件复杂度、高速CORDIC计算单元.本文以2×2矩阵为例,基于XilinxVirtex6硬件平台设计并实现了使用优化后CORDIC计算单元的SVD模块,在19bit位宽下吞吐率达25.9Gbps.对比Xilinx IP core中同类模块,本文设计节省27.6%寄存器,27.7%查找表,实时性提高14%.对高阶矩阵,本文给出资源消耗趋势曲线,可证明优化后CORDIC计算单元能降低16阶矩阵SVD模块约40%的硬件复杂度.     

Interfacial reaction and shear strength of SnAgCu-xNi/Ni solder joints during aging at 150 °C

The interfacial microstructure and shear strength of Sn3.8Ag0.7Cu-xNi (SAC-xNi, x = 0.5, 1, and 2) composite solders on Ni/Au finished Cu pads were investigated in detail after aging at 150 °C for up to 1000 h. The interfacial characteristics of composite solder joints were affected significantly by the weight percentages of added Ni micro-particles and aging time. After aging for 200 h, the solder joints of SAC, SAC-0.5Ni and -1Ni presented duplex intermetallic compound (IMC) layers regardless of the initial interfacial structure on as-reflowed joints, whose upper and lower IMC layers were comprised of (CuNi)₆Sn₅ and (NiCu)₃Sn₄, respectively. Only a single (NiCu)₃Sn₄ IMC layer was ever observed at the SAC-2Ni/Ni interface on whole aging process. Based on the compositional analysis, the amount of Ni within the IMC regions increased as the proportion of Ni addition increased. The IMC (NiCu)₃Sn₄ layer thickness on the interface of SAC and SAC-0.5Ni grew more slowly when compared to that of SAC-1Ni and -2Ni, while for the (CuNi)₆Sn₅ layer the reverse is true. Except the IMCs sizes are increased with increased aging time, the interfacial IMCs tended to transfer their morphologies to polyhedra. In all composite joints testing, the shear strengths were approximately equal to non-composite joints. The fracturing observed during shear testing of composite joints occurred in the bulk solder, indicating that the SAC-xNi/Ni solder joints had a desirable joint reliability.     

有机发光二极管中ADN掺杂ErQ的1.54μm电致发光

自行设计了基于8-羟基喹啉铒(ErQ)为发射层(EMLs)和二硝酰胺铵(ADN)为蓝光主体材料的近红外有机发光二级管.器件的基本结构为(p-Si/NPB/EML/Bphen/Bphen:Cs2CO3/Sm/Au),设计并比较了三套不同发射层结构(ErQ/ADN为双层结构器件,(ErQ/ADN)×3为多层结构器件,ErQ:ADN为掺杂结构器件)的器件.三组器件在一定的偏压下,均可发出1.54μm的光,对应三价铒离子4I13/2→4I15/2的跃迁.其中,ADN:ErQ(1∶1)掺杂结构的近红外电致发光强度是ADN/ErQ双层结构中的三倍.此外,不同掺杂浓度的ADN:ErQ复合膜做了以下表征:吸收谱、光致发光谱和荧光寿命谱.实验结果证实了在近红外电致发光过程中存在从ADN主体分子到ErQ发射分子的高效率的能量转移.     

BNBST无铅压电陶瓷的制备工艺研究

设计了（Bi0.55Na0.5）1-X（BaaSrb）xTiO3（BNBST[100x-100a／100b]）无铅压电陶瓷新体系。该体系压电陶瓷具有工艺特性及压电响应好，压电常数高的特点，且有实际应用前景的新型压电陶瓷材料体系。采用传统的陶瓷工艺制备了（Bi0.55Na0.5）1-X（BaaSrb）xTiO3无铅压电陶瓷，研究了制备工艺参数对其物化结构性能的影响。生料的热重-差热（TGA-DTA）分析表明，粉料合成过程中，先是SrTiO3、BaTiO3的形成，然后是（Bi0．5Na0．5）Tio，的形成，同时三者形成固溶体；密度测试表明，陶瓷的体积密度随烧结温度的升高而增大，可较易获得理论密度94％的陶瓷；X-射线能谱分析（EDAX）研究表明，陶瓷的Bi、Na的挥发随着烧结温度的升高而加剧。研究结果表明，要制备性能优良的无铅压电陶瓷，需要精确控制制备工艺。     

Emerging interconnects: a state-of-the-art review and emerging solutions

Aluminium was a primary material for interconnection in integrated circuits (ICs) since their inception. Later, copper was introduced as interconnect material which has better metallic conductivity and resistance to electromigration. As the aggressive technology scaling continues, the copper resistivity increased because of size effects, which causes increase in delay, power dissipation and electromigration. The need to reduce the resistor-capacitor??????? delay, dynamic power utilisation and the crosstalk commotion is as of now the fundamental main impetus behind the presentation of new materials. The purpose of this paper is to do a survey of interconnect material used in IC from introduction of ICs to till date. This paper studies and reviews new materials available for interconnect application which are optical interconnects, carbon nanotube (CNT), graphene nanoribbons (GNRs) and silicon nanowires which are alternatives to copper. While doing a survey of interconnect material, it is found that multiwalled CNTs, multilayer GNR and mixed CNT bundles are promising candidates and are ultimate choice that can strongly address the problems faced by copper but on integration basis copper would last for coming years.     

聚对苯撑苯并双(口恶)唑发光及其器件制备

采用光谱技术,研究了聚对苯撑苯并双(口恶)唑(PBO)溶液的光敏发光特性,并用相对法估算出溶液发光效率在50%范围.结合光谱技术、半导体电学和电化学等研究手段,具体研究了以PBO为发光层的单层电致发光器件,研究结果显示,电致发光与薄膜的光致发光有具有相同的发光中心,峰值位于510 nm左右.同时发现,由于存制备过程中不同处理条件使得不同厚度薄膜残留的掺杂物质浓度不同,从而引起薄膜的导电性的不同.使得器件的阈值场强随PBO厚度的减小而逐渐增加.     

钠离子对poly(dT).poly(dA).poly(dT)三螺旋DNA分子呼吸模式的影响

利用分子结构的螺旋对称性,建立了一个包括钠离子的三链DNA分子poly(dT)*poly(dA)*poly(dT)的晶格动力学模型,计算了poly(dT)*poly(dA)*poly(dT)的氢键呼吸模式.结果发现钠离子的加入明显地淬灭了位于较低频率的几个最为强烈的Hoogensteen氢键呼吸模式,而对Watson-Crick氢键呼吸模式影响不明显,这说明钠离子能提高poly(dT)*poly(dA)*poly(dT)三螺旋结构的稳定性.该计算结果很好地解释了poly(dT)*poly(dA)*poly(dT)的热融化实验.     

人小肠粘膜免疫酶的定位研究—光镜和电镜免疫组织化学染色法

本文对免疫酶组织化学的样品制备程序和染色方法做了详细的阐述。用直接法、间接法和ABC法,对人小肠免疫酶的定位,进行了光镜和电镜的观察,染色阳性反应显著,获得了满意的效果。并对染色技巧做了分析和探讨。     

Arsenic deposition as a precursor layer on silicon (211) and (311) surfaces

We investigate the properties of arsenic (As) covered Si(211) and Si(311) surfaces by analyzing data from x-ray photoelectron spectroscopy (XPS) and low-energy electron diffraction (LEED) images. We then create a model using total surface energy calculations. It was found that both Si(211) and Si(311) had 0.68±0.08 surface As coverage. Si(211) had 0.28±0.04 Te coverage and Si(311) had 0.24±0.04 Te coverage. The Si(211) surface replaces the terrace and trench Si atoms with As for a lower surface energy, while the Si edge atoms form dimers. The Si(311) surface replaces all terrace atoms and adsorbs an As dimer every other edge site. These configurations imply an improvement in the mean migration path from the bare silicon surface by allowing the impinging atoms for the next epitaxial layer, tellurium (Te), to bind at every other pair of edge atoms, and not the step terrace sites. This would ensure a nonpolar, B-face growth.     

Joint estimation of TOA and DOA in IR-UWB system using a successive propagator method

Impulse radio ultra-wideband (IR-UWB) ranging and positioning require accurate estimation of time-of-arrival (TOA) and direction-of-arrival (DOA). With receiver of two antennas, both of the TOA and DOA parameters can be estimated via two-dimensional (2D) propagator method (PM), in which the 2D spectral peak searching, however, renders much higher computational complexity. This paper proposes a successive PM algorithm for joint TOA and DOA estimation in IR-UWB system to avoid 2D spectral peak searching. The proposed algorithm firstly gets the initial TOA estimates in the two antennas from the propagation matrix, then utilises successively one-dimensional (1D) local searches to achieve the estimation of TOAs in the two antennas, and finally obtains the DOA estimates via the difference in the TOAs between the two antennas. The proposed algorithm, which only requires 1D local searches, can avoid the high computational cost in 2D-PM algorithm. Furthermore, the proposed algorithm can obtain automatically paired parameters and has better joint TOA and DOA estimation performance than conventional PM algorithm, estimation of signal parameters via rotational invariance techniques algorithm and matrix pencil algorithm. Meanwhile, it has very close parameter estimation to that of 2D-PM algorithm. We have also derived the mean square error of TOA and DOA estimation of the proposed algorithm and the Cramer-Rao bound of TOA and DOA estimation in this paper. The simulation results verify the usefulness of the proposed algorithm.     

系统级封装新型埋入式电源滤波结构的研究

在高密度小尺寸的系统级封装(SiP)中,对供电系统的完整性要求越来越高,多芯片共用一个电源网路所产生的电压抖动除了会影响到芯片的正常工作,还会通过供电网路干扰到临近电路和其他敏感电路,导致芯片误动作,以及信号完整性和其他电磁干扰问题.这种电压抖动所占频带相当宽,几百MHz到几个GHz的中频电源噪声普通方法很难去除.结合埋入式电容和电源分割方法的特点,提出一种新型高性能埋入式电源低通滤波结构直接替代电源/地平面.研究表明,在0.65～4GHz的频带内隔离深度可达-40～75 dB,电源阻抗均在0.25ohm以下,实现了宽频高隔离度的高性能滤波作用.分别用电磁场和广义传输线两种仿真器模拟,高频等效电路模型分析这种低通滤波器的工作原理以及结构对隔离性能的影响,并进行了实验验证.