基于 Q -矩阵的LDPC码编码器设计

本文给出 Q 矩阵的定义,在此基础上提出由 Q 矩阵构造的LDPC码新码族;研究 Q 矩阵的性质,根据 Q 矩阵的性质和变化形式,提出一种构造稀疏奇偶校验矩阵 H 的算法,同时给出一种基于 Q 矩阵的LDPC码编码器设计算法.模拟仿真表明,采用和积迭代解码算法,在0.5码率,6144码长,10^-5以下误码率时, Q 矩阵LDPC码目前的最好性能达到离香农限1.5dB.本文还研究了快速搜索 Q 矩阵的算法.如果对 Q 矩阵采用离线搜索,在线存储 Q 矢量的方式,可使构造 H 矩阵的计算复杂度为零,编码器算法复杂度与编码长度N成线性关系. Q 矩阵LDPC码不同于现有其它结构LDPC码的独特之处在于,对码长和码率参数的设计具有高度灵活性,使其能与现有标准兼容.     

误码条件下LDPC码参数的盲估计

针对非合作信号处理中LDPC码（Low-Density Parity-Check）的盲识别问题,提出了一种容错能力较强的开集识别算法.该算法通过对码字矩阵进行高斯约旦消元找到汉明重量较小的"相关列",并根据"相关列"中所包含的约束关系求得LDPC码的校验向量,然后剔除"相关列"中为"1"位置对应的错误码字.若根据高斯约旦消元求校验向量和剔除错误码字进行迭代无法得到更多校验向量,则对得到的这些校验向量进行稀疏化,再进行译码纠错.最后,综合利用校验向量的求解,错误码字的剔除,校验向量稀疏化,LDPC码译码进行迭代,实现LDPC码校验矩阵的有效重建.仿真结果表明,对于IEEE 802.16e标准中的（576,288）LDPC码,在误比特率为0.0022时,本文算法仍可以达到较好的识别效果.     

一种半随机半代数的非正则LDPC码构造方法

LDPC码由于其卓越的纠错性能引起了学术界的广泛重视，当前LDPC所面临的一个主要问题是其编码复杂性的问题。本文给出了一种半代数半随机的非正则LDPC码构造方法，由该方法所构造的校验矩阵具有近似下三角特性，从而可以大大降低LDPC的编译码复杂性，同时具有与完全随机LDPC码相匹配的性能。     

Efficient encoding of low-density parity-check codes

Low-density parity-check (LDPC) codes can be considered serious competitors to turbo codes in terms of performance and complexity and they are based on a similar philosophy: constrained random code ensembles and iterative decoding algorithms. We consider the encoding problem for LDPC codes. More generally we consider the encoding problem for codes specified by sparse parity-check matrices. We show how to exploit the sparseness of the parity-check matrix to obtain efficient encoders. For the (3,6)-regular LDPC code, for example, the complexity of encoding is essentially quadratic in the block length. However, we show that the associated coefficient can be made quite small, so that encoding codes even of length n≃100000 is still quite practical. More importantly, we show that “optimized” codes actually admit linear time encoding     

Construction of Near-Optimum Burst Erasure Correcting Low-Density Parity-Check Codes

In this paper, a simple and effective tool for the design of low-density parity-check (LDPC) codes for iterative correction of bursts of erasures is presented. The design method consists of starting from the parity-check matrix of an LDPC code and developing an optimized parity-check matrix, with the same performance over the memoryless erasure channel, and suitable also for the iterative correction of single erasure bursts. The parity-check matrix optimization is performed by an algorithm called pivot searching and swapping (PSS) algorithm. It executes permutations of carefully chosen columns of the parity-check matrix, after a local analysis of particular variable nodes called stopping set pivots. This algorithm can be in principle applied to any LDPC code. If the input parity-check matrix is designed to achieve a good performance over the memoryless erasure channel, then the code obtained after the application of the algorithm provides a good joint correction of independent erasures and single erasure bursts. Numerical results are provided in order to show the algorithm effectiveness when applied to different categories of LDPC codes.     

HIGH-PERFORMANCE SIMPLE-ENCODING GENERATOR-BASED SYSTEMATIC IRREGULAR LDPC CODES AND RESULTED PRODUCT CODES

Low-Density Parity-Check (LDPC) code is one of the most exciting topics among the coding theory community.It is of great importance in both theory and practical communications over noisy channels.The most advantage of LDPC codes is their relatively lower decoding complexity compared with turbo codes,while the disadvantage is its higher encoding complexity.In this paper,a new ap- proach is first proposed to construct high performance irregular systematic LDPC codes based on sparse generator matrix,which can significantly reduce the encoding complexity under the same de- coding complexity as that of regular or irregular LDPC codes defined by traditional sparse parity-check matrix.Then,the proposed generator-based systematic irregular LDPC codes are adopted as con- stituent block codes in rows and columns to design a new kind of product codes family,which also can be interpreted as irregular LDPC codes characterized by graph and thus decoded iteratively.Finally, the performance of the generator-based LDPC codes and the resultant product codes is investigated over an Additive White Gaussian Noise (AWGN) and also compared with the conventional LDPC codes under the same conditions of decoding complexity and channel noise.     

LDPC硬件实现中的数据量化位数选择及其性能仿真

低密度奇偶校验(LDPC)码是基于稀疏校验矩阵的线性分组码,由于其优越的性能以及译码硬件实现的低复杂度,一直受到广泛关注.基于FPGA的译码硬件实现LDPC译码嚣的主要任务之一就是数据量化问题的解决.数据运算单元是整个译码器的核心,数据能否合理量化这一问题与该译码算法的可靠性、硬件电路的可实现性和译码性能密切相关.本文首先进行了译码算法的资源消耗分析,在综合考虑资源消耗和运算精度的基础上提出合理的量化数据选择,同时就量化数据位对译码器性能的影响进行了仿真.     

LDPC码稀疏奇偶校验矩阵与硬判决解码算法建模

提出了一种以奇偶校验和作为消息传递的LDPC码硬判决解码方案。该方案以奇偶校验方程是否满足约束为条件,从而决定接收分组中的错误位,并对错误位进行翻转。文中归纳了稀疏奇偶校验矩阵的描述,在此基础上引入校验树结构对解码方案进行可行性分析和描述。最后提出一种具体可实现的解码算法模型。     

On the Construction of Quasi-Systematic Block-Circulant LDPC Codes

A class of quasi-systematic block-circulant LDPC (QSBC-LDPC) Codes is proposed. The parity-check matrix of a QSBC-LDPC code is a sparse block-circulant matrix with a quasi-systematic structure. Due to the special structure of the parity-check matrix, only limited memories, XOR computations and cyclic-shifting operations are needed in the recursive encoding process of the QSBC-LDPC codes. Simulations show that the QSBC-LDPC codes provide remarkable performance improvement with low encoding complexity.     

基于等差数列的LDPC码编码器设计

本文提出一种基于等差数列构造LDPC码的新码类,称为D-LDPC码.文中给出了D-LDPC码的 D 矢量和 D 矩阵的定义,提供一个不含4线循环的确定结构的稀疏奇偶校验矩阵 H 的通用结构,提出一种递归形式的D-LDPC码编码器设计算法.D-LDPC码的编码计算复杂度为O(M),低于卷积码的O(N)复杂度;在中、低码长,任意码率时,性能可与卷积码比美,甚至超越卷积码;编码参数设计灵活,既能与现有标准兼容,又能满足未来发展的需求.     

Design of Low-Rate Irregular LDPC Codes Using Trellis Search

A simple design method using trellis search is proposed for good low-density parity-check (LDPC) codes with relatively low code rates. By applying a trellis search technique to the design of a pre-assigned part of the parity-check matrix that allows a simple encoding, we improve the distribution of cycles formed by the entries contained in the parity-check part of the parity-check matrix. In addition, we extend the proposed algorithm to a class of structured LDPC codes, which have been recently preferred in many practical applications. Simulation results show that the codes designed by the proposed method outperform those constructed by conventionally used greedy design algorithms.     

LDPC码全并行译码器的设计与实现

本论文用可编程逻辑器件(FPGA)实现了一种低密度奇偶校验码(LDPC)的编译码算法.采用基于Q矩阵LDPC码构造方法,设计了具有线性复杂度的编码器. 基于软判决译码规则,采用全并行译码结构实现了码率为1/2、码长为40比特的准规则LDPC码译码器,并且通过了仿真测试.该译码器复杂度与码长成线性关系,与Turbo码相比更易于硬件实现,并能达到更高的传输速率.     

LDPC编译码算法分析

低密度奇偶校验(LDPC)码是一种线性分组码,其纠错能力可以接近香农极限。针对LDPC码的编译码问题,分析了校验矩阵的构造方法。给出了LDPC码的编码算法以及算法的实现结构。分析了基于软判决的置信传播(BP)译码算法,并给出了可以进一步降低计算复杂度的简化译码方法。通过仿真对比了不同的译码算法在高斯信道下的译码性能。     

Quasi-cyclic LDPC codes for fast encoding

In this correspondence we present a special class of quasi-cyclic low-density parity-check (QC-LDPC) codes, called block-type LDPC (B-LDPC) codes, which have an efficient encoding algorithm due to the simple structure of their parity-check matrices. Since the parity-check matrix of a QC-LDPC code consists of circulant permutation matrices or the zero matrix, the required memory for storing it can be significantly reduced, as compared with randomly constructed LDPC codes. We show that the girth of a QC-LDPC code is upper-bounded by a certain number which is determined by the positions of circulant permutation matrices. The B-LDPC codes are constructed as irregular QC-LDPC codes with parity-check matrices of an almost lower triangular form so that they have an efficient encoding algorithm, good noise threshold, and low error floor. Their encoding complexity is linearly scaled regardless of the size of circulant permutation matrices.     

Memory Access Optimized Implementation of Cyclic and Quasi-Cyclic LDPC Codes on a GPGPU

Software based decoding of low-density parity-check (LDPC) codes frequently takes very long time, thus the general purpose graphics processing units (GPGPUs) that support massively parallel processing can be very useful for speeding up the simulation. In LDPC decoding, the parity-check matrix H needs to be accessed at every node updating process, and the size of the matrix is often larger than that of GPU on-chip memory especially when the code length is long or the weight is high. In this work, the parity-check matrix of cyclic or quasi-cyclic (QC) LDPC codes is greatly compressed by exploiting the periodic property of the matrix. Also, vacant elements are eliminated from the sparse message arrays to utilize the coalesced access of global memory supported by GPGPUs. Regular projective geometry (PG) and irregular QC LDPC codes are used for sum-product algorithm based decoding with the GTX-285 NVIDIA graphics processing unit (GPU), and considerable speed-up results are obtained.     

准规则Q矩阵LDPC码编码器设计

设计了一种准规则Q矩阵LDPC码编码器.该编码器基于准规则Q矩阵LDPC码的校验矩阵,其编码复杂度与信息位的长度成正比,有效降低了编码复杂度和设计难度.在Quartus Ⅱ平台上用FPGA实现了该编码器,结果证明其硬件资源占用很少.     

一种高码率低复杂度准循环LDPC码设计研究

该文设计了一种特殊的高码率准循环低密度校验(QC-LDPC)码,其校验矩阵以单位矩阵的循环移位阵为基本单元,与随机构造的LDPC码相比可节省大量存储单元。利用该码校验矩阵的近似下三角特性,一种高效的递推编码方法被提出,它使得该码编码复杂度与码长成线性关系。另外,该文提出一种分析QC-LDPC码二分图中短长度环分布情况的方法,并且给出了相应的不含长为4环QC-LDPC码的构造方法。计算机仿真结果表明,新码不但编码简单,而且具有高纠错能力、低误码平层。     

Efficient encoding of quasi-cyclic low-density parity-check codes

Quasi-cyclic (QC) low-density parity-check (LDPC) codes form an important subclass of LDPC codes. These codes have encoding advantage over other types of LDPC codes. This paper addresses the issue of efficient encoding of QC-LDPC codes. Two methods are presented to find the generator matrices of QC-LDPC codes in systematic-circulant (SC) form from their parity-check matrices, given in circulant form. Based on the SC form of the generator matrix of a QC-LDPC code, various types of encoding circuits using simple shift registers are devised. It is shown that the encoding complexity of a QC-LDPC code is linearly proportional to the number of parity bits of the code for serial encoding, and to the length of the code for high-speed parallel encoding.     

Parity-Check Density Versus Performance of Binary Linear Block Codes: New Bounds and Applications

The moderate complexity of low-density parity-check (LDPC) codes under iterative decoding is attributed to the sparseness of their parity-check matrices. It is therefore of interest to consider how sparse parity-check matrices of binary linear block codes can be a function of the gap between their achievable rates and the channel capacity. This issue was addressed by Sason and Urbanke, and it is revisited in this paper. The remarkable performance of LDPC codes under practical and suboptimal decoding algorithms motivates the assessment of the inherent loss in performance which is attributed to the structure of the code or ensemble under maximum-likelihood (ML) decoding, and the additional loss which is imposed by the suboptimality of the decoder. These issues are addressed by obtaining upper bounds on the achievable rates of binary linear block codes, and lower bounds on the asymptotic density of their parity-check matrices as a function of the gap between their achievable rates and the channel capacity; these bounds are valid under ML decoding, and hence, they are valid for any suboptimal decoding algorithm. The new bounds improve on previously reported results by Burshtein and by Sason and Urbanke, and they hold for the case where the transmission takes place over an arbitrary memoryless binary-input output-symmetric (MBIOS) channel. The significance of these information-theoretic bounds is in assessing the tradeoff between the asymptotic performance of LDPC codes and their decoding complexity (per iteration) under message-passing decoding. They are also helpful in studying the potential achievable rates of ensembles of LDPC codes under optimal decoding; by comparing these thresholds with those calculated by the density evolution technique, one obtains a measure for the asymptotic suboptimality of iterative decoding algorithms     

基于稀疏二进制序列的低密度奇偶校验码

通过对低密度奇偶校验(LDPC)码构造的研究,提出了一种利用稀疏二进制序列构造规则LDPC码的新颖而简单的方法。在构造中,还提出了奇偶校验矩阵里元素‘1’的分布矩阵的概念。为了确保码Tanner图的最小圈长为8,利用了序列的周期自相关函数和周期互相关函数。通过仿真表明构造的新码在和积算法下进行迭代解码性能优异。由于产生的LDPC码本身固有的准循环结构,还能得到较低的编码复杂度。