Reliability of Au bump––Cu direct interconnections fabricated by means of surface activated bonding method

As a room temperature bonding method, surface activated bonding (SAB) method has been introduced to be one of the most appropriate interconnection methods for the next generation of electronic packaging. Thus it is important to study the reliability of SAB interconnection in long term life test.In this paper, interconnections of Au bump and Cu film bonded by SAB method were performed in high temperature thermal aging test. Degradation of properties such as electrical resistance, shear strength of bump and interface microstructure during aging process were studied to investigate the failure mechanism of the interconnection. Intermetallic compound Cu₃Au was found formed at the interface during thermal aging, and it causes evolvement of the properties and failure mode of the interconnection changing in shear test. Results reveal that SAB is suitable for the interconnection between Au bump and Cu film and it is reliable in thermal reliability test.     

帧中继技术在局域网互连中的应用

帧中继是一种ＩＳＤＮ分组模式承载服务。它以其简单的网络／用户接口提供了良好的灵活性和较高的数据传输率。其结构特点适合于局域网的互连。讨论帧中继服务和它与网络互连有关的特征。提出通过中继实现局网互连的方法。     

并行计算机系统的光WDM互连链路

光波分复用 (WDM)互连接是并行计算机系统克服“电子瓶颈”的可行方案 ,光纤传输的特性可使大容量、低时延、低误码率传输的并行计算机互连成为现实。探讨了并行计算机光WDM互连的一种结构 ,分析研究了其中的关键技术 ,并设计了一个实验系统。分析和实验表明采用光WDM互连可以实现超大容量的并行计算机系统     

Package to board interconnection shear strength (PBISS): effect of surface finish, PWB build-up layer and chip scale package structure

The quality of the interconnection in a fine pitch, area array chip scale package (CSP) is evaluated at the system level using a new test method, the package to board interconnection shear strength (PBISS) technique. The influence of printed wiring board (PWB) sample finish, build-up layer and package structure are quantified after surface mount assembly. Clear differences were evident in the shear strength and fracture location data indicating that the PBISS method is sensitive to the presence of black pad, weak build-up layer and package stiffness. The PBISS value of the CSPs with OSP/RCC-FR4 pad/build-up layer combination were measured to be 37 /spl plusmn/ 6 MPa and 38 /spl plusmn/ 2 MPa for the two different structures investigated. The PBISS method is demonstrated to be a viable candidate technique to quantify interconnection quality at the system level due to issues such as black pad, etc. and this method can help identify weaknesses in the interconnection chain for effective assessment of supplier or product quality.     

时延驱动的VLSI版图规划算法

本文提出了时延驱动布图规划的思想。在用改进的广义力矢量法优化功能单元间连线时延的同时，运算非线性规划的方法进一步优化关键路径上功能单元的时延及连线时延。结果表明，这是一种有效的优化版图时延的方法。     

Method of testing the quality of bars of single-crystal yttrium-iron garnet

A direct method for measuring the linewidth and testing the quality of bars of single-crystal yttrium-iron garnet used in microwave delay lines is described. The technique represents a method of optimising the conventional magnetostatic delay line.     

纯位相片光学互连实验研究

本文给出一维互连系统中纯位相片计算结果,介绍用反应离子刻蚀制备纯位相片的方法以及用此位相片进行一维互连的实验结果。实验结果与理论计算相符。     

A mathematical programming method for constructing the shortest interconnection VLSI arrays

Mesh-connected processor array is an extensively investigated architecture in parallel processing. Massive studies have addressed the problem of using reconfiguration algorithms to solve the fault tolerance of faulty mesh-connected processor arrays. However, the subarrays generated by the previous studies still contain large interconnection length, which will lead to the increase of capacitance, power dissipation and dynamic communication cost. First, a mathematical model is established for the array reconfiguration. Then, the proposed method treats the interconnections between each PEs as a function with different integer variables, which can be solved by using effective integer programming techniques. Finally, an effective solver is called to find the optimal solution. Simulation results show that the proposed method can reduce the interconnection length of the array in the row and column directions simultaneously, thereby generating a subarray with the shortest interconnection length. On a 32 × 32 host array with fault density of 30%, the total interconnection length of the subarray can be reduced by 8.36% compared with state-of-the-art, and the average interconnection length can be reduced by 39.30%, which is more closer to the lower bound.     

GMRES方法在3-D寄生电容计算中的应用

随着VLSI向深亚微米发展、集成电路密度不断提高,互连延迟成了加快器件速度的一个限制因素,由于互连延迟是由金属连线间的电阻及电容所产生的,因此萃取寄生参数的工作更显重要.文章使用GMRES方法求解了3-D寄生电容分析的复系数线性方程组,并将其与SOR迭代法相比较.这种方法可以降低方程的迭代次数约20%,并明显减少了方程的求解时间.     

二阶互连光学神经网络

本文提出一种用一块单极性掩模板表示双极性互连矩阵的偏振编码方法。并用二种非相干光电混合系统分别实现了二阶互连神经网络。最后给出实验结果。     

Dynamic clustering of interval data based on adaptive Chebyshev distances

A dynamic clustering method for interval data is presented. This method furnishes a partition and a prototype for each cluster by optimising a criterion based on adaptive Chebyshev distances. Experiments with real and artificial interval data sets have demonstrated the usefulness of this method.     

光计算中全排列无阻塞双Omega光互连网络的光学实现方法

本文分析了单个Ｏｍｅｇａ光互连网络的局限性，提出了一种全排列无阻塞双Ｏｍｅｇａ光互连网络的光学实现方法。光回路系统由Ａｒ＋３离子激光器、光束分束器、偏振组合棱镜和液晶空间光开关组成，能够实现输入信号列阵光束的并行传输和全排列无阻塞光互连。     

目标边缘增强对神经网络性能的改进

对有限灰阶的增量算法进行了进一步的研究和改进，提出用边缘增加的训练样本代替普通样本模式进行互连权重的学习。通过对边缘增强的４种飞行器平面内旋转投影图识别，证明此方法可使神经网络互连权重的灰阶数目进下降低，从而更易于光学硬件实现。     

Z向连接技术在高多层板上的应用

Z向连接技术目前由于其可有效减少过孔数量,提高半导体封装密度,被应用于半导体封装的高端领域。本文将重点介绍该Z向连接技术在经过优化之后,在高多层板上的应用,并对其几种连接结构进行了分析和对比,同时对其加工材料、制作加工以及相关的测试进行了详细说明。     

可重构硬件芯片级故障定位与自主修复方法

 外部集中控制的可重构硬件容错系统,其重构控制算法复杂、重构时间开销大,且存在单点失效问题.本文研究芯片级分布式在线自主容错技术,提出了能够实现芯片级自修复的新型可重构硬件细胞阵列结构,阐述了互连资源的在线故障定位和自主修复方法.设计了功能细胞电路和容错开关块电路,采用分段定位法检测互连资源中多路器故障和连线开路故障,通过重配置布线和线移位操作分别实现多路器与连线故障自修复.以4位串并乘法器电路为例进行实验验证,分析了容错设计的硬件开销与时间开销,实验结果表明新方案的容错时间短、资源利用率高.     

无线传感器网络与IPv6网络的互联方式研究

如何实现无线传感器网络(WSN)与TCP/IP(v6)网络的互联是当前的热点研究方向之一,全IP互联方式是当前讨论最为激烈的焦点问题.在WSN内部是否需要采用IPv6,是WSN协议设计需要回答的一个基本问题,其结论将在很大程度上影响今后WSN协议发展的基本走向.本文首先介绍了WSN与IPv6网络互联的各种方式,然后重点对采用全IP互联方式的必要性以及需要解决的关键技术问题进行了分析探讨,分析结果表明:全IP方式是实现WSN与IPv6网络互联的一种非常重要的思路,值得进行深入研究.     

一种数字电路高层综合器DCS

本文介绍一种数字电路综合器ＤＣＳ，重点讨论数据流分配及控制时序的实现。其中，操作符分配采用团划分算法，连线分配采用基于规则的方法，控制器综合采用基于计数器的设计方法。     

Re-optimisation of LPC filters for multi-pulse coded excitation

A method for optimising LPC filters in linear prediction based speech coders is described. The optimisation process compensates for errors incurred through coding the excitation signal, providing an improvement in the quality of the decoded speech, with no increase in bit rate     

一种基于TSV和激光刻蚀辅助互连的改进型CIS封装

提出了一种基于硅通孔(TSV)和激光刻蚀辅助互连的改进型CMOS图像传感器(CIS)圆片级封装方法.对CIS芯片电极背部引出的关键工艺,如锥形TSV形成、TSV绝缘隔离、重布线(RDL)等进行了研究.采用低温电感耦合等离子体增强型化学气相淀积(ICPECVD)的方法实现TSV内绝缘隔离;采用激光刻蚀开口和RDL方法实现CIS电极的背部引出;通过采用铝电极电镀镍层的方法解决了激光刻蚀工艺中聚合物溢出影响互连的问题,提高了互连可靠性.对锥形TSV刻蚀参数进行了优化.最终在4英寸(1英寸=2.54 cm)硅/玻璃键合圆片上实现了含有276个电极的CIS圆片级封装.电性能测试结果表明,CIS圆片级封装具有良好的互连导电性,两个相邻电极间平均电阻值约为7.6Ω.     

Method for designing recursive digital filters with short wordlength

With specified passband ripple, stopband ripple and cutoff frequencies, this method employs Crochiere's 2-parameter optimisation to equalise the passband and stopband statistical wordlengths before optimising coefficients in a multi-dimensional discrete space. Better design can be obtained by investing more computational time. This method is applicable to any recursive digital filters.