Method for Designing Efficient Mixed Radix Multipliers

The multiplication of two signed inputs, \(A {\times } B\) , can be accelerated by using the iterative Booth algorithm. Although high radix multipliers require summing a smaller number of partial products, and consume less power, its performance is restricted by the generation of the required hard multiples of B ( \(\pm \phi B\) terms). Mixed radix architectures are presented herein as a method to exploit the use of several radices. In order to implement efficient multipliers, we propose to overlap the computation of the \(\pm \phi B\) terms for higher radices with the addition of the partial products associated to lower radices. Two approaches are presented which have different advantages, namely a combinatory design and a synchronous design. The best solutions for the combinatory mixed radix multiplier for \(64\times 64\) bits require \(8.78\) and \(6.55~\%\) less area and delay in comparison to its counterpart radix-4 multiplier, whereas the synchronous solution for \(64\times 64\) bits is almost \(4{\times }\) smaller in comparison with the combinatory solution, although at the cost of about \(5.3{\times }\) slowdown. Moreover, we propose to extend this technique to further improve the multipliers for residue number systems. Experimental results demonstrate that best proposed modulo \(2^{n}{-}1\) and \(2^{n}{+}1\) multiplier designs for the same width, \(64{\times }64\) bits, provide an Area-Delay-Product similar for the case of the combinatory approach and \(20~\%\) reduction for the synchronous design, when compared to their respective counterpart radix-4 solutions.     

Novel Tight Closed-Form Bounds for the Symbol Error Rate of EGC and MRC Diversity Receivers Employing Linear Modulations Over \alpha -\mu Fading

In this paper, we propose novel lower and upper bounds on the average symbol error rate (SER) of the dual-branch maximal-ratio combining and equal-gain combining diversity receivers assuming independent branches. \(M\) -ary pulse amplitude modulation and \(M\) -ary phase shift keying schemes are employed and operation over the \(\alpha -\mu \) fading channel is assumed. The proposed bounds are given in closed form and are very simple to calculate as they are composed of a double finite summation of basic functions that are readily available in the commercial software packages. Furthermore, the proposed bounds are valid for any combination of the parameters \(\alpha \) and \(\mu \) as well as \(M\) . Numerical results presented show that the proposed bounds are very tight when compared to the exact SER obtained via performing the exact integrations numerically making them an attractive much simpler alternative for SER evaluation studies.     

A Rate \text{ M }_{\mathrm{T}} Full Diversity STF Block Coded 4\times 4 MIMO-OFDM System with Reduced Complexity

Multiple input multiple output (MIMO) communication systems with orthogonal frequency division multiplexing (OFDM) has a great role to play for 4G broadband wireless communications. In this paper, a space time frequency (STF) code is presented with reduced decoder complexity and to achieve code rate $\text{ M }_\mathrm{T}$ with full diversity of $\text{ M }_{\mathrm{T}} \text{ M }_{\mathrm{R}} \text{ N }_{\mathrm{b}}$ L i.e., product of number of transmit antennas ( $\text{ M }_\mathrm{T}$ ), receive antennas $(\text{ M }_{\mathrm{R}})$ , fading blocks $(\text{ N }_{\mathrm{b}})$ and channel taps (L). The maximum achievable diversity with high rate of STF block coded MIMO-OFDM is analyzed and verified by simulation results. The decoder complexity is resolved by employing several approaches like maximum likelihood (ML), sphere decoder (SD) and array processing. The performance of STF code is compared with existing layered algebraic STF code in terms of decoder complexity and bit error rate (BER). Further, the closed form expressions for BER performance of STFBC MIMO-OFDM systems are derived and evaluated for frequency selective block fading channels with MPSK constellations.     

An Ideal Multi-secret Sharing Scheme Based on Connectivity of Graphs

Secure communication has become more and more important for many modern communication applications. In a secure communication, every pair of users need to have a secure communication channel (each channel is controlled by a server) In this paper, using monotone span programs we devise an ideal linear multi-secret sharing scheme based on connectivity of graphs. In our proposed scheme, we assume that every pair of users, \(p\) and \(q\) , use the secret key \(s_{pq} \) to communicate with each other and every server has a secret share such that a set of servers can recover \(s_{pq} \) if the channels controlled by the servers in this set can connect users, \(p\) and \(q\) . The multi-secret sharing scheme can provide efficiency for key management. We also prove that the proposed scheme satisfies the definition of a perfect multi-secret sharing scheme. Our proposed scheme is desirable for secure and efficient secure communications.     

Anisotropic Thermopower of the Kondo Insulator \hbox {CeRu}_4\hbox {Sn}_6

The intermetallic compound \(\hbox {CeRu}_4\hbox {Sn}_6\) has been tentatively classified as Kondo insulator. This class of material, especially non-cubic representatives, is not yet fully understood. Here we report thermopower measurements on single-crystalline \(\hbox {CeRu}_4\hbox {Sn}_6\) between 2 K and 650 K, along the main crystallographic directions. Large positive thermopower is observed in the directions along which the hybridization is strong and a Kondo insulating gap forms. A negative contribution to the thermopower dominates for the crystallographic \(c\) axis where hybridization is weak and metallicity prevails.     

Efficient Reverse Converters for 4-Moduli Sets {2^{2n-1}-1, 2^{n}, 2^{n}+1, 2^{n}-1} and {2^{2n-1}, 2^{2n-1}-1, 2^{n}+1, 2^{n}-1} Based on CRTs Algorithm

Speed and complexity of a reverse converter are two important factors that affect the performance of a residue number system. In this paper, two efficient reverse converters are proposed for the 4-moduli sets {2 \(^{2n-1}-1\) , 2 \(^{n}\) , 2 \(^{n}+1\) , 2 \(^{n}-1\) } and {2 \(^{2n-1}\) , 2 \(^{2n-1}-1\) , 2 \(^{n}+1\) , 2 \(^{n}-1\) } with 5 \(n\) -bit and 6 \(n\) -bit dynamic range, respectively. The proposed reverse converter for moduli set {2 \(^{2n-1}-1\) , 2 \(^{n}\) , 2 \(^{n}+1\) , 2 \(^{n}-1\) } has been designed based on CRT and New CRT-I algorithms and in two-level structure. Also, an efficient reverse converter for moduli set {2 \(^{2n-1}\) , 2 \(^{2n-1}-1\) , 2 \(^{n}+1\) , 2 \(^{n}-1\) } has been designed by applying New CRT-I algorithm. The proposed reverse converters are based on adders and hence can be simply implemented by VLSI circuit technology. The proposed reverse converters offer less delay and hardware cost when compared with the recently introduced reverse converters for the moduli sets {2 \(^{n}+1\) , 2 \(^{n}-1\) ,2 \(^{n}\) , 2 \(^{2n+1}-1\) } and {2 \(^{n}+1\) , 2 \(^{n}-1\) , 2 \(^{2n}\) , 2 \(^{2n+1}-1\) }.     

Mutual Distance Bounding Protocol with Its Implementability Over a Noisy Channel and Its Utilization for Key Agreement in Peer-to-Peer Wireless Networks

In order to protect a wireless sensor network and an RFID system against wormhole and relay attacks respectively, distance bounding protocols are suggested for the past decade. In these protocols, a verifier authenticates a user as well as estimating an upper bound for the physical distance between the user and itself. Recently, distance bounding protocols, each with a mutual authentication, are proposed to increase the security level for such systems. They are also suggested to be deployed for key agreement protocols in a short-range wireless communication system to prevent Man-in-the-Middle attack. In this paper, a new mutual distance bounding protocol called NMDB is proposed with two security parameters ( \(n\) and \(t\) ). The parameter \(n\) denotes the number of iterations in an execution of the protocol and the parameter \(t\) presents the number of errors acceptable by the verifier during \(n\) iterations. This novel protocol is implementable in a noisy wireless environment without requiring final confirmation message. Moreover, it is shown that, how this protocol can be employed for the key agreement procedures to resist against Man-in-the-Middle attack. NMDB is also analyzed in a noisy environment to compute the success probability of attackers and the rejection probability of a valid user due to channel errors. The analytically obtained results show that, with the proper selection of the security parameters ( \(n\) and \(t\) ) in a known noisy environment, NMDB provides an appropriate security level with a reliable performance.     

Delay-dependent robust H_\infty control for 2-D discrete nonlinear systems with state delays

This paper investigates the problem of robust \(H_\infty \) control for a class of 2-D (two-dimensional) discrete state delayed systems with sector nonlinearity described by a model of Roesser type. Firstly, a delay-dependent sufficient condition of robust exponential stability for such 2-D discrete systems is derived in linear matrix inequalities (LMIs) form. Secondly, a delay-dependent exponential stability criterion with \(H_\infty \) performance for the considered systems is also proposed. Then a state feedback \(H_\infty \) controller is constructed based on the above results. Finally, numerical examples are given to illustrate the effectiveness of the proposed method.     

A 5 GHZ CMOS Power VCO with Novel Frequency-Modulation for RF Transmitter

A 5 GHz transformer-feedback power oscillator with novel frequency modulation (FM) up to 10 MHz is presented in this paper. The novel FM is achieved by a CMOS transistor between transformer and ground, which is designed for varying the equivalent inductance and mutual inductance of the transformer and shows no DC connection with the oscillation circuit. The major frequency tuning is realized by the variable capacitor which is controlled by a phase lock loop. The RF VCO with 210 MHz tuning range operates in class-E mode to achieve a cost-effective transmitter, which demonstrates a high DC-to-RF conversion efficiency of 39 %. A RF power of 15.1 dBm and phase noise better than \(-\) 109 dBc/Hz @ 100 kHz from the central frequency of 5.5 GHz is obtained with the biasing conditions V \(_\mathrm{ds}\) = 1.8 V and V \(_\mathrm{gs}\) = 0.65 V. The VCO also demonstrates an ultra-low voltage operation capability: with V \(_\mathrm{ds}\) = V \(_\mathrm{gs}\) = 0.6 V and DC power consumption of 9 mW, the output power is 4.5 dBm and the phase noise better than \(-\) 93 dBc/Hz @ 100 kHz. The die size of the transformer-feedback power oscillator is only \(0.4\times 0.6\) mm \(^{2}\) .     

E-TCAM: An Efficient SRAM-Based Architecture for TCAM

Ternary content addressable memories (TCAMs) perform high-speed search operation in a deterministic time. However, when compared with static random access memories (SRAMs), TCAMs suffer from certain limitations such as low-storage density, relatively slow access time, low scalability, complex circuitry, and higher cost. One fundamental question is that can we utilize SRAM to combine it with additional logic to achieve the TCAM functionality? This paper proposes an efficient memory architecture, called E-TCAM, which emulates the TCAM functionality with SRAM. E-TCAM logically divides the classical TCAM table along columns and rows into hybrid TCAM subtables and then maps them to their corresponding memory blocks. During search operation, the memory blocks are accessed by their corresponding subwords of the input word and a match address is produced. An example design of \(512\times 36\) of E-TCAM has been successfully implemented on Xilinx Virtex- \(5\) , Virtex- \(6\) , and Virtex- \(7\) field-programmable gate arrays (FPGAs). FPGA implementation results show that E-TCAM obtains \(33.33\)  % reduction in block-RAMs, \(71.07\)  % in slice registers, \(77.16\)  % in lookup tables, \(53.54\)  % in energy/bit/search, and offers \(63.03\)  % improvement in speed, compared with the best available SRAM-based TCAM designs.     

Ultra-Low Power Read-Decoupled SRAMs with Ultra-Low Write-Bitline Voltage Swing

We propose an ultra-low power memory design method based on the ultra-low ( \(\sim \) 0.2 V) write-bitline voltage swing to reduce the write power dissipation for read-decoupled SRAM (RD-SRAM) cells. By keeping the write bitlines at ground level (0 V) during standby and charging them to a low voltage \(V_\mathrm{L}\) ( \(\sim \) 0.2 V) during write operations, the power dissipation for the write bitlines is greatly reduced (0.2 V/ \(V_\mathrm{DD})^{ 2 }\,\times \) 100 %) due to reduced voltage swing (from \(V_\mathrm{DD }\)  = 1.2 to 0.2 V) on the write bitlines. The proposed method is applicable to both dual-voltage and single-voltage operations. We analyze the proposed ultra-low write-bitline voltage swing method and investigate its reliability based on 10K Monte-Carlo simulations. We further verify the functionality and performance of our proposed design through measurements on the fabricated prototypes based on the 65 nm CMOS process. By means of a \(256 \times 64\) bit RD-SRAM memory implementation, we show that our proposed method reduces 87 % write power dissipation when compared to a conventional design.     

Minimum payment collaborative sensing network using mobile phones

Mobile phones with embedded sensors have been applied in various collaborative sensing applications. To encourage mobile phone users to perform collaborative sensing, the data demanders usually pay mobile phone users for required data. In this paper, we study the Minimum Payment of Attaining the Required Data with mobile phones (MPARD) problem in collaborative sensing network: given sensing regions \(R = \{R_1, R_2, \ldots , R_m\}\) , the set of requisite data \(D_i\) for each sensing region \(R_i\) and a set of mobile phones \(M\) , the \(MPARD\) problem studies how to select mobile phones to obtain all the required data such that the data demanders’ total payment to mobile phone users is minimized. In reality, some systems need the fresh sensing data from mobile phones at each pre-determined time slot, and others don’t require the real-time data and the sensing data from previous time slots is also deemed useful. Based on the above two different requirements of data timeliness, we first define two subproblems derived from \(MPARD\) problem: \(MPARD_t\) and \(MPARD_p\) . After that, for each subproblem, we propose an approximation algorithm for the situation where the trajectories of mobile phones are determinate and a heuristic for the situation where trajectories are unknown. Simulation results demonstrate that our algorithms are efficient.     

Downlink SINR Study in Multiuser Large Scale Antenna Systems

In this paper, the downlink signal-to-interference-plus-noise ratio (SINR) performance in multiuser large scale antenna systems with matched filter (MF) and regularized zero-forcing (RZF) precoding is investigated. The probability density function (PDF) for MF is derived and the distribution in high signal-to-noise ratio (SNR) regime is studied. Results indicate that the PDF of downlink SINR for MF converges to \(\mathcal F\) distribution when the interference is dominant over noise. For MF, the asymptotic SINR is just the reciprocal of the ratio of the number of users \(U\) to the number of transmit antennas \(N\) , and is irrelevant to the average transmit power when \(N\) and \(U\) grow with fixed ratio. However, when \(U\) is a large constant, the transmit power could be proportional to \(\ln N \big /N \) to maintain a specified quality of service, as a result of the large scale antenna system effect. In addition, the closed form of asymptotic SINR for RZF is derived by solving two mathematical expectations related to eigenvalues of large dimensional random matrices. Simulation results validate the derived PDF and analytical results.     

Construction of (2k,k, 2) Convolutional Codes with Double-Loop Cyclic Codes

In this paper, by taking multiple-time information in blocks into the coding of linear block codes, a new class of (2 \(k\) , \(k\) , 2) convolutional codes is constructed, by which a new way of constructing long codes with short ones is obtained. After that, the type of embedded codes is determined and the optimal values of the linear combination coefficients are derived by using a three-dimensional state transfer matrix to analyze and testify the constructing mechanism of the codes. Finally, the simulation experiment tests the error-correcting performance of the (2 \(k\) , \(k\) , 2) convolutional codes for different value of \(k\) , it is shown that the performance of the new convolutional codes compares favorably with that of traditional (2, 1, \(l\) ) convolutional codes.     

A Low-Voltage and Low-Power 3-GHz CMOS LC VCO for S-Band Wireless Applications

A fully integrated 0.18- \(\upmu \hbox {m}\) CMOS LC-tank voltage-controlled oscillator (VCO) suitable for low-voltage and low-power S-band wireless applications is proposed in this paper. In order to meet the requirement of low voltage applications, a differential configuration with two cross-coupled pairs by adopting admittance-transforming technique is employed. By using forward-body-biased metal oxide semiconductor field effect transistors, the proposed VCO can operate at 0.4 V supply voltage. Despite the low power supply near threshold voltage, the VCO achieves wide tuning range by using a voltage-boosting circuit and the standard mode PMOS varactors in the proposed oscillator architecture. The simulation results show that the proposed VCO achieves phase noise of \(-\) 120.1 dBc/Hz at 1 MHz offset and 39.3 % tuning range while consuming only \(594~\upmu \hbox {W}\) in 0.4 V supply. Figure-of-merit with tuning range of the proposed VCO is \(-\) 192.1 dB at 3 GHz.     

Design and modeling of high-resolution multibit log-domain \Delta \Sigma modulators

Log-domain Delta-Sigma ( $\Delta \Sigma$ ) modulators are attractive for implementing analog-to-digital (A/D) converters (ADCs) targeting low-power low-voltage applications. Previously reported log-domain $\Delta \Sigma$ modulators were limited to 1-bit quantization and, hence, could not benefit from the advantages associated with multibit quantization (namely, reduced in-band quantization noise, and increased modulator stability). Unlike classical $\Delta \Sigma$ modulators, directly extending a log-domain $\Delta \Sigma$ modulator with a 1-bit quantizer to a log-domain $\Delta \Sigma$ modulator with a multibit quantizer is challenging, in terms of CMOS circuit implementation. Additionally, the realization of log-domain $\Delta \Sigma$ modulators targeting high-resolution applications necessitates minimization of distortion and noise in the log-domain loop-filter. This paper discusses the challenges of multibit quantization and digital-to-analog (D/A) conversion in the log-domain, and presents a novel multibit log-domain $\Delta \Sigma$ modulator, practical for CMOS implementation. SIMULINK models of log-domain $\Delta \Sigma$ modulator circuits are proposed, and the effects of various circuit non-idealities are investigated, including the effects of log-domain compression–expansion mismatch. Furthermore, this paper proposes novel low-distortion log-domain analog blocks suitable for high-resolution analog-to-digital (A/D) conversion applications. Circuit simulation results of a proposed third-order 3-bit class AB log-domain $\Delta \Sigma$ loop-filter demonstrate 10.4-bit signal-to-noise-and-distortion-ratio (SNDR) over a 10 kHz bandwidth with a $0.84\,V_{pp}$ differential signal input, while operating from a 0.8 V supply and consuming a total power of $35.5\,\upmu \hbox {W}.$      

Performance of Dualbeam MIMO for Millimeter Wave Indoor Communication Systems

Millimeter wave (MMW) communication provides high data rates for the personal area networks with the availability of 57–64 GHz unlicensed spectrum, in indoor environment. Multipath fading being pre-dominant in indoor, multi input multi output (MIMO) technology is considered to be the ideal choice compared with the existing systems. As spatial diversity in both transmit and receive enhances the diversity gain, the performance of the system is further enhanced by introducing transmit beamforming based antenna beam diversity. In classical \(2\times 2\) MIMO, a diversity gain of 4 is achieved, whereas in this work, space time block code matrix of code rate 1/2 and dualbeam \(2\times 2\) MIMO with diversity gain 8 is considered. Dualbeam is generated by antenna array with four elements per array with out of phase feed configuration. The weight vector of the beamforming network is out of phase as to reduce the interference between the beams. The dualbeam transmitter is designed with unknown channel state information. Training symbols are transmitted to train and track the channel statistics at the receiver. The proposed work is carried out for MMW indoor system. The indoor channel is modeled using Triple Saleh–Valenzuela (TSV) model that takes into account both time of arrival and the angle of arrival information of the rays. Channel estimation is done for classical MIMO and the above proposed model in both Rayleigh and TSV channel. The orthogonal beams facilitate linear processing in the receiver. Hence maximum ratio combiner with maximum likelihood decoder is used in the receiver to decode the transmitted data. Classical MIMO and dualbeam MIMO are evaluated with respect to bit error rate and channel models. An improved diversity order is achieved with dualbeam MIMO compared to classical MIMO, with a power gain of 1.6 dB. The dualbeam MIMO using TSV is found to perform better compared to dualbeam MIMO using Rayleigh in the low Energy per bit to Noise level \((\hbox {E}_{\mathrm{b}}/\hbox {N}_{0})\) with a power gain of 2 dB.     

Closed-Form Error Analysis of AF-CARQ with CSI-Assisted Relay over Nakagami-m Fading Channels

This paper presents a new Amplify-and-Forward Cooperative Automatic Repeat reQuest protocol with channel state information-assisted relay which is more suitable for the only-read access networks. The channels of any pair of terminations are quasi static flat Nakagami- \(m\) fading channels, which are mutually independent and non-identically distributed. Assuming that the coherent equal gain combining is adopted to combine the retransmitted signals from the same link at the destination and selective combining is adopted to the signals from different links. Based on the approximation of product of Nakagami- \(m\) variables, we obtain the end-to-end signal-to-noise rate of any link. The closed-form expression of the average bit error rate for several modulation schemes is obtained by analyzing cumulative distribution function (CDF) and Gaussian Q-function. Then we analyze the amount of fading of the fading channels by the \(n\) order moment which is obtained by CDF. Numerical simulation results show that the relay node can resist the fading of system effectively comparing with the system without relay node. And with the increasing of the number of transmission, the performance advantage of relay link is more and more obviously. It is better to let the maximum transmission time \(F=6\) , which is very useful for improving the transmission efficiency of the truncated ARQ system. The maximum reduction of amount of fading can be reached when \(t=3\) , if the total number of transmission is \(f=6\) . The number of bits in the frame should not have too big.     

Outage Performance of Hybrid Decode–Amplify–Forward Protocol with the nth Best Relay Selection

In this paper, we consider the Hybrid Decode–Amplify–Forward protocol with the \(n\) th best-relay selection scheme. In the best-relay selection scheme, the best relay only forwards the source signal to the destination, regardless of working in the Amplify-and-Forward mode or the Decode-and-Forward mode. However, the best relay might be unavailable due to some reasons; hence we might bring into play the second, third or generally the \(n\) th best relay. We derive closed-form expression for the outage probability using the probability density function and moment generating function of the signal-to-noise ratio of the relayed signal at the destination node. Results show that with the \(n\) th best relay the diversity order is equal to \((m-n+2)\) where \(m\) is the number of relays. Simulation results are also given to verify the analytical results.     

A Novel 2.5–3.1 GHz Wide-Band Low-Noise Amplifier in 0.18 \upmu \hbox {m} CMOS

Aiming for the simultaneous realization of constant gain, accurate input and output impedance matching and minimum noise figure (NF) over a wide frequency range, the circuit topology and detailed design of wide broadband low noise amplifier (LNA) are presented in this paper. A novel 2.5–3.1 GHz wide-band LNA with unique characteristics has been presented. Its design and layout are done by TSMC 0.18  \(\upmu \hbox {m}\) technology. Common gate stage has been used to improve input matching. In order to enhance output matching and reduce the noise as well, a buffer stage is utilized. Mid-stages which tend to improve the gain and reverse isolation are exploited. The proposed LNA achieves a power gain of 15.9 dB, a NF of 3.5 dB with an input return loss less than \(-\) 11.6, output return loss of \(-\) 19.2 to \(-\) 19 and reverse isolation of \(-\) 38 dB. The LNA consumes 54.6 mW under a supply voltage of 2 V while having some acceptable characteristics.