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1.
针对现有雷达高频接收组件尺寸大、集成度不高的情况,采用低温共烧陶瓷(LTCC)多层基板、单片微波集成电路(MMIC)芯片和微组装技术,设计和实现了C波段LTCC高频前端模块。该模块采用二次混频方案,包含限幅器、放大器、滤波器、衰减器、混频器等;其中主要器件用MMIC芯片实现,滤波器埋置在LTCC多层基板中实现,极大减小了模块的尺寸,模块最终尺寸为64 mm×20 mm×1.1 mm,比现有的接收组件尺寸减小了50%。经测试,该LTCC高频前端模块的增益大于40 dB,带内平坦度小于2 dB,噪声系数小于5 dB,镜像抑制度优于51 dB。可将高频前端模块应用于雷达高频接收组件中,从而减小组件尺寸。  相似文献   

2.
<正>南京电子器件研究所在研制成功MMIC的基础上,用多芯片微波组装技术,研制成功了四种接收机前端。 (1)C波段前端 由单片低噪声放大器、单片混频器及单片前置中频放大器组成。整个前端封装于20mm×25mm×5mm的管壳中构成小型模块。信号频率为C波段,中频为40~1000MHz,本振功率5mW,总增益大于30dB,噪声系数典型值3dB,最优值2.5dB。 (2)脉冲接收机前端 包括单片开关、单片低噪声放大器、单片混频器三部分,组装于20mm×25mm×5mm管壳中,重量为6克。工作频率为C波段,开关隔离度大于40dB,噪声系数小于8dB。 (3)前置放大器模块 该模块组装于9mm×l8mm×4mm微带管壳内,也工作于C波段,含有AGC功放,AGC范围0~18dB,输出功率P_(-1dB)分别为35,150,580mW三种,用户可根据需要组合成功率放大链。 (4)脉冲前置放大器模块 模块尺寸与(3)同,C波段性能为P_(-1dB)150,580mW。  相似文献   

3.
采用氮化铝多层布线技术,运用垂直过渡方式实现微波信号从基板底部到表面的信号传输,完成表贴式微波封装设计。在DC-18GHz内,该表贴互连反射损耗小于-15dB,插入损耗小于1.0dB。采用该技术封装了6~18GHz宽带放大器,封装尺寸为5mm×5mm×1.2mm,频带内反射损耗小于-10dB,增益15dB,平坦度小于1dB;另外还封装C波段5W功率放大器,封装尺寸为8mm×8mm×1.2mm,带内增益大于25dB,反射损耗小于-10dB,饱和输出功率37dBm,效率35%。采用技术的表面贴装放大器性能上能够满足微波通信、雷达应用,可用回流焊安装,适合规模生产。  相似文献   

4.
采用低温共烧陶瓷(LTCC)技术和三维立体组装技术设计制作了一种适用于X波段接收机的前端模块,并进行了测试。结果表明:设计制作出的接收机前端主要技术指标为:增益大于20 dB、噪声系数小于等于7.8 dB和1 dB压缩点功率大于等于10 dBm,层数为10层。在电气性能相当的情况下,其体积和质量相对于传统PCB组件有较大缩减。  相似文献   

5.
张磊  付兴昌  刘志军  徐伟 《半导体技术》2017,42(8):586-590,625
基于GaN高电子迁移率晶体管(HEMT)工艺设计制作了一款收发(T/R)多功能芯片(MFC),主要用于射频前端收发系统.该芯片集成了单刀双掷(SPDT)开关用于选择接收通道或发射通道工作,芯片具有低噪声性能、高饱和输出功率和高功率附加效率等特点.芯片接收通道的LNA采用四级放大、单电源供电、电流复用结构,发射通道的功率放大器采用三级放大、末级四胞功率合成结构,选通SPDT开关采用两个并联器件完成.采用微波在片测试系统完成该芯片测试,测试结果表明,在13~ 17 GHz频段内,发射通道功率增益大于17.5 dB,输出功率大于12W,功率附加效率大于27%.接收通道小信号增益大于24 dB,噪声系数小于2.7 dB,1 dB压缩点输出功率大于9 dBm,输入/输出电压驻波比小于1.8∶1,芯片尺寸为3.70 mm×3.55 mm.  相似文献   

6.
利用低温共烧陶瓷(LTCC)高集成化设计优势,设计并实现了一款Ku波段高增益8通道T/R组件。该组件通过双向放大器的合理运用,有效提高了组件的收发增益,同时利用液态金属材料的特性,将硅铝壳体与铝合金散热齿进行有机结合,大大提高了组件在连续波发射工作模式下的热量传导能力,保证了组件小体积下工作的可靠性。最终设计实现的Ku波段高增益8通道T/R组件,体积仅84 mm×48 mm×6 mm,质量约60 g,发射功率增益大于45 dB,发射输出功率大于1 W,接收增益大于29 dB,接收噪声系数小于3.5 dB。该组件8个通道收发性能一致性好,性能稳定,具有良好的工程实用价值。  相似文献   

7.
介绍一种应用于卫星通讯、定位的射频接收前端,采用微波基板与环氧树脂玻璃纤维板(FR4)混压制成多层板对射频接收前端进行小型化及电磁兼容设计.实验证明,采用该设计后射频接收前端模块体积缩小为FR4基板设计的50%,电磁兼容性优于FR4基板模块,增益达到67dB,噪声系数小于10dB,镜频抑制度(IMRR)大于30dB.  相似文献   

8.
用分析方法获取具有4个端口的双栅FET适用S参数进行设计,用微波单片集成电路技术制成增益30dB,可控增益大于65dB,二栅开关时间小于5ns的S波段单片可变增益放大器,封装后的尺寸为17.5mm×20mm×5mm。  相似文献   

9.
采用低温共烧陶瓷(low temperature co-fired ceramics,LTCC)集成技术研制出小型的抗电磁干扰(EMI)滤波器,同时通过在滤波器带外引进一传输零点,增加了滤波器的带外陡度。结果表明:该滤波器的截止频率为84 MHz(3dB),带外抑制≥30 dB(250~2 500 MHz),达到设计要求。其外形尺寸为2.00 mm×1.25 mm×0.80 mm,远小于传统的同类型滤波器。  相似文献   

10.
基于陶瓷方形扁平无引脚(QFN)封装研制出4款X波段GaAs微波单片集成电路(MMIC),包括GaAs幅相控制多功能芯片(MFC)、功率放大器、低噪声放大器、开关限幅多功能芯片.利用QFN技术将这套芯片封装在一起,组成2 GHz带宽的QFN封装收/发(T/R)组件,输出功率大于1W,封装尺寸为9 mm×9 mm×1 mm.通过提高GaAsMMIC的集成度、放大器单边加电、内部端口匹配,创新性地实现了微波T/R组件的小型化.这几款芯片中最复杂的X波段幅相控制多功能芯片集成了T/R开关、六位数字移相器、五位数字衰减器、增益放大器及串转并驱动器.在工作频段内,收发状态下,增益大于5 dB,1 dB压缩输出功率(P-1)大于7 dBm,移相均方根(RMS)误差小于2.5.,衰减均方根误差小于0.3 dB,回波损耗小于-12 dB,裸片尺寸为4.5 mm×3.0 mm×0.07 mm.  相似文献   

11.
This paper presents the design and fabrication of a highly integrated Low Temperature Co-fired Ceramic (LTCC) receiver front-end module. This LTCC module is a dual channel receiver module, works at Ka-band, and fabricated including six Ferro A6M dielectric layers and five metal layers, contains eight embedded resistors and eight MMICs. All MMICs are mounted into pre-making cavities on the top surface of the LTCC substrate. Three slot coupled waveguide-to-microstrip transitions are integrated at LTCC substrate to realize RF and LO signal input. The developed module is highly integrated and reliable, which has a compact size of 58 × 50 × 22 mm3 (including the metal cavity). Each channel of the receiver has the noise figure of less than 9 dB and the gain of more than 24 dB at Ka-band.  相似文献   

12.
A dual-band reconfigurable wireless receiver RF front-end is presented, which is based on the directconversion principle and consists of a low noise amplifer (LNA) and a down-converter. By utilizing a compact switchable on-chip symmetrical inductor, the RF front-end could be switched between two operation frequency bands without extra die area cost. This RF front-end has been implemented in the 180 nm CMOS process and the measured results show that the front-end could provide a gain of 25 dB and IIP3 of 6 dBm at 2.2 GHz, and a gain of 18.8 dB and IIP3 of 7.3 dBm at 4.5 GHz. The whole front-end consumes 12 mA current at 1.2 V voltage supply for the LNA and 2.1 mA current at 1.8 V for the mixer, with a die area of 1.2 × 1 mm^2.  相似文献   

13.
In this paper, a wideband CMOS radio frequency (RF) front-end for various terrestrial mobile digital TV applications such as digital video broadcasting-handheld, terrestrial digital multimedia broadcasting, and integrated services digital broadcasting-terrestrial is proposed. To cover VHF III, UHF, and L bands and reduce the silicon area simultaneously, it employs three low-noise amplifiers and single-to-differential transconductors and shares the rest of the RF front-end. By applying ac-coupled current mirrored technique, the proposed RF front-end has good wideband performance, high linearity, and precise gain control. It is fabricated in 0.18 mum CMOS process and draws 15 mA~20 mA from a 1.8 V supply voltage for each band. It shows a gain of more than 29 dB, noise figure of lower than 2.5 dB, IIP2 of more than 30 dBm, IIP3 of more than -10 dBm for entire bands.  相似文献   

14.
分析了LTCC工艺对射频器件性能的影响,并在优化LTCC工艺的基础上设计并制作了一款蓝牙芯片全向天线。通过工艺的控制,天线批量一致性好,成品率在85%以上。测试结果表明,天线增益为1.6 dB,较好地符合了设计值。该天线尺寸小(6.0 mm×2.0 mm×1.2 mm),质量轻,带宽大(–10 dB带宽为100 MHz)、易于批量生产,适应用于各种高灵敏度、低剖面的蓝牙无线收发模块。  相似文献   

15.
A low voltage CMOS RF front-end for IEEE 802.11b WLAN transceiver is presented. The problems to implement the low voltage design and the on-chip input/output impedance matching are considered, and some improved circuits are presented to overcome the problems. Especially, a single-end input, differential output double balanced mixer with an on-chip bias loop is analyzed in detail to show its advantages over other mixers. The transceiver RF front-end has been implemented in 0.18 um CMOS process, the measured results show that the Rx front-end achieves 5.23 dB noise figure, 12.7 dB power gain (50 ohm load), −18 dBm input 1 dB compression point (ICP) and −7 dBm IIP3, and the Tx front-end could output +2.1 dBm power into 50 ohm load with 23.8 dB power gain. The transceiver RF front-end draws 13.6 mA current from a supply voltage of 1.8 V in receive mode and 27.6 mA current in transmit mode. The transceiver RF front-end could satisfy the performance requirements of IEEE802.11b WLAN standard. Supported by the National Natural Science Foundation of China, No. 90407006 and No. 60475018.  相似文献   

16.
A 10-GHz filter/receiver module is implemented in a novel 3-D integration technique suitable for RF and microwave circuits. The receiver designed and fabricated in a commercial 0.18-mum CMOS process is integrated with embedded passive components fabricated on a high-resistivity Si substrate using a recently developed self-aligned wafer-level integration technology. Integration with the filter is achieved through bonding a high-Q evanescent-mode cavity filter onto the silicon wafer using screen printable conductive epoxy. With adjustment of the input matching of the receiver integrated circuit by the embedded passives fabricated on the Si substrate, the return loss, conversion gain, and noise figure of the front-end receiver are improved. At RF frequency of 10.3 GHz and with an IF frequency of 50 MHz, the integrated front-end system achieves a conversion gain of 19 dB, and an overall noise figure of 10 dB. A fully integrated filter/receiver on an Si substrate that operates at microwave frequencies is demonstrated.  相似文献   

17.
This paper presents an integrable RF sampling receiver front-end architecture, based on a switched-capacitor (SC) RF sampling downconversion (RFSD) filter, for WLAN applications in a 2.4-GHz band. The RFSD filter test chip is fabricated in a 0.18-/spl mu/m CMOS technology and the measurement results show a successful realization of RF sampling, quadrature downconversion, tunable anti-alias filtering, downconversion to baseband, and decimation of the sampling rate. By changing the input sampling rate, the RFSD filter can be tuned to different RF channels. A maximum input sampling rate of 1072 MS/s has been achieved. A single-phase clock is used for the quadrature downconversion and the bandpass operation is realized by a 23-tap FIR filter. The RFSD filter has an IIP/sub 3/ of +5.5 dBm, a gain of -1 dB, and more than 17 dB rejection of alias bands. The measured image rejection is 59 dB and the sampling clock jitter is 0.64 ps. The test chip consumes 47 mW in the analog part and 40 mW in the digital part. It occupies an area of 1 mm/sup 2/.  相似文献   

18.
Presents design, implementation, and measurement of a three-dimensional (3-D)-deployed RF front-end system-on-package (SOP) in a standard multi-layer low temperature co-fired ceramic (LTCC) technology. A compact 14 GHz GaAs MESFET-based transmitter module integrated with an embedded bandpass filter was built on LTCC 951AT tapes. The up-converter MMIC integrated with a voltage controlled oscillator (VCO) exhibits a measured up-conversion gain of 15 dB and an IIP3 of 15 dBm, while the power amplifier (PA) MMIC shows a measured gain of 31 dB and a 1-dB compression output power of 26 dBm at 14 GHz. Both MMICs were integrated on a compact LTCC module where an embedded front-end band pass filter (BPF) with a measured insertion loss of 3 dB at 14.25 GHz was integrated. The transmitter module is compact in size (400 /spl times/ 310 /spl times/ 35.2 mil/sup 3/), however it demonstrated an overall up-conversion gain of 41 dB, and available data rate of 32 Mbps with adjacent channel power ratio (ACPR) of 42 dB. These results suggest the feasibility of building highly SOP integrated RF front ends for microwave and millimeter wave applications.  相似文献   

19.
针对光载无线通信(RoF)系统对高增益、小型化光接收模块(ROSA)的需求,基于混合集成技术,设计并制作了一种高增益的四通道ROSA器件,尺寸为20.0 mm×14.0 mm×5.9 mm。模块内集成了低噪声放大器(LNA)芯片以提高射频信号增益,建立了射频信号传输电路,并对器件特性进行了仿真分析。经测试,器件的射频信号增益达14 dB,-3 dB带宽为23 GHz,在1550 nm波长的入射光下,器件的响应度为0.81 A/W,相邻信道之间的射频信号串扰小于-40 dB。该模块对于减小RoF系统的体积和功耗具有重要意义。  相似文献   

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