Optimum tapered buffer

Driver stages in MOS circuitry have been extensively investigated during the last decade. recently a tapering rule for CMOS buffers was derived showing that the tapering factor (β) is determined by the ratio of output to input capacitance. The derivation fails to account for the correlation between the short-circuit current and β. As a result, the derived formula consistently overpredicts the value of optimum β, especially for large input/output capacitance ratios. The authors present a modified formula and a method to account for the effect of the short-circuit current that is viable for buffer stages over a wide range of output/input capacitance ratios; this newly derived formula accurately predicts the optimum tapering factors for BiCMOS as well as CMOS buffer chains     

Ground bounce in digital VLSI circuits

This paper is concerned with the analysis and optimization of the ground bounce in digital CMOS circuits. First, an analytical method for calculating the ground bounce is presented. The proposed method relies on accurate models of the short-channel MOS device and the chip-package interface parasitics. Next the effect of ground bounce on the propagation delay and the optimum tapering factor of a multistage buffer is discussed and a mathematical relationship for total propagation delay in the presence of the ground bounce is obtained. Effect of an on-chip decoupling capacitor on the ground bounce waveform and circuit speed is analyzed next and a closed form expression for the peak value of the differential-mode component of the ground bounce in terms of the on-chip decoupling capacitor is provided. Finally, a design methodology for controlling the switching times of the output drivers to minimize the ground bounce is presented.     

Design of CMOS tapered buffer for minimum power-delay product

The tapered buffer is analyzed from the viewpoint of power dissipation. Both uniform and nonuniform tapered buffers are considered. It is found that there is an optimum value of tapering factor for a minimum power-delay product. In case of uniform tapering, we can obtain an analytical solution of the optimum tapering factor for a minimum power-delay product, which is about 1.5~2 times larger than that for a minimum propagation delay. It is also found that there exists a nonuniform tapering factor which gives a global optimum condition for a minimum power-delay product, which, however, results in a larger short-circuit current. Compared with a uniform buffer, a nonuniform tapered buffer shows about 8% improvement in dynamic switching energy, and 3~5% improvement in total switching energy. We confirm this by simulating tapered buffers with SPICE     

Reply to “Comments on the optimum CMOS tapered bufferproblem”

For original article see ibid., vol 27, p. 118-9 (1992). For comments on original paper see ibid., vol29, no. 2, p155-8 (1994). The optimum tapered buffer has been extensively discussed in the literature. In this correspondence a general model is derived and it is shown that previously reported models are specific cases of the general model presented here     

Principles of parametric temporal imaging. II. System performance

For pt. I, see ibid., vol. 36, p. 430, April 2000. The waveform manipulation technique known as temporal imaging can expand or compress signals in time while maintaining the shape of their envelope profiles. The temporal imaging system is analogous to that of its spatial counterpart, with dispersive propagation performing the role of diffraction and quadratic phase modulation in time acting as a “time lens.” Recent work has concentrated on time lenses produced by the parametric mixing of the dispersed input signal with a linearly chirped optical pump pulse because of the broad bandwidth, and thus fine temporal resolution, that can be obtained. In a previous paper, we presented the numerous parametric imaging configurations that are possible and drew temporal ray diagrams to illustrate their operation. In this paper, we study the performance of these systems. Resolution, field of view, number of resolvable features, and distortions particular to this approach are discussed     

Design of tapered buffers with local interconnect capacitance

This paper presents a design methodology and analytic relationships for the optimal tapering of cascaded buffers which consider the effects of local interconnect capacitance. The method, constant capacitance-to-current ratio tapering (C³RT), is based on maintaining the capacitive load to current drive ratio constant, and therefore, the propagation delay of each buffer stage also remains constant. Reductions in power dissipation of up to 22% and reductions in active area of up to 46%, coupled with reductions in propagation delay of up to 2%, as compared with tapered buffers which neglect local interconnect capacitance, are exhibited for an example buffer system     

Capacity and error exponent for the direct detection photonchannel. II

For pt.I see ibid., vol.34, no.6, p.1449-61 (1980). The discussion of the capacity and error exponent of the direct detection optical channel is continued. The channel input in a T-second interval is a waveform satisfying certain peak and average power constraints for the optical signals. The channel output is a Poisson process with an intensity parameter that accounts for the dark-current component. An upper bound is obtained on the error exponent which coincides with the lower bound. Thus, this channel is one for which the error exponent can be known exactly     

Channel width tapering of serially connected MOSFET's with emphasison power dissipation

Transistor channel width tapering in serial MOSFET chains is shown in this paper to simultaneously decrease propagation delay, power dissipation, and physical area of VLSI circuits. Tapering is the process of decreasing the size of each MOSFET transistor width along a serial chain such that the largest transistor is connected to the power supply and the smallest is connected to the output node. A detailed explanation of the effects of tapering on the output waveform is presented with specific emphasis on the power dissipation of tapered chains. It is demonstrated that in many cases tapering decreases delay and changes the shape of the output waveform such that the time during which a load inverter is conducting short-circuit current is reduced. This decrease in short-circuit current also occurs in many cases where tapering may not offer a speed advantage. In addition, dynamic CV²f power dissipation of the serial chain is reduced. In those circuits where tapering does not decrease propagation delay, tapering permits a designer to tradeoff speed for a reduction in both short-circuit and dynamic power dissipation, a tradeoff not normally available with untapered chains. Thus the total power consumed by a serial chain of MOSFET's, as well as its propagation delay and area, can be reduced by channel width tapering. A design system for determining when tapering is appropriate, selecting the amount of tapering, and synthesizing the physical layout is presented. Physical layout issues unique to tapering are discussed, and fabricated test structures are described     

Effects of simultaneous switching noise on the tapered bufferdesign

Complementary metal-oxide-semiconductor (CMOS) output buffers, comprised of a series of tapered inverters, are used to drive large off-chip capacitances. The ratio of the size of transistors between two consecutive stages is the buffer taper factor. With higher frequency of operation and simultaneous switching of the output drivers, the parasitic inductance present at the pin-pad-package interface results in significant switching noise on the power lines. A comprehensive analysis and estimate of simultaneous switching noise (SSN) including the velocity saturation effects seen in the submicron transistors during the switching of output drivers is presented. The effect of SSN on the overall buffer propagation delay and transition time is discussed. The presence of SSN results in an increase in the optimum taper factor between inverter stages for a given capacitive load. Beyond a critical value, the output transition time of a tapered buffer increases with reducing taper factor due to SSN. SSN can be reduced by skewing the switching of output buffers, SPICE simulation results show that skewing buffer switching with additional inverter stages reduces SSN and increases buffer propagation delay     

A dynamic-threshold SOI device with a J-FET embedded sourcestructure and a merged body-bias-control transistor. II. Circuitsimulation

For pt.I see ibid., vol. 47, no.8, p.1587-92 (2000). A primary transistor having an embedded J-FET, or resistor, immediately under the source junction and a small subsidiary body-bias-control transistor enables the construction of a variable-threshold SOI MOSFET with a small area penalty and without any limitation on the power-supply voltage. The subsidiary transistor, synchronized with the gate input signal, injects charges into the body depending on the output-node transient condition and controls the body potential to increase the on-current and decrease the off-current. The embedded J-FET eliminates such floating-body effects as delay hysteresis. The inverter delay time with a 1-pF load capacitance can be shortened to 40% of that of a bulk device under I-V operation, A different embedded J-FET circuit construction under the source enables an NMOS pass gate to be constructed without the output-amplitude degradation caused by the source follower, with a switching speed higher than that of a conventional CMOS pass gate     

Comments on “A theoretical and numerical analysis of themeasured equation of invariance”

In the original paper (see ibid., vol.42, no.8, p.1097-1105, 1994), the authors claimed to have found theoretical insights into the measured equations of invariance (MEI) method. Their first insight was a proof that the postulate of invariance was wrong, and their second insight led to the discovery of an optimum set of metrons. Metrons are considered to be “possible” induced current densities due to some unknown incident fields. They also presented a series of computational results to highlight their theories. This article points out the defects in the analyses and conclusions presented by the authors. There are two things in the paper which are basically incorrect. One is that the authors consider a zero in a numerical formulation to be an absolute zero. The other is that they assume the “invariance to excitations” to be the same as the “invariance to metrons”. Based on these assumptions, they have reached conclusions which are actually contradictory to their own calculations. This article shows where the defects of their analyses occur and why their two insights are contradictory to each other     

Efficient computation of the delay-optimized finite length MMSE-DFE

We present new fast algorithms for computing the optimum settings of a finite-length minimum-mean-square-error decision feedback equalizer (MMSE-DFE) from channel and noise estimates. These algorithms are based on displacement structure theory and generalize the algorithms of Al-Dhahir and Cioffi (see ibid., vol.43, no.11, 1995) by including delay optimization. Both symbol-spaced and fractionally spaced feedforward filters are considered     

Comments on “An alternative derivation for thesignal-to-noise ratio of a SSMA system”

The “alternative derivation” proposed in the Letter referenced in the title (see ibid., vol.42, p.2224, 1994) is incorrect. The correct derivation gives a result that agrees with previous computations. Hence, the claims and conclusions based on the apparent difference in the results are not valid     

Room-temperature long-wavelength (λ=13.3 μm) unipolarquantum dot intersubband laser [and reply]

For original paper see Krishna et al., ibid., vol. 36, p.1550-1555 (2000). Krishna et al. reported a “quantum dot far infrared (λ = 13.3 μm) laser, based on transitions between discrete bound electron states in self-organised quantum dots”. Weber et al. argue that insufficient experimental evidence for such a claim was presented in the work. Krishna et al. reply to the comment and report that they have carried out further work which makes them believe that they observe dominant stimulated emission and gain in these devices, with a distinct threshold and polarisation of the output     

Comments on "Dynamical noise in single-mode distributed feedback fiber lasers"

The comments given here refer to the two excellent and complete papers by Foster (see ibid., vol.40, no.7, p.884, 2004 and ibid., vol.40, no.9, p.1283, 2004). After closely studying the papers, we have found a couple of issues that require comments in order to understand and use the model. Despite this, one should honor the achievements in the papers in which Foster establishes an accurate analytical model for a DFB fiber laser. The comments relate to a gain parameter and the noise arising from pump power fluctuations and something that affects the noise equations, which we believe to be a small misprint.     

Remarks on “The electromagnetic field of a vertical electricdipole over the Earth or sea” [and reply]

The author comments on the solution given by King and Sandler (see vol.42, p.382-89, 1994) of the electromagnetic field of a vertical electric dipole (VED) over Earth or sea and in the presence of a three layered region. For a homogeneous half-space with complex bulk wavenumber k₂, King and Sandler present expressions for the E and B field components which are claimed to be accurate in all ranges of the radial distance ρ, when |k₂/k₀|>3-k0 being the wavenumber in air. Wait (see ibid., vol.44, p.271-2, 1996) has questioned the completeness and generality of King's and Sandler's formulas. In particular, two of Wait's comments have attracted this author attention. The first one is related to the usefulness of King's and Sandler's formulas directly above the VED axis (at ρ=0). The second is the usefulness of their formulas in deriving the input impedance of the VED. The authors investigate these two comments by comparing King's and Sandler's formulas to exact numerical results for E _z on the VED axis and for the input impedance as affected by the lower half-space. King and Sandler reply that the questions raised in the remarks of Mahmoud (see ibid., vol.46, no.12, p.1745-6, 1998) are based on a comparison of their formulas with the “exact numerical results for E_z, on the VED axis and for the input impedance as affected by the lower half-space”. Evidently, Mahmoud did not review the derivation of the King-Sandler formulas     

Comments on “Differential detection with IIR filter forimproving DPSK detection performance”

Hamamoto (see ibid., vol.44, no. 8, p.959-66, 1996) presented a detection technique for differential phase-shift keying (DPSK) with improved performance over conventional differential coherent detection. Leib (see ibid., vol.43, no.2/3/4, p.722-25, 1995) comments that this technique had been introduced much earlier. As correctly stated by Hamamoto the essence of the “new DPSK detection scheme” is based on a technique introduced by Leib and Pasupathy (1988). Differential coherent detection can be viewed as a scheme that uses the previous data symbol as a phase reference. The problem is that this phase reference suffers from the channel noise in very much the same way as the data symbol does and, therefore, it results in a performance degradation     

Corrections to “JPEG dequantization array for regularizeddecompression”

An error in the theoretical derivations leading up to the main equation in the article by Frost et al. (see ibid., vol.6, p.883-88, 1997) is pointed out, and corrections are presented. Due to the error, the experimentally obtained “optimal” parameters are really only suboptimal     

Correction to “Comparison of diversity combining techniquesfor Rayleigh-fading channels”

Based on the observation of Kim, Kwon, Hong and Whang (see ibid., vol.46, no.9, p.1109-10, 1998), we discovered that in our derivation (see ibid., vol.44, p.1117-29, 1996), a factor of one-half in the exponent of one of three exponentials was inadvertently dropped and this, in turn, affected two other equations     

Third response to comments by M.J. Neatrour on Maxwell's equations

For original papers by Harmuth see ibid., vol.28, no.4, p.250, p.259, p.267 (1986). For Neatrour's article see ibid., vol.29, no.3, p.258 (1987). The question of whether the authors' previous modification of Maxwell's equations adds anything new to physics is addressed. Several plots of electric field strength under various conditions are presented, of which the authors claim about half could not have been derived from Maxwell's original equations. Since they claim these plots are accurate, the modified equations do, indeed, add something to physics