光脉冲通过F-P滤波器后峰值功率的变化

通过推导出的啁啾光脉冲通过F-P滤波器后输出脉冲光强的解析表达式,对不同情况下输出脉冲的峰值功率进行了研究.发现对于一确定的滤波器,峰值输出功率随输入脉冲的宽度及啁啾因子的大小而变化.     

不同陡峭边沿的皮秒光脉冲经半导体光放大器后的时域特性分析

分析了具有不同徒峭程度边沿的皮秒光脉冲通过半导体光放大器后输出脉冲的时域特性，其中着重考虑了输出脉冲的峰值功率和脉冲宽度的变化。结果表明：输出脉冲的峰值功率、脉冲宽度与输入脉冲的峰值功率、输入脉冲边沿的徒峭程度以及半导体光放大器的偏置电流密切相关。     

由LD和高双折射光纤环镜构成的可调谐锁模光纤激光器

提出了一种用F P腔半导体激光器 (F PLD)作调制器 ,由高双折射光纤环镜构成的梳状滤波器作波长选择器件的环形腔主动锁模光纤激光器。通过改变梳状滤波器透过峰之间的间隔可以实现激光波长的调谐。实验中成功地获得了调谐范围约为 10nm ,脉冲重复频率约 2GHz的锁模脉冲信号 ,脉冲宽度小于 70ps。     

光纤脉冲形成器

新的波形合成器应用光纤延迟线阵列来改变光脉冲形状。各种输入脉冲形状都可能得到,同时光纤可很方便地以不同长度的任意组合来分组。因此,输出脉冲的形状几乎可随意变化。附图是合成器一种简单方案的原理图。由氙闪光灯、激光器或其他光源产生的光脉冲与光纤阵列的一端相耦合。从光纤阵列的一端射出一系列脉冲,其中每一个脉冲的延迟时间等于它通过那段光纤所需的传播时间。从每条光纤出射的光是经衰减的、略有发散的复现输入脉冲。     

关于激光脉冲通过超快速光闸的频谱畸变问题

在研究超快速过程中,作为研究工具的激光脉冲,不仅时间分辨率要高,而且频谱耦合特性要好,超快速光闸的出现,为获得各种频谱的超短脉冲提供了可能性,然而激光脉冲在通过光闸时,频谱要发生畸变。为了合理应用输出光脉冲,必须搞清这种畸变的规律。本文试图在理论上为分析这种规律,提出一种在工程技术上可行的途径。若把光闸之输入脉冲的频谱记为F_0(u),输出脉冲的频谱记为F(u,τ),光闸的开关函数记为P_T(t-τ),其中τ是反映开门时机的平移参变量,则可以证明,畸变函数△F(u,τ)=F(u,τ)-     

基于缓变上升沿泵浦光的布里渊慢光研究

为了增加布里渊慢光的时间延迟,减小脉冲展宽,利用迎风格式的有限差分法对光纤中受激布里渊散射耦合方程组进行数值求解,分析了具有缓慢变化上升沿的连续光作为泵浦光时,光纤输出端斯托克斯光的时间延迟和脉冲展宽因子随增益的变化情况。数值结果表明:具有缓慢变化上升沿的泵浦光可使高斯长脉冲FWHM(半宽全高)为120ns的时间延迟增加到52ns,高斯短脉冲(FWHM为20ns)的时间延迟增加到64ns,同时可减小高斯长短脉冲的展宽。     

测量超短光脉冲强度和相位的方法

美国Sandia国家实验室的D.J.Kane等人提出一种测量光脉冲强度和相位的方法。光源发出的光脉冲形成探测脉冲。选通脉冲单元产生可变时间延迟的选通脉冲。选通脉冲和探测脉冲在瞬时响应的非线性介质中合成,形成的信号脉冲与探测脉冲时间削波有函数关系。把信号输入到波长选通器件,输出信号脉冲信息由第一个时间延迟值的信号强度和频率组成。在有效值范围内,改变时间延迟便得到信号强度随频率和     

用于产生ps量级双脉冲的光纤光栅

设计了一种用于ps级单脉冲变换到双脉冲的光纤光栅(FBG)。依据傅立叶光学理论,数值模拟了光脉冲经不同强度光栅反射后的输出光脉冲的特性,随着光栅强度的增加,输出脉冲间的强度差别变大,但输出光脉冲具有与输入光脉冲相同的谱形和脉宽。设计出的FBG折射率调制函数是sinc函数的叠加。当FBG是弱光栅满足一阶波恩近似时,光脉冲经光栅反射后的输出双脉冲具有相同的强度,且谱形和脉宽与输入脉冲相同。在强光栅情况下,改变光栅折射率调制sinc函数的相对强度,仍然可以使输出双脉冲具有相同的强度。     

基于零阶统计量的韧性归一化自适应时间延迟估计

依据零阶统计量理论,给出对数矩过程、对数宽平稳及对数各态遍历的定义,提出一种韧性的归一化自适应时间延迟估计方法(简称NZOSTDE).该算法用FIR滤波器对两个含有脉冲噪声的观测信号建模,利用不存在有限方差的脉冲信号经过对数变换后其各阶矩的存在性和几何功率的概念,在对数域基于最小均方误差(LMS)准则归一化自适应得到FIR滤波器的系数,该系数最大值对应的序号就是时间延迟的估计值.本文提出的新算法克服了基于分数低阶统计量(FLOS)算法的局限性.计算机仿真实验表明,NZOSTDE算法在强脉冲噪声环境下比归一化最小平均P范数时间延迟估计方法(简称NLMPTDE)算法更具有韧性.     

互注入锁定产生波长可调谐光脉冲的实验研究

本文提出了一种利用两个F -P半导体激光器双向注入锁定产生波长可调谐光脉冲的实验系统。该实验系统只需调节可调谐滤波器就可以方便地选择不同波长的单纵模光脉冲,在2 5nm的波长调谐范围内边模抑制比(SMSR)为2 6dB ,其中18nm的波长范围内高于3 1dB。     

Time-Delay Limits Set by Dispersion in Magnetostatic Delay Lines (Short Papers)

Analysis and experiments show the extreme dispersion of magnetostatic delay lines. A suitable parameter to characterize the amount of dispersion present has been found to be the maximum output energy contained in a time interval equal to the input pulse duration. The time occurrence of this maximum value gives a convenient measure of the group delay. The pulse shape and energy content versus delay have been determined both theoreticaly and experimentally for axially magnetized circular rods. The results show that delays beyond two to three times the input pulse duration cannot be obtained with more than 50 percent of the output energy contained within the original pulse duration.     

沙尘暴多重散射对激光脉冲传输的影响

根据光脉冲在离散随机介质中的传输理论,应用米氏理论和蒙特卡罗方法,研究了不同能见度情况下1.06μm脉冲激光在沙尘暴中的传输特性。得到了双频互相关函数的幅度和相位随相干带宽、脉冲时域展宽和延时随能见度的关系。结果表明,脉冲的展宽和时延随沙尘暴能见度的变化非常显著。当能见度为3~5 km时,多重散射对脉冲双频互相关函数、脉冲展宽和延时的影响已较明显。当能见度小于1 km时,对于1 ns的输入脉冲,其展宽大于10 ns,延时大于15 ns。因此,当沙尘暴的能见度较低时,必须考虑多重散射对激光脉冲频域及时域特性的影响。     

晶体二极管开关转换过程分析

晶体二极管结构决定了其开关特性,在脉冲信号作用下晶体二极管由导通到截止和由截止到导通的转换过程会产生时间上的延迟,为了清楚观察输出信号开关随输入信号开关时间上的延迟,在开关电路中需要输入一定幅值、周期的脉冲信号。通过实验可以清楚直观地观察到二极管开关转换过程时间的延迟,进一步加深对晶体二极管开关特性的理解和认识。     

Short-channel effects on the input stage of surface-channel CCD's

A detailed study of transient signal charge injection into surface-channel charge-coupled devices using a two-dimensional computer model including the source diffusion and the self-induced and fringing field effects has been carried out. The total delay time required to inject a packet of charge into CCD's for a range of device structures was determined. It is found that the maximum clock pulse frequency of operation is determined by the input delay time and not by the speed of charge transfer which is normally assumed. The results of this study are compared with results obtained using a one-dimensional simulation model for charge injection into CCD's. Experimental justification of the one-dimensional model is provided. With the aid of this analysis a design expression for the intrinsic input delay (the delay associated with the fill portion) for short gate surface-channel CCD's is derived and presented in this paper. It is also shown that for short gate devices (L < 8µm) the input delay time due to scooping is about two to four times the intrinsic delay.     

Study of SBS slow light based on nano-material doped fiber

A novel optical fiber doped with nano material InP is manufactured by the modified chemical vapor deposition (MCVD). The slow light based on stimulated Brillouin scattering (SBS) in the optical fiber is studied. The results show that a time delay of ~738 ps is obtained when the input Stokes pulse is 900 ps(FWHM) and the SBS gain is ~15. It shows that a considerable time delay and an amplification of the input light can be achieved by this novel optical fiber.     

新型的光纤耦合器环状连接法产生时分复用信号的实验研究

将单模光纤耦合器的一个输入端和一个输出端连接起来构成光纤环路,并使光纤环路的时延为输入光脉冲半周期的奇数倍,这样,在耦合器的另一个输出端口就可获得倍乘重复率的光脉冲信号。采用三级环状连接的光纤耦合器,产生了八倍频(8×2.5 Gb/s)的时分复用信号。实验结果表明,这一时分复用信号产生方案具有脉冲的幅度和间隔易于调节、输出信号的功率大、成本低且易于实验室拉制等优点。     

Pulse compression using angular multiplexing in a high-gain 1.7 kJ amplifier

Pulse compression using angular multiplexing is demonstrated on a large-scale hydrogen-fluoride (HF) laser system. For a train of two 24 ns pulses, the essential elements of this scheme are evaluated as a function of interpulse separation time. Included are energy-extraction efficiency, overall temporal pulse distortion, leading-edge contrast-ratio distortion, and suppression of amplified spontaneous emission (ASE) relative to a single long-duration input pulse. For appropriate interpulse delay time, we show that distortionless amplification is possible with energy-extraction efficiency, as is obtained using a single input beam having a pulsewidth equal to the duration of the amplifier gain.     

Gigahertz analog repeater for fiber optic delay lines

A gigahertz analog fiber optic repeater is used to extend the achievable delay time for radar delay line applications. The repeater consists of a silicon avalanche photodiode (APD), a wide-band amplifier, and a GaAlAs laser diode transmitter. This repeater has an optical gain of 14.5 dB, a 42 dB electrical dynamic range, and a noise figure of approximately 6.5 dB. The frequency response is flat within ±2 dB over the frequency range from 10 MHz to 1.3 GHz. The nanosecond pulse fidelity is such that the subtraction between input and output pulses is 20 dB below the pulse amplitude.     

基于SRAM的FPGA的互连时延模型

本文提出现场可编程门阵列FPGA中的互连资源MOS传输管时延模型.首先从阶跃信号推导出适合50%时延的等效电阻模型,然后在斜坡输入的时候,给出斜坡输入时的时延模型,并且给出等效电容的计算方法.结果表明,本文提出的时延模型快速并且足够精确.     

A 1.8-ns access, 550-MHz, 4.5-Mb CMOS SRAM

An ultrahigh-speed 4.5-Mb CMOS SRAM with 1.8-ns clock-access time, 1.8-ns cycle time, and 9.84-μm² memory cells has been developed using 0.25-μm CMOS technology. Three key circuit techniques for achieving this high speed are a decoder using source-coupled-logic (SCL) circuits combined with reset circuits, a sense amplifier with nMOS source followers, and a sense-amplifier activation-pulse generator that uses a duplicate memory-cell array. The proposed decoder can reduce the delay time between the address input and the word-line signal of the 4.5-Mb SRAM to 68% of that of an SRAM with conventional circuits. The sense amplifier with nMOS source followers can reduce not only the delay time of the sense amplifier but also the power dissipation. In the SRAM, the sense-amplifier activation pulse must be input into the sense amplifier after the signal from the memory cell is input into the sense amplifier. A large timing margin required between these signals results in a large access time in the conventional SRAM. The sense-amplifier activation pulse generator that uses a duplicate memory-cell array can reduce the required timing margin to less than half of the conventional margin. These three techniques are especially useful for realizing ultrahigh-speed SRAM's, which will be used as on-chip or off-chip cache memories in processor systems