瞬态成像模式下高帧频CMOS图像传感器性能研究

高帧频CMOS图像传感器具有集成度高、帧频高、功耗低、抗干扰抗辐照能力强等特性,在科学实验中应用广泛。为提高外同步触发瞬态成像模式下的成像性能,首先介绍了基于高帧频CIS(5T像素,超大快门)的瞬态成像系统构成及其工作模式;从像素结构出发,对该款CIS在不同工作模式下的成像性能进行了理论分析;搭建了基于EMVA1288的标准化测试平台,对瞬态工作模式下的多项关键性能指标进行了测试,并与稳态工作模式下的性能进行了对比。分析结果表明:与稳态工作模式相比,瞬态成像模式下图像传感器具有更大的暗本底和固定模式噪声,但传感器的时序噪声、光响应非均匀性优于稳态工作模式,具有更高的信噪比和动态范围,与理论分析基本吻合。测试分析结果可用于指导科学成像系统设计与性能优化。     

面阵CMOS图像传感器性能测试及图像处理

CMOS图像传感器具有驱动简单、单电源供电、集成度高、功耗低、抗辐射能力强等优点。但是在航天光学遥感领域,CMOS图像传感器应用还不普遍。在该领域亟需大规模、高读出速度、大动态范围的图像传感器,CMOS图像传感器LUPA4000正是这样一款高性能面阵图像传感器,因此,选择LUPA4000作为研究对象,对其缺陷像元、光响应非均匀性、信噪比等性能指标进行测试。测试结果表明存在缺陷像元数量多、光响应非均匀性较大、信噪比较低等问题。根据测试结果采用暗背景扣除、缺陷像元替换、非均匀校正三种方法进行图像处理。对每种方法单独处理和各种方法组合处理的处理效果从图像信噪比和成像图像质量两方面进行分析评估,结果表明:非均匀校正联合缺陷像元替换的处理方法处理效果最佳。     

A 1/2-in. CCD image sensor overlaid with a hydrogenated amorphous silicon

A half-inch size CCD image sensor overlaid with a hydrogen-erated amorphous silicon (α-Si:H) as a photodetector has been developed. The array consists of 506V × 404H picture elements. The glow-discharged α-Si:H film has high quantum efficiency of 0.75-0.8 in the visible wavelength range and low dark current of 0.2 nA/cm²and is formed on the CCD scanner with vertical overflow drain. This CCD image sensor has a sensitivity of 0.014 µA/lx (3200 K)and a S/N ratio of 73 and 68 dB for fixed-pattern noise and random noise, respectively. Smearing signal is suppressed to below 5 percent at incident light intensity of 1000 times saturation exposure. The blooming and highlight lag are completely suppressed by the vertical overflow drain structure.     

Object location and centroiding techniques with CMOS active pixel sensors

A system based on a pixel-parallel CMOS active pixel sensor architecture is demonstrated for capturing the location and approximate size of an object. The object is distinguished from the background by a global threshold. Three prototype sensors are implemented in standard CMOS technologies. In the first, a high fill factor three-transistor pixel with integral comparator is demonstrated. It is shown that performance of this sensor is limited by device nonuniformities, so a novel in-pixel fixed-pattern noise correction circuit using a single capacitor is demonstrated in the second sensor. The system concept is further enhanced by a cumulative cross section readout architecture which provides additional information regarding the object with little reduction in speed. The application of these systems to centroid determination using multiple thresholds is discussed.     

Design and evaluation of current-mode image sensors in CMOS-technology

Three different current-mode-output CMOS image sensor structures comprising of a pixel cell and an appropriate readout circuit have been analyzed and compared with regard to their noise behavior, fixed-pattern noise (FPN), and the dynamic range. First, a standard integrating pixel cell with a readout circuit containing a voltage-to-current converter is proposed. Second, a pixel cell based on a switched current cell is analyzed. The third sensor cell uses a feedback loop to control the reverse bias voltage of the photodiode to reduce the settling time of the pixel cell and the influence of the photodiodes's dark current. The necessary amplifier is partly located in the pixel cell and partly in the readout circuit. In all sensors, correlated double sampling is used to suppress the FPN.     

An S-VHS compatible 1/3" color FT-CCD imager with low dark current by surface pinning

A Frame-Transfer CCD imager for consumer applications has been developed with low dark current by using hole accumulation at the entire Si-SiO/sub 2/ interface of the image pixel during integration, called "All-Gates Pinning", or AGP. All sensor features, such as vertical anti-blooming and electronic shutter are maintained. The sensor combines thin polysilicon electrodes with mosaic color filters for increased sensitivity and resolution, and uses minimized capacitances and a double metal technology for increased frame shift frequency to obtain low smear. The image pixel operation and optimization are presented, Measurements show a 30 times lower dark current, and 8 times lower fixed-pattern noise with all-gates pinning compared to a conventional device. A frame shift frequency of 15 MHz is achieved. These new features allow the reduction from 2/3" to 1/3" image format without sacrificing the performance.<>     

High-speed CMOS wavefront sensor with resistive-ring networks of winner-take-all circuits

We present a high-bandwidth Hartmann-Shack sensor for adaptive optics implemented in a standard 0.35 /spl mu/m CMOS process technology. Hartmann-Shack sensors reconstruct an optical wavefront from the displacement of focal points as imaged by a microlens array. This image is usually captured by CCD cameras and then processed by software, limiting the wavefront bandwidth to a few hertz. The presented CMOS-based sensors achieves a frame rate of up to 4 kHz by analog image processing on the focal plane. The implemented position sensitive detectors consist of a resistive-ring network of Winner-Take-All circuits with reduced sensitivity to transistor mismatch and fixed-pattern noise. This CMOS-based wavefront sensor allowed the first high-bandwidth wavefront measurements at the human eye.     

Operation Principles of 0.18-$muhboxm$Four-Transistor CMOS Image Pixels With a Nonfully Depleted Pinned Photodiode

The operation principles of the four-transistor (4-TR) pixel CMOS image sensor, fabricated by 0.18-mum technology, were investigated by pixel-level characterization utilizing a single-pixel test pattern. It was found that the pixel's dark current level is strongly influenced by the gate bias (V_TX(on)) of the transfer (TX) transistor at a fixed supply voltage (V_DD). The largest dark current occurred at a conventional bias condition of V_TX(on)=V_DD=2.5V, but the dark current level was reduced by less than one-third at V_TX(on)=2.1V without degrading the pixel's charge transfer capabilities. Attributed to the dark current reduction, the fixed-pattern noise (FPN) of pixel was also decreased by up to 13.3 dB. These improvements can be explained by the more effective reset of pinned photodiode (PPD) at V_TX(on)=2.1V, especially in the pixel with V_DD of 2.5 V or lower in which the full depletion of PPD becomes more and more difficult. In this bias condition, namely nonfully depletion PPD condition, the TX transistor was proven to operate in the "deepest depletion" mode by effectively suppressing the electron injection from floating diffusion node to channel. Moreover, various driving signals to the TX transistor were applied to do more detailed physical analysis of the pixel operation. Since the dark current and FPN are main bottlenecks in most CMOS image sensors, the proposed method is expected to efficiently improve the performance of 4-TR CMOS image pixels under 2.5 V or lower operational voltages     

Noise in a CMOS digital pixel sensor

Based on the study of noise performance in CMOS digital pixel sensor(DPS),a mathematical model of noise is established with the pulse-width-modulation(PWM) principle.Compared with traditional CMOS image sensors,the integration time is different and A/D conversion is implemented in each PWM DPS pixel.Then,the quantitative calculating formula of system noise is derived.It is found that dark current shot noise is the dominant noise source in low light region while photodiode shot noise becomes significantly important in the bright region. In this model,photodiode shot noise does not vary with luminance,but dark current shot noise does.According to increasing photodiode capacitance and the comparator’s reference voltage or optimizing the mismatch in the comparator,the total noise can be reduced.These results serve as a guideline for the design of PWM DPS.     

Impactron-a new solid state image intensifier

This paper describes the theory of operation and up to date achieved performance of a new image sensor concept that is using Impact Ionization to multiply photo-generated charge before sensing. It is shown that the charge multiplication based on a single carrier impact ionization is almost noiseless. This allows detected signal charge to be amplified directly in the charge domain and be always kept above the charge detector amplifier noise floor. Charge is repeatedly transferred in a CCD fashion through high field regions where the impact ionization occurs. Even though the impact ionization has a low probability and the high field regions are short the number of transfers is large and significant charge gains are obtained. The developed charge multiplication structure can be easily incorporated into pixels of any standard CCD image sensor and included in the image sensing area, the memory area, or any other vertical or horizontal CCD register with a minimum area penalty. This feature thus provides high flexibility in designing new sensors with various performance characteristics suitable for an extreme low light level imaging. The paper describes in detail the theory of charge multiplication and excess noise generation that is supported by the measured data obtained form the test image sensors. The measurement methods that are used to characterize the charge multiplication gain and noise are also described in detail     

New signal readout method for ultrahigh-sensitivity CMOS image sensor

We propose a new signal readout method that uses a charge-transfer circuit. Its application is to an ultrahigh-sensitivity CMOS image sensor on which an avalanche-mode photoconductive film is overlaid. The charge-transfer circuit makes it possible to obtain high signal-to-noise ratio features by transferring signal charges accumulated in each photodiode to a parasitic capacitance that is small compared with the photodiode capacitance. A 138 /spl times/ 138 passive-pixel prototype sensor that had the charge-transfer circuit in each column was fabricated and tested. The prototype's column-to-column fixed-pattern noise and random noise were, respectively, 56.7 and 58.4 dB below the saturation signal level, which demonstrated its potential as a signal readout circuit for a next-generation ultrahigh-sensitivity CMOS image sensor.     

The Hole Role in Solid-State Imagers

The importance of holes present in the pixels of solid-state image sensors is described by Theuwissen et al. (IEDM Tech. Dig. 2005, p. 817). Today's success of digital imaging is based on the positive effect of an accumulation layer that reduces the interface-related dark current and dark current fixed-pattern noise. This superb imaging feature is applied in charge-coupled devices as well as in complementary metal-oxide-semiconductor devices, in consumer as well as in professional equipment. Holes are not only used to improve the dark performance of imagers; other examples of efficient use of holes are fixing electrostatic potentials, creating gate structures, draining photon-generated charges, and constructing antiblooming means     

CMOS数字像素传感器噪声研究

在研究CMOS数字像素传感器(DPS)噪声特性的基础上,利用脉冲宽度调制(PWM)原理建立了关于PWM DPS完善的系统噪声数学模型。相比于传统CMOS图像传感器噪声研究,该模型考虑了系统中各像素单元积分时间不同和像素级模数转换的特点,推导出总噪声表达式。研究表明,低照度时噪声由暗电流散粒噪声主导,光强大时主要来源为光电二极管散粒噪声。模型中光电二极管散粒噪声与光照无关、暗电流散粒噪声与光照有关。研究结果表明针对PWM DPS系统,适当增大节点电容和比较器参考电压、改善比较器失配可有效降低噪声。     

Analysis of temporal noise in CMOS photodiode active pixel sensor

Temporal noise sets the fundamental limit on image sensor performance, especially under low illumination and in video applications. In a CCD image sensor, temporal noise is primarily due to the photodetector shot noise and the output amplifier thermal and 1/f noise. CMOS image sensors suffer from higher noise than CCDs due to the additional pixel and column amplifier transistor thermal and 1/f noise. Noise analysis is further complicated by the time-varying circuit models, the fact that the reset transistor operates in subthreshold during reset, and the nonlinearity of the charge to voltage conversion, which is becoming more pronounced as CMOS technology scales. The paper presents a detailed and rigorous analysis of temporal noise due to thermal and shot noise sources in CMOS active pixel sensor (APS) that takes into consideration these complicating factors. Performing time-domain analysis, instead of the more traditional frequency-domain analysis, we find that the reset noise power due to thermal noise is at most half of its commonly quoted kT/C value. This result is corroborated by several published experimental data including data presented in this paper. The lower reset noise, however, comes at the expense of image lag. We find that alternative reset methods such as overdriving the reset transistor gate or using a pMOS transistor can alleviate lag, but at the expense of doubling the reset noise power. We propose a new reset method that alleviates lag without increasing reset noise     

CMOS图像传感芯片的成像技术

详细地阐述了CMOS图像传感芯片的原理,并就CMOS图像传感芯片中存在的图像固定噪声、暗电流及溢出模糊问题给出了解决方法和对策。同时,对CMOS和CCD芯片进行了比较,论述了CMOS图像传感芯片的优势和发展方向。     

A low-noise line-amplified MOS imaging devices

A new MOS imaging device is proposed. It has an amplifier and a correlated double sampling (CDS) circuit at each vertical signal line and an off-chip smear differential gear. The 1/2-in image format, 500×485 pixels, is designed on 1.5-μm CMOS technology, and its fundamental characteristics are analyzed. Random noise is 120 pA, and the aperture ratio is greater than 70%. The smear level is 100 dB. The fixed pattern noise is 2000 pA in the dark, 0.62% in light. Some advantages of this device include a 5-V power supply requirement, a high saturation current, a high signal-to-random-noise ratio, and a low smear level. However, the fixed pattern noise in the dark needs to be lowered for improved performance     

基于场景的非均匀校正算法在红外系统中的应用

在分析了几种非均匀校正算法特点的基础上,提出了一种易于硬件实现的新算法,并给出了具体的硬件实现方法。与许多基于场景的非均匀校正算法不同,它不依赖目标的运动来抑制固定的图像噪声,而是将图像中的固定图像噪声和随时间温度的缓慢变化带来的信号漂移,看作是一种低频信号,利用时域高通滤波,将低频滤除;由于滤除的低频信号远低于帧频,因此不会影响图像细节。应用结果表明,该算法能有效消除红外探测器的非均匀噪声并有效抑制温度变化带来的漂移。     

基于CMOS图像传感器的微光成像系统信噪比研究

信噪比是微光成像系统的关键参数,决定了成像系统的性能与成像质量。给出了互补金属氧化物半导体（Complementary Metal Oxide Semiconductor, CMOS）图像传感器微光成像系统的信噪比模型,仿真计算了系统的信噪比与信号、噪声的关系。搭建了信噪比测试环境,完成了系统信噪比测试实验。实验结果表明,理论值与实测值一致。最后,根据信噪比分析结果对给定系统进行了参数优化。计算结果显示,优化后的系统在1 mLux照度下,信噪比能达到4.5。信噪比的研究为基于CMOS微光成像系统的总体设计与优化提供了理论依据。     

Analysis of low fixed pattern noise cell structures forphotoconversion layer overlaid CCD or CMOS image sensors

A new low fixed pattern noise (FPN) cell structure, which can be used for photoconversion layer overlaid CCD or CMOS image sensors, was proposed and analyzed with a two-dimensional (2-D) device simulator. One of the most serious problems for this type of image sensor is the mixing of signal charges of neighboring cells during signal charge readout. The magnitude of signal mixing was as much as 20% for the conventional 2/3-in 2-million pixel STACK-CCD cell structure. FPN was very visible as a result of this signal mixing. This time, a new cell structure was proposed and analyzed to reduce signal mixing and FPN. It was possible to reduce signal mixing to a low value of 0.7% of the signal level using the new cell structure     

MPP CCD暗电流温度特性研究

研究了MPP电荷耦合器件(CCD)暗电流和暗电流非均匀性的温度特性,并与非MPP CCD的暗电流和暗电流非均匀性的温度特性进行了对比分析。研究结果表明,MPP CCD抑制了表面暗电流,相较于非MPP CCD具有较低的暗电流和暗电流非均匀性,可以承受更高的工作温度。