低照度CMOS图像传感器设计与实现

设计了一种基于电容反馈跨阻放大器型（Capacitive Trans-impedance Amplifier,CTIA）像元电路与双采样（Delta Double Sampling,DDS）的低照度CMOS图像传感器系统。采用CTIA像元电路提供稳定的光电二极管偏置电压以及高注入效率,完成在低照度情况下对微弱信号的读取;同时采用数字DDS结构,通过在片外实现像元积分信号与复位信号的量化结果在数字域的减法,达到抑制CMOS图像传感器中固定图案噪声的目的,进一步提高低照度CIS的成像质量。基于0.35 m标准CMOS工艺对此基于CTIA像元电路的CMOS图像传感器芯片进行流片,像元阵列为256256,像元尺寸为16 m16 m。测试结果表明该低照度CMOS图像传感器系统可探测到0.05 lx光照条件下的信号。     

A sensitivity and linearity improvement of a 100-dB dynamic range CMOS image sensor using a lateral overflow integration capacitor

In a CMOS image sensor featuring a lateral overflow integration capacitor in a pixel, which integrates the overflowed charges from a fully depleted photodiode during the same exposure, the sensitivity in nonsaturated signal and the linearity in saturated overflow signal have been improved by introducing a new pixel circuit and its operation. The floating diffusion capacitance of the CMOS image sensor is as small as that of a four transistors type CMOS image sensor because the lateral overflow integration capacitor is located next to the reset switch. A 1/3-inch VGA format (640/sup H//spl times/480/sup V/ pixels), 7.5/spl times/7.5 /spl mu/m/sup 2/ pixel color CMOS image sensor fabricated through 0.35-/spl mu/m two-poly three-metal CMOS process results in a 100 dB dynamic range characteristic, with improved sensitivity and linearity.     

Design and evaluation of current-mode image sensors in CMOS-technology

Three different current-mode-output CMOS image sensor structures comprising of a pixel cell and an appropriate readout circuit have been analyzed and compared with regard to their noise behavior, fixed-pattern noise (FPN), and the dynamic range. First, a standard integrating pixel cell with a readout circuit containing a voltage-to-current converter is proposed. Second, a pixel cell based on a switched current cell is analyzed. The third sensor cell uses a feedback loop to control the reverse bias voltage of the photodiode to reduce the settling time of the pixel cell and the influence of the photodiodes's dark current. The necessary amplifier is partly located in the pixel cell and partly in the readout circuit. In all sensors, correlated double sampling is used to suppress the FPN.     

包含交流耦合CTIA与数字CDS的CMOS图像传感器设计

设计了一种带隔直电容的交流耦合CTIA像元电路与数字相关双采样（DCDS）结构的CMOS图像传感器系统。在传统的CTIA像元电路中增加隔直电容,通过控制光电二极管的偏压,达到减小光电二极管暗电流的目的;同时采用片外数字CDS结构,通过在片外实现复位信号与像元积分信号的量化结果在数字域的减法,可以减小图像传感器像元的复位噪声和固定图案噪声（FPN）。基于0.35 m标准CMOS工艺对此CMOS图像传感器进行流片,像元阵列为256256,像元尺寸为16 m16 m。测试结果表明交流耦合CTIA像元电路可以将光电二极管的偏压控制在零偏点附近,此时其暗电流最小;采用了数字CDS结构后,图像传感器像元的时域噪声及固定图案噪声均有不同程度降低。     

1400万像素CMOS传感器高速读出及信号采集的研究

面阵图像传感器的读出电路和信号采集电路是影响图像信号性能的关键部分之一。文章介绍了采用2路双通道AD及USB2．0实现了1400万像素高分辨率CMOS面阵传感器的大动态范围，低读出噪音的高速信号采集系统，并对系统的传输速度、分辨率、图像噪音、光强测量稳定性、近红外响应等进行了实验研究。     

Readout circuit for CMOS active pixel image sensor

The design and simulation results of a new readout circuit for a CMOS active pixel image sensor are presented. This scheme removes the fixed pattern noise and reduces the signal degradation while offering an increase in readout speed, compared with the conventional approach     

低噪声CMOS图像传感器技术研究综述

文章总结了低噪声CMOS图像传感器代表性关键技术的最新研究进展。从CMOS图像传感器架构及各模块设计的角度,介绍了有源像素结构和图像传感器架构,分析了广泛采用的像素内源跟随CMOS图像传感器读出电路及其噪声等效模型,重点介绍了低噪声CMOS图像传感器关键技术,包括共享参考像素差分共源放大器技术、相关多采样技术、像素内斩波技术,以及相关技术的电路级实现方式。     

CMOS数字像素传感器噪声研究

在研究CMOS数字像素传感器(DPS)噪声特性的基础上,利用脉冲宽度调制(PWM)原理建立了关于PWM DPS完善的系统噪声数学模型。相比于传统CMOS图像传感器噪声研究,该模型考虑了系统中各像素单元积分时间不同和像素级模数转换的特点,推导出总噪声表达式。研究表明,低照度时噪声由暗电流散粒噪声主导,光强大时主要来源为光电二极管散粒噪声。模型中光电二极管散粒噪声与光照无关、暗电流散粒噪声与光照有关。研究结果表明针对PWM DPS系统,适当增大节点电容和比较器参考电压、改善比较器失配可有效降低噪声。     

Hybrid infrared focal plane signal and noise model

A signal and noise model is presented for an infrared sensor with an advanced hybrid focal plane that uses a CMOS readout integrated circuit (ROIC). Part of the motivation for this work is to present a clear foundation for some of the well-known practical and useful rules that apply to infrared sensors in use today. The model shows explicitly how a correlated double sampler (CDS) eliminates kTC noise, explains the interesting dependence of output 1/f noise on integration and epoch times, and is generic enough to treat a large class of ROIC preamps. A sensor with a direct injection readout is treated as an example and user-friendly formulas are listed and used to calculate sensor signal and noise     

A new CMOS pixel structure for low-dark-current and large-array-size still imager applications

A pixel structure for still CMOS imager application called the pseudoactive pixel sensor (PAPS) is proposed and analyzed in this paper. It has the advantages of a low dark current, high signal-to-noise ratio, and a high fill factor over the conventional passive pixel sensor imager or active pixel sensor imager. The readout circuit called the zero-bias column buffer-direct-injection structure is also proposed to suppress both the dark current of the photodiode and the leakage current of row switches by keeping both biases of photodiode and the parasitic p-n junction in the column bus at or near zero voltage. The improved double delta sampling circuits are also used to suppress fixed pattern noise, clock feedthrough noise, and channel charge injection. An experimental chip of the proposed PAPS CMOS imager with the format of 352/spl times/288 (CIF) has been fabricated by using a 0.25-/spl mu/m single-poly-five-level-metal (1P5M) n-well CMOS process. The pixel size is 5.8 /spl mu/m/spl times/5.8 /spl mu/m. The pixel readout speed is from 100 kHz to 10 MHz, corresponding to the maximum frame rate above 30 frames/s. The proposed still CMOS imager has a fill factor of 58%, chip size of 3660 /spl mu/m/spl times/3500 /spl mu/m, and power dissipation of 24 mW under the power supply of 3.3 V. The experimental chip has successfully demonstrated the function of the proposed new PAPS structure. It can be applied in the design of large-array-size still CMOS imager systems with a low dark current and high resolution.     

A High-Speed, High-Sensitivity Digital CMOS Image Sensor With a Global Shutter and 12-bit Column-Parallel Cyclic A/D Converters

This paper presents a high-speed, high-sensitivity 512times512 CMOS image sensor with column parallel cyclic 12-bit ADCs and a global electronic shutter. Each pixel has a charge amplifier for high charge-to-voltage conversion gain despite of using a large-size photodiode, and two sample-and-hold stages for the global shutter and fixed pattern noise (FPN) canceling. High-speed column-parallel cyclic ADC arrays with 12-bit resolution having a small layout size of 0.09 mm ² are integrated at both sides of image array. A technique for accelerating the conversion speed using variable clocking and sampling capacitance is developed. A digital gain control function using 14-bit temporal digital code is also set in the column parallel ADC. The fabricated chip in 0.25-mum CMOS image sensor technology achieves the full frame rate in excess of 3500 frames/s. The in-pixel charge amplifier achieves the optical sensitivity of 19.9 V/lxmiddots. The signal full scale at the pixel output is 1.8 V at 3.3-V supply and the noise level is measured to be 1.8mV_rms, and the resulting signal dynamic range is 60 dB     

A novel sensor cell architecture and sensing circuit scheme forcapacitive fingerprint sensors

Novel capacitive fingerprint sensor techniques are described. We propose a novel sensor cell architecture to obtain high sensitivity, wide output dynamic range, and contrast adjustment. For the architecture, three circuit techniques were developed. A sensing circuit with a differential charge-transfer amplifier enhances sensitivity while it suppresses the influence of the parasitic capacitance of the sensor plate. A wide output dynamic range, which is needed for high-resolution analog-to-digital (A/D) conversion, is achieved by transforming the sensed voltage to a time-variant signal. Finally, the sensing circuit includes an automatic contrast enhancement scheme that uses a variable-threshold Schmitt trigger circuit to distinguish the ridges and valleys of a fingerprint well. The characteristics of a test chip using the 0.5-μm CMOS process show a high sensitivity to less than 80 fF as the detected signal, while the variation of the output signal is suppressed to less than 3% at ±20% variation of the parasitic capacitance. The dynamic range of the time-variant signal is 70 μs, which is wide enough for A/D conversion. The automatic contrast enhancement scheme widens the time-variant signal 100 μs more. A single-chip fingerprint sensor/identifier LSI using the proposed sensing circuit scheme confirms the scheme's effectiveness     

A numerical analysis of a CMOS image sensor with a simplefixed-pattern-noise-reduction technology

A 1/3-in 640×480-pixel CMOS image sensor with a simple fixed-pattern noise-reduction technology with a five-transistor pixel circuit and a low input-voltage current-voltage (I-V) converter was previously developed. In this report, we show that the low-input-voltage I-V converter with a current-mirror circuit improves the amplification factor and linearity of the pixel circuit. In a five-transistor pixel circuit, the threshold voltage of the X-Y addressing transistor affects the amplitude and the level of the readout pulse. An analysis of the mechanism of the X-Y addressing transistor shows the basic concept behind the selection of the threshold voltage. An L-shaped readout gate for a pinned photodiode is compared with a straight readout gate, and is proved to be adequate for rapid charge transfer     

长线列CMOS图像传感器的性能优化设计

设计了一种基于电容反馈跨阻放大器(CTIA)的长线列CMOS图像传感器。为减小器件功耗和面积,采用基于单端四管共源共栅运算放大器。为提高信号读出速率,采用没有体效应的PMOS源跟随器,同时减小PMOS管的宽长比,有效减小了输出总线寄生电容的影响。在版图设计上,采用顶层金属走线,降低寄生电阻和电容,提高了长线列CMOS图像传感器的读出速率和输出线性范围。采用0.35μm 3.3V标准CMOS工艺对传感器进行流片,得到器件像元阵列为5×1 030,像元尺寸为20μm×20μm。测试结果表明:该传感器在积分时间为1ms、读出速率为4MHz的情况下工作稳定,其线性度达到98%,线性动态范围为76dB。     

Infrared focal plane array incorporating silicon IC processcompatible bolometer

A 128×128 element bolometer infrared image sensor using thin film titanium is proposed. The device is a monolithically integrated structure with a titanium bolometer detector located over a CMOS circuit that reads out the bolometer's signals. By employing a metallic material like titanium and refining the CMOS readout circuit, it is possible to minimize 1/f noise. It is demonstrated that the use of low 1/f noise material will help increase bias current and improve the S/N ratio. Since the fabrication process is silicon-process compatible, costs can be kept low     

Noise analysis of high-gain, low-noise column readout circuits for CMOS image sensors

The temporal read noise on the signal path of a complementary metal-oxide semiconductor image sensor is analyzed to investigate the effectiveness of high-gain column amplifiers in enhancing sensor sensitivity. The signal path examined includes a pixel source follower, a switched-capacitor, noise-cancelling, high-gain amplifier, and a sample-and-hold circuit in each column. It is revealed that the total random readout noise consists of a component due to noise charge sampled and held at the charge summation node of the amplifier and transferred to the output, and a direct noise component sampled at the sample-and-hold stage at the output of the column amplifier. The analysis suggests that the direct noise components can be greatly reduced by increasing the column amplifier gain, indicating that an extremely low-noise readout circuit may be achievable through the development of a double-stage noise-cancelling architecture.     

An approach to obtain the pinch-off voltage of 4-T pixel in CMOS image sensor

An approach to obtain the pinch-off voltage of 4-T pixel in CMOS image sensor is presented.This new approach is based on the assumption that the photon shot noise in image signal is impacted by a potential well structure change of pixel.Experimental results show the measured pinch-off voltage is consistent with theoretical prediction.This technique provides an experimental method to assist the optimization of pixel design in both the photodiode structure and fabrication process for the 4-T CMOS image sen...     

A 128×128-pixel standard-CMOS image sensor with electronicshutter

A 128×128-pixel image sensor with a 20 s-10^-4 s electronic shutter has been integrated in a 1.2-μm digital CMOS technology. The pixel cell consists of four PMOS transistors and a photodiode with antiblooming suppression. Each pixel measures 24 μm by 24 μm and has a fill factor of 25%. Current is used to transfer pixel signals to the column readout amplifiers in order to minimize voltage swings on the highly capacitive column lines. Correlated double sampling is used to reduce intracolumn fixed pattern noise. The saturation voltage is 470 mV. The peak output signal to noise ratio is 45 dB, and the optical dynamic range is 56 dB. The frame transfer rate is 1.7 ms per frame     

低噪声1.25Gb/s光接收机前端放大器

设计并实现了一种基于TSMC 0.25μm CMOS工艺的低噪声、1.25Gb/s和124dBΩ的光接收机前端放大器.跨阻放大器设计采用了有源电感并联峰化和噪声优化技术,克服了CMOS光检测器大寄生电容造成的带宽不够的问题.测试结果表明,在2pF的寄生电容下,前端放大器工作速率达到了1.25Gb/s,在光功率为-17dBm的光信号输入下得到了清晰的眼图.芯片采用3.3V电压供电,功耗为122mW,差分输出电压幅度为660mV.     

A 1.9 $e^{-}$ Random Noise CMOS Image Sensor With Active Feedback Operation in Each Pixel

A 1.9 e^- random noise CMOS image sensor has been developed by applying an active feedback operation (AFO), which uses a capacitive feedback effect to floating diffusion (FD) by a gate-source capacitance of a pixel source follower (SF), in a CMOS image sensor with a lateral overflow integration capacitor (LOFIC) technology. It is described that the AFO is suitable for CMOS image sensors with LOFIC because the design of the full well capacity and the FD can be independently optimized. The AFO theory is found to be explored to a large signal voltage in detail, as well as the conventional analysis of the capacitive feedback effect of the pixel SF for a small signal voltage. A 1/4-in 5.6- mum-pitch 640(H) times 480(V) pixel sensor chip in a 0.18-mum two-poly-Si three-metal CMOS technology achieves about 1.7 times the sensitivity with AFO compared with the case where the feedback operation is not positively used, resulting in an input-referred conversion gain of 210 muV/e^- and an input-referred noise of 1.9 e^-. A high well capacity of 130 000 e^- is also achieved.