金刚石镶嵌非晶碳膜和类金刚石薄膜的场致电子发射研究

报道了在钼衬底上利用微波等离子体化学气相淀积技术制备金刚石镶嵌非晶碳膜，在硅衬底上用脉冲激光淀积技术（pulsedLaserDeposition）制备类金刚石薄膜，并对其场发射特性和机理进行了进一步的研究。用金刚石镶嵌非晶碳膜作阴极，在2．1V／μm的场强下便有电子发射，最大发射电流密度为4mA／cm2。实验表明，金刚石镶嵌非晶碳膜是制做场效发射冷阴极的合适材料。     

直接光CVD类金刚石碳膜的初期成膜结构

以微波激励氙（Ｘｅ） 发射的真空紫外光（ＶＵＶ） 作光源,乙炔（Ｃ２Ｈ２） 作反应气体,采用直接光化学汽相淀积（ＣＶＤ） 工艺,在硅（Ｓｉ） 、钼（ Ｍｏ） 及玻璃衬底上,１２０ ℃的低温下进行了类金刚石碳（ＤＬＣ） 膜的试生长。用Ｘ 射线光电子能谱（ＸＰＳ） 、扫描电子显微镜（ＳＥＭ） 等手段进行了初期成膜结构的测试分析。测试结果表明,在所有三种衬底上均能淀积生成ＤＬＣ 膜。其中Ｃ１ｓ 态原子的含量在６９ ．９８ ％ ～７４ ．６０ ％ 之间,相应的键合能为２８５ ．０ ～２８５ ．６ ｅＶ。淀积膜是以ＳＰ２ 键结构为主的ＤＬＣ膜。实验结果也表明,氧在成膜过程中是影响最大的因素。     

中红外薄膜的离子辅助淀积

本文研究了用离子束辅助淀积的中红外ＺｎＳ，ＺｎＳｅ，ＹｂＦ３，ＢａＦ２，ＢａＦ２＋ＣａＦ２（６：４）膜在３．８μｍ波长处光学特履和其它性能，用透射电镜和光电子能谱仪研究了这些单层膜微结构和化学计量比。实验发现离子束辅助淀积膜层填充密度增加，附着力增强，机械强和环境稳定性得到明显改善。用离子束辅助淀积的中红外反射膜在３．８μｍ波长反射率大于０．９９４。     

类金刚石薄膜作为MgF2红外增透和保护膜的研究

系统地研究了ＭｇＦ２衬底上类金刚石薄膜的折射率和生长速率与淀积工艺之间的关系，在ＭｇＦ２衬底上成功地设计并制备了红外增透和保护膜。理论与实验研究表明，类金刚石薄膜使ＭｇＦ２的红外透过率提高３％以上是完全可靠的，但起红外增透和保护是作用的统一性问题仍有待进一步研究。     

光化学汽相淀积技术在薄膜备制中的应用

介绍了光化学汽相淀积法的原理以及ＰＶＤ－１０００设备淀积薄膜的规律，特点等，并且给出了所淀积的ＳｉＯ２膜，Ｓｉ３Ｎ４膜和ＺｎＳ膜的基本特性。     

VLSI中CVD二氧化硅膜的淀积

介绍了大规模集成电路中两种ＣＶＤ二氧化硅膜的淀积，并对这两种二氧化硅膜的淀积方式及其性能进行了比较。指出ＴＥＯＳ淀积方式，是今后集成电路中ＳｉＯ２淀积的主流工艺。     

C-H体系CVD金刚石薄膜

化学气相淀积金刚石薄膜过程中,ＣＨ３和Ｃ２Ｈ２是金刚石生长的主要前驱基团。Ｃ２Ｈ２与ＣＨ３浓度比（［Ｃ２Ｈ２］／［ＣＨ３］）的变化将影响金刚石薄膜的生长取向。用非平衡热力学耦合模型设计了Ｃ－Ｈ体系ＣＶＤ金刚石薄膜生长过程中Ｃ２Ｈ２浓度和ＣＨ３浓度随淀积条件的变化,并进一步获得了［Ｃ２Ｈ２］／［ＣＨ３］随衬底温度和ＣＨ４浓度的变化关系,从理论上探讨了金刚石薄膜（１１１）面和（１００）面取向生长与淀积     

多晶硅膜原位掺杂制备浅发射结的研究

本文对ＰＥＣＶＤ法淀积原位掺杂多晶硅膜并制备浅发射结进行了实验研究，调查了Ｂ２Ｈ６／ＳｉＨ４比率以及淀积、退火温度等对掺杂多晶硅膜电阻率以及浅发射结形式的影响，结果表明，在３５０～４００℃的较低温度先淀积原位掺杂非晶膜，再１０００℃退火使其相变为掺杂多晶膜的工艺，不但能方便地获得所要求的发射区掺杂量和浅发射结结深，而且还能同时获得满足制备欧姆接触电极要求的低电阻多晶硅膜。     

反应溅射WSi＿xN＿y薄膜的特性

对ＷＳｉ＿ｘＮ＿ｙ薄膜的制备工艺以及Ｎ＿２分压对ＷＳｉ＿ｘＮ＿ｙ膜的组分、结构、应力、电阻率等方面的影响作了分析研究。尝试性地对淀积完毕真空室中充Ｎ＿２造成靶面氮化的情况作了实验分析。ＡＥＳ测试了膜的组分，ＸＲＤ分析了膜的结构，四探针法测得膜的电阻率。     

金刚石电子材料生长的研究进展

简述了金刚石兼具物理的和化学的优良性质,尤其是金刚石的半导体电气性质,即宽带隙、高击穿电场、高载流子迁移率和高热导率,成为固态功率器件最有前途的半导体材料之一。介绍了金刚石基的电子器件及其材料生长的研究进展,分析了金刚石膜的导电机理以及材料生长的新技术。重点介绍了采用包括微波等离子体化学汽相淀积(MPCVD)等方法制备金刚石膜、本征单晶生长、硼掺杂等技术。目前在直径为100~200 mm的硅衬底上,可以淀积均匀的超纳米结晶金刚石(UNCD)膜。此外,对金刚石电子学和光电子学的未来进行了展望。     

氮分压对磁控溅射制备TaN薄膜性能的影响

采用直流反应磁控溅射法制备了TaN薄膜,研究了φ(N2)对薄膜的结构和性能影响。研究发现,在N2分压(体积分数)为9%时,多相共存的TaN薄膜表现出TaN(200)面择优取向,方阻和αt达到最佳,其值为52Ω/□和–306×10–6/℃。薄膜的方阻、电阻温度系数αt和晶粒尺寸都随着N2分压的增大而增大:当N2分压高于11%时,薄膜的方阻和αt增长较快。     

超薄Ru/TaN双层薄膜作为无籽晶铜互连扩散阻挡层

研究了钌（Ru) /氮化钽（TaN）双层结构对铜的扩散阻挡特性，在Si (100）衬底上用离子束溅射的方法沉积了超薄Ru/TaN以及Cu/Ru/TaN薄膜，在高纯氮气保护下对样品进行快速热退火，用X射线衍射、四探针以及电流-时间测试等表征手段研究了Ru/TaN双层结构薄膜的热稳定性和对铜的扩散阻挡特性. 同时还对Ru/TaN结构上的铜进行了直接电镀. 实验结果表明Ru/TaN双层结构具有优良的热稳定性和扩散阻挡特性,在无籽晶铜互连工艺中有较好的应用前景.     

Selective wet etch of a TaN metal gate with an amorphous-silicon hard mask

The appropriate wet etch process for the selective removal of TaN on the HfSiON dielectric with an amorphous-silicon(a-Si) hardmask is presented.SCI(NH_4OH:H_2O_2:H_2O),which can achieve reasonable etch rates for metal gates and very high selectivity to high-k dielectrics and hardmask materials,is chosen as the TaN etchant. Compared with the photoresist mask and the tetraethyl orthosilicate(TEOS) hardmask,the a-Si hardmask is a better choice to achieve selective removal of TaN on the HfSiON dielectric be...     

TaN wet etch for application in dual-metal-gate integration technology

Wet-etch etchants and the TaN film method for dual-metal-gate integration are investigated. Both HF/HN O_3/H_2O and NH_4OH/H_2O_2 solutions can etch TaN effectively, but poor selectivity to the gate dielectric for the HF/HNO_3/H_2O solution due to HF being included in HF/HNO_3/H_2O, and the fact that TaN is difficult to etch in the NH_4OH/H_2O_2 solution at the first stage due to the thin TaO_xN_y layer on the TaN surface, mean that they are difficult to individually apply to dual-metal-gate integration. A two-step wet etching strategy using the HF/HNO_3/H_2O solution first and the NH_4OH/H_2O_2 solution later can fully remove thin TaN film with a photo-resist mask and has high selectivity to the HfSiON dielectric film underneath. High-k dielectric film surfaces are smooth after wet etching of the TaN metal gate and MOSCAPs show well-behaved C-V and J_g-V_g characteristics, which all prove that the wet etching of TaN has little impact on electrical performance and can be applied to dual-metal-gate integration technology for removing the first TaN metal gate in the PMOS region.     

应用于AlGaN/GaN HEMTs MMIC薄膜电阻的特性与可靠性

TaN和NiCr是AlGaN/GaN HEMTs微波集成电路中薄膜电阻最为常用的两种材料.文中对比了在SiC衬底上生长的这两种材料的薄膜电阻的可靠性.通过TaN和NiCr薄膜电阻的对比,发现TaN薄膜电阻的方块电阻(Rs)随着退火温度的上升而增大,然而NiCr薄膜电阻的Rs却出现相反的趋势.同时发现随着退火温度的上升TaN薄膜电阻的s.和接触电阻(Rc)的变化远远小于NiCr薄膜电阻的变化.在400℃退火及等离子刻蚀机的氧等离子暴露后,TaN薄膜电阻的Rs只下降了0.7Ω,大概2.56%,并且Rc上升了0.1Ω,大概6.6%.但是NiCr薄膜电阻的Rs.和Rc在不同的退火条件下经过氧等离子暴露后发生了很大的变化.因此,TaN薄膜电阻在氮气保护下经过400℃退火后在氧等离子暴露下更为稳定.     

以非晶硅为硬掩膜的TaN金属栅的选择性湿法腐蚀

提出了一种在HfSiON介质上,采用非晶硅为硬掩膜的选择性去除TaN的湿法腐蚀工艺。由于SC1(NH4OH:H2O2:H2O)对金属栅具有合适的腐蚀速率且对硬掩膜和高K材料的选择比很高,所以选择它作为TaN的腐蚀溶液。与光刻胶掩膜和TEOS硬掩膜相比,因非晶硅硬掩膜不受SC1溶液的影响且很容易用NH4OH溶液去除（NH4OH溶液对TaN和HfSiON薄膜无损伤）,所以对于在HfSiON介质上实现TaN的选择性去除来说非晶硅硬掩膜是更好的选择。另外,在TaN金属栅湿法腐蚀和硬掩膜去除后, 高K介质的表面是光滑的,这可防止器件性能退化。因此,采用非晶硅为硬掩膜的TaN湿法腐蚀工艺可以应用于双金属栅集成,实现先淀积的TaN金属栅的选择性去除。     

先进CMOS器件中poly-Si/TaN/HfSiON栅结构的干法刻蚀研究

研究了先进CMOS器件中poly-Si/TaN/HfSiON栅结构的干法刻蚀工艺。对于poly-Si/TaN/HfSiON栅结构的刻蚀,我们采用的策略是对栅叠层中的每一层都进行高选择比地、陡直地刻蚀。首先,对于栅结构中poly-Si的刻蚀,开发了一种三步的等离子体刻蚀工艺,不仅得到了陡直的poly-Si刻蚀剖面而且该刻蚀可以可靠地停止在TaN金属栅上。然后,为了得到陡直的TaN刻蚀剖面,研究了多种BCl3基刻蚀气体对TaN金属栅的刻蚀,发现BCl3/Cl2/O2/Ar等离子体是合适的选择。而且,考虑到Cl2对Si衬底几乎没有选择比,采用优化的BCl3/Cl2/O2/Ar等离子体陡直地刻蚀掉TaN金属栅以后,我们采用BCl3/Ar等离子体刻蚀HfSiON高K介质,改善对Si衬底的选择比。最后,采用这些新的刻蚀工艺,成功地实现了poly-Si/TaN/HfSiON栅结构的刻蚀,该刻蚀不仅得到了陡直的刻蚀剖面且对Si衬底几乎没有损失。     

The fabrication and dry etching of poly-Si/TaN/Mo gate stack in the metal inserted poly-Si stack structure

The Mo-based metal inserted poly-Si stack (MIPS) structure is an appropriate choice for metal gate and high-k integration in sub-45 nm gate-first CMOS device. A novel metal nitride layer of TaN or AlN with high thermal stability has been introduced between Mo and poly-Si as a barrier material to avoid any reaction of Mo during poly-Si deposition. After Mo-based MIPS structure is successfully prepared, dry etching of poly-Si/TaN/Mo gate stack is studied in detail. The three-step plasma etching using the Cl₂/HBr chemistry without soft landing step has been developed to attain a vertical poly-Si profile and a reliable etch-stop on the TaN/Mo metal gate. For the etching of TaN/Mo gate stack, two methods using BCl₃/Cl₂/O₂/Ar plasma are presented to get both vertical profile and smooth etched surface, and they are critical to get high selectivity to high-k dielectric and Si substrate. In addition, adding a little SF₆ to the BCl₃/O₂/Ar plasma under the optimized conditions is also found to be effective to smoothly etch the TaN/Mo gate stack with vertical profile.     

Field emission characteristics of CoSi2/TaN-coatedsilicon emitter tips

This work has improved the emission characteristics of Si emitter tips by coating a CoSi₂/TaN bilayer on the tips. The CoSi₂ layer was grown in situ by a reactive chemical-vapor deposition of cyclopentadienyl dicarbonyl cobalt at 650°C. The TaN was then deposited on the CoSi₂ layer at 550°C by a reactive sputtering of Ta with N as a reactive gas. The CoSi₂/TaN-coated emitters showed a lower turn-on voltage and higher emission current than the CoSi₂- or TaN-coated emitters due to the low work function by TaN and the easy transport of electron by CoSi₂ with low resistivity. The long-term emission stability of CoSi₂/TaN-coated Si emitter was as good as TaN-coated emitter     

TiN/TaN 厚度变化对nMOSCAP栅叠层有效功函数的影响

We evaluated the TiN/TaN/TiA1 triple-layer to modulate the effective work function （EWF） of a metal gate stack for the n-type metal-oxide-semiconductor （NMOS） devices application by varying the TiN/TaN thickness. In this paper, the effective work function of EWF ranges from 4.22 to 4.56 eV with different thicknesses of TiN and TaN. The thinner TiN and/or thinner in situ TaN capping, the closer to conduction band of silicon the EWF is, which is appropriate for 2-D planar NMOS. Mid-gap work function behavior is observed with thicker TiN, thicker in situ TaN capping, indicating a strong potential candidate of metal gate material for replacement gate processed three-dimensional devices such as FIN shaped field effect transistors. The physical understandings of the sensitivity of EWF to TiN and TaN thickness are proposed. The thicker TiN prevents the A1 diffusion then induces the EWF to shift to mid-gap. However, the TaN plays a different role in effective work function tuning from TiN, due to the Ta-O dipoles formed at the interface between the metal gate and the high-k layer.